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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5 |
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| #
4d93ffe6 |
| 22-Oct-2024 |
Uwe Kleine-König <[email protected]> |
ARC: dts: Replace deprecated snps,nr-gpios property for snps,dw-apb-gpio-port devices
snps,dw-apb-gpio-port is deprecated since commit ef42a8da3cf3 ("dt-bindings: gpio: dwapb: Add ngpios property su
ARC: dts: Replace deprecated snps,nr-gpios property for snps,dw-apb-gpio-port devices
snps,dw-apb-gpio-port is deprecated since commit ef42a8da3cf3 ("dt-bindings: gpio: dwapb: Add ngpios property support"). The respective driver supports this since commit 7569486d79ae ("gpio: dwapb: Add ngpios DT-property support") which is included in Linux v5.10-rc1.
This change was created using
git grep -l snps,nr-gpios arch/arc/boot/dts | xargs perl -p -i -e 's/\bsnps,nr-gpios\b/ngpios/
.
Signed-off-by: Uwe Kleine-König <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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Revision tags: v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2 |
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61231eb8 |
| 29-Mar-2024 |
Alexey Brodkin <[email protected]> |
ARC: [plat-hsdk]: Remove misplaced interrupt-cells property
"gmac" node stands for just an ordinary Ethernet controller, which is by no means a provider of interrupts, i.e. it doesn't serve as an in
ARC: [plat-hsdk]: Remove misplaced interrupt-cells property
"gmac" node stands for just an ordinary Ethernet controller, which is by no means a provider of interrupts, i.e. it doesn't serve as an interrupt controller, thus "#interrupt-cells" property doesn't belong to it and so we remove it.
Fixes: ------------>8------------ DTC arch/arc/boot/dts/hsdk.dtb arch/arc/boot/dts/hsdk.dts:207.23-235.5: Warning (interrupt_provider): /soc/ethernet@8000: '#interrupt-cells' found, but node is not an interrupt provider arch/arc/boot/dts/hsdk.dtb: Warning (interrupt_map): Failed prerequisite 'interrupt_provider' ------------>8------------
Reported-by: Vineet Gupta <[email protected]> Signed-off-by: Alexey Brodkin <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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Revision tags: v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4 |
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c8f87858 |
| 24-Jun-2022 |
Serge Semin <[email protected]> |
arc: dts: Harmonize EHCI/OHCI DT nodes name
In accordance with the Generic EHCI/OHCI bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the
arc: dts: Harmonize EHCI/OHCI DT nodes name
In accordance with the Generic EHCI/OHCI bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible nodes are correctly named.
Signed-off-by: Serge Semin <[email protected]> Acked-by: Alexey Brodkin <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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Revision tags: v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2 |
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3f943be0 |
| 07-Apr-2022 |
Krzysztof Kozlowski <[email protected]> |
ARC: dts: align SPI NOR node name with dtschema
The node names should be generic and SPI NOR dtschema expects "flash".
Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off
ARC: dts: align SPI NOR node name with dtschema
The node names should be generic and SPI NOR dtschema expects "flash".
Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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Revision tags: v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5 |
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26907eb6 |
| 07-Jul-2020 |
Evgeniy Didin <[email protected]> |
ARC: [plat-hsdk]: Switch ethernet phy-mode to rgmii-id
HSDK board has Micrel KSZ9031, recent commit bcf3440c6dd ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY") caused a breakdown of E
ARC: [plat-hsdk]: Switch ethernet phy-mode to rgmii-id
HSDK board has Micrel KSZ9031, recent commit bcf3440c6dd ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY") caused a breakdown of Ethernet. Using 'phy-mode = "rgmii"' is not correct because accodring RGMII specification it is necessary to have delay on RX (PHY to MAX) which is not generated in case of "rgmii". Using "rgmii-id" adds necessary delay and solves the issue.
Also adding name of PHY placed on HSDK board.
Signed-off-by: Evgeniy Didin <[email protected]> Cc: Eugeniy Paltsev <[email protected]> Cc: Alexey Brodkin <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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fe81d927 |
| 10-Jul-2020 |
Vineet Gupta <[email protected]> |
ARC: HSDK: wireup perf irq
Newer version of HSDK aka HSDK-4xD (with dual issue HS48x4 CPU) wired up the perf interrupt, so enable that in DT. This is OK for old HSDK where this irq is ignored becaus
ARC: HSDK: wireup perf irq
Newer version of HSDK aka HSDK-4xD (with dual issue HS48x4 CPU) wired up the perf interrupt, so enable that in DT. This is OK for old HSDK where this irq is ignored because pct irq is not wired up in hardware.
Signed-off-by: Vineet Gupta <[email protected]>
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Revision tags: v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4 |
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ab563bf5 |
| 18-Oct-2019 |
Eugeniy Paltsev <[email protected]> |
ARC: [plat-hsdk]: Enable on-boardi SPI ADC IC
HSDK board has adc108s102 SPI ADC IC installed, enable it.
Acked-by: Alexey Brodkin <[email protected]> Signed-off-by: Eugeniy Paltsev <Eugeniy.Pal
ARC: [plat-hsdk]: Enable on-boardi SPI ADC IC
HSDK board has adc108s102 SPI ADC IC installed, enable it.
Acked-by: Alexey Brodkin <[email protected]> Signed-off-by: Eugeniy Paltsev <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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8ca8fa7f |
| 18-Oct-2019 |
Eugeniy Paltsev <[email protected]> |
ARC: [plat-hsdk]: Enable on-board SPI NOR flash IC
HSDK board has sst26wf016b SPI NOR flash IC installed, enable it.
Acked-by: Alexey Brodkin <[email protected]> Signed-off-by: Eugeniy Paltsev
ARC: [plat-hsdk]: Enable on-board SPI NOR flash IC
HSDK board has sst26wf016b SPI NOR flash IC installed, enable it.
Acked-by: Alexey Brodkin <[email protected]> Signed-off-by: Eugeniy Paltsev <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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Revision tags: v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4 |
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aab128d0 |
| 07-Jun-2019 |
Eugeniy Paltsev <[email protected]> |
ARC: [plat-hsdk]: enable DW SPI controller
HSDK SoC has DW SPI controller. Enable it in preparation of enabling on-board SPI peripherals.
Acked-by: Alexey Brodkin <[email protected]> Signed-off
ARC: [plat-hsdk]: enable DW SPI controller
HSDK SoC has DW SPI controller. Enable it in preparation of enabling on-board SPI peripherals.
Acked-by: Alexey Brodkin <[email protected]> Signed-off-by: Eugeniy Paltsev <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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d2912cb1 |
| 04-Jun-2019 |
Thomas Gleixner <[email protected]> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Based on 2 normalized pattern(s):
this program is free software you can redistribute it and or modify it under the terms of th
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Based on 2 normalized pattern(s):
this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation
this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation #
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4122 file(s).
Signed-off-by: Thomas Gleixner <[email protected]> Reviewed-by: Enrico Weigelt <[email protected]> Reviewed-by: Kate Stewart <[email protected]> Reviewed-by: Allison Randal <[email protected]> Cc: [email protected] Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v5.2-rc3, v5.2-rc2, v5.2-rc1 |
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46e04c25 |
| 15-May-2019 |
Alexey Brodkin <[email protected]> |
ARC: [plat-hsdk] Get rid of inappropriate PHY settings
Initial bring-up of the platform was done on FPGA prototype where TI's DP83867 PHY was used. And so some specific PHY options were added.
Just
ARC: [plat-hsdk] Get rid of inappropriate PHY settings
Initial bring-up of the platform was done on FPGA prototype where TI's DP83867 PHY was used. And so some specific PHY options were added.
Just to confirm this is what we get on FPGA prototype in the bootlog: | TI DP83867 stmmac-0:00: attached PHY driver [TI DP83867] ...
On real board though we have Micrel KZS9031 PHY and we even have CONFIG_MICREL_PHY=y set in hsdk_defconfig. That's what we see in the bootlog: | Micrel KSZ9031 Gigabit PHY stmmac-0:00: ...
So essentially all TI-related bits have to go away.
Cc: Rob Herring <[email protected]> Acked-by: Trent Piepho <[email protected]> Signed-off-by: Alexey Brodkin <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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b0470064 |
| 21-May-2019 |
Eugeniy Paltsev <[email protected]> |
ARC: [plat-hsdk]: Add support of Vivante GPU
HSDK board has built-in Vivante GPU IP which works perfectly fine with Etnaviv driver, so let's use it.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@
ARC: [plat-hsdk]: Add support of Vivante GPU
HSDK board has built-in Vivante GPU IP which works perfectly fine with Etnaviv driver, so let's use it.
Signed-off-by: Eugeniy Paltsev <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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780b35b6 |
| 28-May-2019 |
Eugeniy Paltsev <[email protected]> |
ARC: [plat-hsdk]: enable creg-gpio controller
HSDK SOC has CREG GPIO controller which can be used to control SPI chip select lines. Enable it in preparation of enabling SPI peripherals.
Acked-by: A
ARC: [plat-hsdk]: enable creg-gpio controller
HSDK SOC has CREG GPIO controller which can be used to control SPI chip select lines. Enable it in preparation of enabling SPI peripherals.
Acked-by: Alexey Brodkin <[email protected]> Signed-off-by: Eugeniy Paltsev <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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4c70850a |
| 20-May-2019 |
Jose Abreu <[email protected]> |
ARC: [plat-hsdk]: Add missing FIFO size entry in GMAC node
Add the binding for RX/TX fifo size of GMAC node.
Cc: Joao Pinto <[email protected]> Cc: Rob Herring <[email protected]> Cc: Mark Rutla
ARC: [plat-hsdk]: Add missing FIFO size entry in GMAC node
Add the binding for RX/TX fifo size of GMAC node.
Cc: Joao Pinto <[email protected]> Cc: Rob Herring <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Vineet Gupta <[email protected]> Tested-by: Eugeniy Paltsev <[email protected]> Acked-by: Alexey Brodkin <[email protected]> Signed-off-by: Jose Abreu <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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ecc906a1 |
| 20-May-2019 |
Jose Abreu <[email protected]> |
ARC: [plat-hsdk]: Add missing multicast filter bins number to GMAC node
GMAC controller on HSDK boards supports 256 Hash Table size so we need to add the multicast filter bins property. This allows
ARC: [plat-hsdk]: Add missing multicast filter bins number to GMAC node
GMAC controller on HSDK boards supports 256 Hash Table size so we need to add the multicast filter bins property. This allows for the Hash filter to work properly using stmmac driver.
Cc: Joao Pinto <[email protected]> Cc: Rob Herring <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Eugeniy Paltsev <[email protected]> Acked-by: Alexey Brodkin <[email protected]> Signed-off-by: Jose Abreu <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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Revision tags: v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5, v5.1-rc4 |
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21cee1bd |
| 02-Apr-2019 |
Vineet Gupta <[email protected]> |
ARC: [hsdk] Make it easier to add PAE40 region to DTB
1. Bump top level address-cells/size-cells nodes to 2 (to ensure all down stream addresses are 64-bits, unless explicitly specified otherw
ARC: [hsdk] Make it easier to add PAE40 region to DTB
1. Bump top level address-cells/size-cells nodes to 2 (to ensure all down stream addresses are 64-bits, unless explicitly specified otherwise (in "soc" bus with all peripherals)
2. "memory" also specified with address/size 2
3. Add a commented reference for PAE40 region beyond 4GB physical address space
Signed-off-by: Vineet Gupta <[email protected]>
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Revision tags: v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8 |
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5d4ab8d0 |
| 19-Feb-2019 |
Eugeniy Paltsev <[email protected]> |
ARC: [plat-hsdk]: Enable AXI DW DMAC support
Signed-off-by: Eugeniy Paltsev <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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Revision tags: v5.0-rc7 |
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66f7d370 |
| 15-Feb-2019 |
Eugeniy Paltsev <[email protected]> |
ARC: [plat-hsdk]: Add reset controller handle to manage USB reset
DW USB controller on HSDK hangs sometimes after SW reset, so add reset handle to make possible to reset DW USB controller HW.
Signe
ARC: [plat-hsdk]: Add reset controller handle to manage USB reset
DW USB controller on HSDK hangs sometimes after SW reset, so add reset handle to make possible to reset DW USB controller HW.
Signed-off-by: Eugeniy Paltsev <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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Revision tags: v5.0-rc6, v5.0-rc5, v5.0-rc4 |
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ef4c54c3 |
| 24-Jan-2019 |
Alexey Brodkin <[email protected]> |
ARC: DTB: [scripted] fix node name and address spelling
1. Remove "0x" prefix from unit-address of node names ----------------------->8------------------------ sed -i 's/@0x/@/g' arch/arc/boot/dts/*
ARC: DTB: [scripted] fix node name and address spelling
1. Remove "0x" prefix from unit-address of node names ----------------------->8------------------------ sed -i 's/@0x/@/g' arch/arc/boot/dts/*.dts* ----------------------->8------------------------
2. Make all hex addresses lowercase: ----------------------->8------------------------ sed -i 's/@\([0-9A-Za-z]*\)/@\L\1/g' arch/arc/boot/dts/*.dts* sed -i 's/0x\([0-9A-Za-z]*\)/0x\L\1/g' arch/arc/boot/dts/*.dts* ----------------------->8------------------------
Inspired by [1] and the like.
[1] http://kisskb.ellerman.id.au/kisskb/buildresult/13612017/
Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Alexey Brodkin <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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Revision tags: v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20, v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1 |
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| #
4592f11e |
| 23-Oct-2018 |
Eugeniy Paltsev <[email protected]> |
ARC: [plat-hsdk] Enable DW APB GPIO support
Enable GPIO support on HSDK. HSDK SoC includes Synopsys DesignWare DW_apb_gpio IP with 24 GPIOs mapped onto port A.
Signed-off-by: Eugeniy Paltsev <Eugen
ARC: [plat-hsdk] Enable DW APB GPIO support
Enable GPIO support on HSDK. HSDK SoC includes Synopsys DesignWare DW_apb_gpio IP with 24 GPIOs mapped onto port A.
Signed-off-by: Eugeniy Paltsev <[email protected]> Acked-by: Alexey Brodkin <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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Revision tags: v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6, v4.19-rc5, v4.19-rc4, v4.19-rc3, v4.19-rc2, v4.19-rc1, v4.18, v4.18-rc8 |
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| #
678c8110 |
| 30-Jul-2018 |
Eugeniy Paltsev <[email protected]> |
ARC: dma [IOC]: mark DMA devices connected as dma-coherent
Mark DMA devices on AXS103 and HSDK boards connected through IOC port as dma-coherent.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@syn
ARC: dma [IOC]: mark DMA devices connected as dma-coherent
Mark DMA devices on AXS103 and HSDK boards connected through IOC port as dma-coherent.
Signed-off-by: Eugeniy Paltsev <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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| #
5c092089 |
| 02-Aug-2018 |
Alexey Brodkin <[email protected]> |
ARC: [plat-axs*/plat-hsdk]: Allow U-Boot to pass MAC-address to the kernel
Otherwise kernel uses random MAC which is not very conveniet. With that change in place use might set desired MAC in U-Boot
ARC: [plat-axs*/plat-hsdk]: Allow U-Boot to pass MAC-address to the kernel
Otherwise kernel uses random MAC which is not very conveniet. With that change in place use might set desired MAC in U-Boot with "setenv ethaddr 11:22:33:44:55:66", save environment and then from boot to boot the same MAC will be used by the kernel.
One other note for this to happen it's required to pass board's .dtb in U-Boot's "bootm" command like that: ------------------->8----------------- bootm 0x82000000 - 0x84000000 ------------------->8-----------------
Here 0x82000000 is location of uImage while 0x80000000 is location of either axs10x.dtb or hsdk.dtb previously loaded from SD-card, USB storage or TFTP server.
Signed-off-by: Alexey Brodkin <[email protected]> Cc: Rob Herring <[email protected]> Cc: [email protected] # 4.14 Cc: [email protected] Signed-off-by: Vineet Gupta <[email protected]>
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Revision tags: v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4, v4.18-rc3, v4.18-rc2, v4.18-rc1, v4.17, v4.17-rc7, v4.17-rc6, v4.17-rc5, v4.17-rc4, v4.17-rc3, v4.17-rc2, v4.17-rc1, v4.16, v4.16-rc7, v4.16-rc6, v4.16-rc5, v4.16-rc4, v4.16-rc3, v4.16-rc2, v4.16-rc1, v4.15, v4.15-rc9, v4.15-rc8, v4.15-rc7, v4.15-rc6, v4.15-rc5, v4.15-rc4, v4.15-rc3 |
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a08c832f |
| 09-Dec-2017 |
Eugeniy Paltsev <[email protected]> |
ARC: [plat-hsdk]: Set initial core pll output frequency
Set initial core pll output frequency specified in device tree to 1GHz. It will be applied at the core pll driver probing.
Acked-by: Stephen
ARC: [plat-hsdk]: Set initial core pll output frequency
Set initial core pll output frequency specified in device tree to 1GHz. It will be applied at the core pll driver probing.
Acked-by: Stephen Boyd <[email protected]> Signed-off-by: Eugeniy Paltsev <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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Revision tags: v4.15-rc2, v4.15-rc1, v4.14, v4.14-rc8, v4.14-rc7, v4.14-rc6, v4.14-rc5 |
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753affba |
| 11-Oct-2017 |
Eugeniy Paltsev <[email protected]> |
ARC: [plat-hsdk] Increase SDIO CIU frequency to 50000000Hz
With current SDIO CIU clock frequency (12500000Hz) DW MMC controller fails to initialize some SD cards (which don't support slow mode).
So
ARC: [plat-hsdk] Increase SDIO CIU frequency to 50000000Hz
With current SDIO CIU clock frequency (12500000Hz) DW MMC controller fails to initialize some SD cards (which don't support slow mode).
So increase SDIO CIU frequency from 12500000Hz to 50000000Hz by switching from the default divisor value (div-by-8) to the minimum possible value of the divisor (div-by-2) in HSDK platform code.
Reported-by: Vineet Gupta <[email protected]> Tested-by: Vineet Gupta <[email protected]> Signed-off-by: Eugeniy Paltsev <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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Revision tags: v4.14-rc4, v4.14-rc3, v4.14-rc2 |
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ab8eb7db |
| 22-Sep-2017 |
Eugeniy Paltsev <[email protected]> |
ARC: [plat-hsdk]: Add reset controller node to manage ethernet reset
DW ethernet controller on HSDK hangs sometimes after SW reset, so add reset node to make possible to reset DW ethernet controller
ARC: [plat-hsdk]: Add reset controller node to manage ethernet reset
DW ethernet controller on HSDK hangs sometimes after SW reset, so add reset node to make possible to reset DW ethernet controller HW.
Signed-off-by: Eugeniy Paltsev <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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