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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4 |
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| #
3ab33481 |
| 19-Dec-2024 |
Eric R. Smith <[email protected]> |
drm: add modifiers for MediaTek tiled formats
MediaTek (MTK) uses some unique tiled memory formats for video decoding. Add these to the uapi drm_fourcc.h so that we can use them in Mesa, GStreamer,
drm: add modifiers for MediaTek tiled formats
MediaTek (MTK) uses some unique tiled memory formats for video decoding. Add these to the uapi drm_fourcc.h so that we can use them in Mesa, GStreamer, and other tools/libraries.
v2: - Classify the modifier bits into categories and provide room for expansion (Daniel S.)
Signed-off-by: Eric R. Smith <[email protected]> Reviewed-by: Daniel Stone <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Daniel Stone <[email protected]>
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Revision tags: v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5 |
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377dda2c |
| 25-Oct-2024 |
Qiang Yu <[email protected]> |
drm/fourcc: add AMD_FMT_MOD_TILE_GFX9_4K_D_X
This is used when radeonsi export small texture's modifier to user with eglExportDMABUFImageQueryMESA().
mesa changes is available here: https://gitlab.
drm/fourcc: add AMD_FMT_MOD_TILE_GFX9_4K_D_X
This is used when radeonsi export small texture's modifier to user with eglExportDMABUFImageQueryMESA().
mesa changes is available here: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31658
Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Qiang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4 |
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| #
5151fa35 |
| 16-Aug-2024 |
Juha-Pekka Heikkila <[email protected]> |
drm/fourcc: define Intel Xe2 related tile4 ccs modifiers
Add Tile4 type ccs modifiers to indicate presence of compression on Xe2. Here is defined I915_FORMAT_MOD_4_TILED_LNL_CCS which is meant for i
drm/fourcc: define Intel Xe2 related tile4 ccs modifiers
Add Tile4 type ccs modifiers to indicate presence of compression on Xe2. Here is defined I915_FORMAT_MOD_4_TILED_LNL_CCS which is meant for integrated graphics with igpu related limitations Here is also defined I915_FORMAT_MOD_4_TILED_BMG_CCS which is meant for discrete graphics with dgpu related limitations
Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Acked-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Rodrigo Vivi <[email protected]>
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Revision tags: v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2 |
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8dd1426e |
| 01-Jun-2024 |
Marek Olšák <[email protected]> |
drm/amdgpu: handle gfx12 in amdgpu_display_verify_sizes
It verified GFX9-11 swizzle modes on GFX12, which has undefined behavior.
Signed-off-by: Marek Olšák <[email protected]> Acked-by: Alex Deu
drm/amdgpu: handle gfx12 in amdgpu_display_verify_sizes
It verified GFX9-11 swizzle modes on GFX12, which has undefined behavior.
Signed-off-by: Marek Olšák <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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8d9ffd15 |
| 01-Jun-2024 |
Marek Olšák <[email protected]> |
drm/amdgpu: remove AMD_FMT_MOD_GFX12_DCC_MAX_COMPRESSED_BLOCK_* definitions
They were added accidentally.
Signed-off-by: Marek Olšák <[email protected]> Acked-by: Alex Deucher <alexander.deucher@
drm/amdgpu: remove AMD_FMT_MOD_GFX12_DCC_MAX_COMPRESSED_BLOCK_* definitions
They were added accidentally.
Signed-off-by: Marek Olšák <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8 |
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96557f78 |
| 05-Mar-2024 |
Aurabindo Pillai <[email protected]> |
drm/amd: GFX12 changes for converting tiling flags to modifiers
GFX12 swizzle mode and GCC formats changed and is much simpler. Use a seperate function for the same. Changes:
* Swizzle mode is now
drm/amd: GFX12 changes for converting tiling flags to modifiers
GFX12 swizzle mode and GCC formats changed and is much simpler. Use a seperate function for the same. Changes:
* Swizzle mode is now 3 bits only * DCC enablement doesn't come from tiling_flags, it is always set in modifiers * DCC max compressed block size of 128B
Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3 |
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7ceb94e8 |
| 02-Feb-2024 |
Aurabindo Pillai <[email protected]> |
drm/amd: Add gfx12 swizzle mode defs
Add GFX12 swizzle mode definitions for use with DCN401
Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@a
drm/amd: Add gfx12 swizzle mode defs
Add GFX12 swizzle mode definitions for use with DCN401
Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6 |
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c4c5391a |
| 13-Dec-2023 |
Randy Dunlap <[email protected]> |
drm/fourcc: fix spelling/typos
Correct spelling mistakes that were identified by codespell.
Signed-off-by: Randy Dunlap <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vette
drm/fourcc: fix spelling/typos
Correct spelling mistakes that were identified by codespell.
Signed-off-by: Randy Dunlap <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Thomas Zimmermann <[email protected]> Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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Revision tags: v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6 |
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728c15b4 |
| 23-Oct-2023 |
Jonas Karlman <[email protected]> |
drm/fourcc: Add NV20 and NV30 YUV formats
DRM_FORMAT_NV20 and DRM_FORMAT_NV30 formats is the 2x1 and non-subsampled variant of NV15, a 10-bit 2-plane YUV format that has no padding between component
drm/fourcc: Add NV20 and NV30 YUV formats
DRM_FORMAT_NV20 and DRM_FORMAT_NV30 formats is the 2x1 and non-subsampled variant of NV15, a 10-bit 2-plane YUV format that has no padding between components. Instead, luminance and chrominance samples are grouped into 4s so that each group is packed into an integer number of bytes:
YYYY = UVUV = 4 * 10 bits = 40 bits = 5 bytes
The '20' and '30' suffix refers to the optimum effective bits per pixel which is achieved when the total number of luminance samples is a multiple of 4.
V2: Added NV30 format
Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Sandy Huang <[email protected]> Reviewed-by: Christopher Obbard <[email protected]> Tested-by: Christopher Obbard <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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Revision tags: v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2 |
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c7c12de8 |
| 14-May-2023 |
Juha-Pekka Heikkila <[email protected]> |
drm/fourcc: define Intel Meteorlake related ccs modifiers
Add Tile4 type ccs modifiers with aux buffer needed for MTL
Bspec: 49251, 49252, 49253 Cc: [email protected] Cc: Jani Nikula
drm/fourcc: define Intel Meteorlake related ccs modifiers
Add Tile4 type ccs modifiers with aux buffer needed for MTL
Bspec: 49251, 49252, 49253 Cc: [email protected] Cc: Jani Nikula <[email protected]> Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Matt Atwood <[email protected]> Acked-by: Thomas Zimmermann <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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Revision tags: v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7 |
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b357e7ac |
| 23-Nov-2022 |
Daniel Vetter <[email protected]> |
drm/fourcc: Document open source user waiver
It's a bit a FAQ, and we really can't claim to be the authoritative source for allocating these numbers used in many standard extensions if we tell close
drm/fourcc: Document open source user waiver
It's a bit a FAQ, and we really can't claim to be the authoritative source for allocating these numbers used in many standard extensions if we tell closed source or vendor stacks in general to go away.
Iirc this was already clarified in some vulkan discussions, but I can't find that anywhere anymore. At least not in a public link.
Cc: Maarten Lankhorst <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Thomas Zimmermann <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Daniel Stone <[email protected]> Cc: Bas Nieuwenhuizen <[email protected]> Cc: Jason Ekstrand <[email protected]> Cc: Neil Trevett <[email protected]> Acked-by: Daniel Stone <[email protected]> Acked-by: Maxime Ripard <[email protected]> Acked-by: David Airlie <[email protected]> Acked-by: Marek Olšák <[email protected]> Acked-by: Bas Nieuwenhuizen <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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Revision tags: v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5 |
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43d3f3b9 |
| 09-Sep-2022 |
Lucas Stach <[email protected]> |
drm/fourcc: add Vivante tile status modifiers
The tile status modifiers can be combined with all of the usual color buffer modifiers. When they are present an additional plane is added to the surfac
drm/fourcc: add Vivante tile status modifiers
The tile status modifiers can be combined with all of the usual color buffer modifiers. When they are present an additional plane is added to the surfaces to share the tile status buffer. The TS modifiers describe the interpretation of the tag bits in this buffer.
Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]> Reviewed-by: Guido Günther <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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Revision tags: v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3 |
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| #
53618649 |
| 16-Jun-2022 |
Laurent Pinchart <[email protected]> |
drm/fourcc: Add formats for packed YUV 4:4:4 AVUY and XVUY permutations
Add FourCCs for two missing permutations of the packed YUV 4:4:4 color components, namely AVUY and XVUY.
These formats are ne
drm/fourcc: Add formats for packed YUV 4:4:4 AVUY and XVUY permutations
Add FourCCs for two missing permutations of the packed YUV 4:4:4 color components, namely AVUY and XVUY.
These formats are needed by the NXP i.MX8 ISI. While the ISI is supported by a V4L2 device (corresponding formats have been submitted to V4L2), it is handled in userspace by libcamera, which uses DRM FourCCs for pixel formats.
Signed-off-by: Laurent Pinchart <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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b92db7e4 |
| 08-Jul-2022 |
Geert Uytterhoeven <[email protected]> |
drm/fourcc: Add DRM_FORMAT_D[1248]
As Rn covers single-channel formats with a direct relationship between channel value and brightness, and Cn can be any colors, there are currently no fourcc codes
drm/fourcc: Add DRM_FORMAT_D[1248]
As Rn covers single-channel formats with a direct relationship between channel value and brightness, and Cn can be any colors, there are currently no fourcc codes to describe single-channel formats with an inverse relationship between channel value and brightness.
Introduce fourcc codes for a single-channel frame buffer format with two, four, sixteen, or 256 brightness ("darkness") levels, where there is an inverse relationship between channel value and brightness.
As the number of bits per pixel may be less than eight, some of these formats rely on proper block handling for the calculation of bits per pixel and pitch.
The fill order (the order in which multiple pixels are packed in a byte) is the same order as used for grayscale (2, 4, and 16 levels) images in the PNG specification, Version 1.2. This order is also the recommended and default order (FillOrder = 1) for bilevel and grayscale (16 levels) images in the TIFF 6.0 Specification, and is also used for monochrome images in the PBM file format, monochrome Linux frame buffer logos, and BDF and PSF (Linux kernel) font files.
Signed-off-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Javier Martinez Canillas <[email protected]> Signed-off-by: Sam Ravnborg <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/6119f3abeda9baaa88652843960adc032da276b4.1657294931.git.geert@linux-m68k.org
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d093100b |
| 08-Jul-2022 |
Geert Uytterhoeven <[email protected]> |
drm/fourcc: Add DRM_FORMAT_R[124]
Introduce fourcc codes for single-channel frame buffer formats with two, four, and sixteen brightness levels, where there is a direct relationship between channel v
drm/fourcc: Add DRM_FORMAT_R[124]
Introduce fourcc codes for single-channel frame buffer formats with two, four, and sixteen brightness levels, where there is a direct relationship between channel value and brightness.
As the number of bits per pixel is less than eight, these rely on proper block handling for the calculation of bits per pixel and pitch.
The fill order (the order in which multiple pixels are packed in a byte) is the same order as used for grayscale (2, 4, and 16 levels) images in the PNG specification, Version 1.2. This order is also the recommended and default order (FillOrder = 1) for bilevel and grayscale (16 levels) images in the TIFF 6.0 Specification, and is also used for monochrome images in the PBM file format, monochrome Linux frame buffer logos, and BDF and PSF (Linux kernel) font files.
Signed-off-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Javier Martinez Canillas <[email protected]> Signed-off-by: Sam Ravnborg <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/96561a88e53c59cac72e66642bf4c097aacefd18.1657294931.git.geert@linux-m68k.org
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8aba4d30 |
| 08-Jul-2022 |
Geert Uytterhoeven <[email protected]> |
drm/fourcc: Clarify the meaning of single-channel "red"
Traditionally, the first channel has been called the "red" channel, but the fourcc values for single-channel "red" formats can also be used fo
drm/fourcc: Clarify the meaning of single-channel "red"
Traditionally, the first channel has been called the "red" channel, but the fourcc values for single-channel "red" formats can also be used for other single-channel formats with a direct relationship between channel value and brightness, like grayscale.
Signed-off-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Javier Martinez Canillas <[email protected]> Signed-off-by: Sam Ravnborg <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/31d1792f26707a7270347e9916b4103470d2b192.1657294931.git.geert@linux-m68k.org
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e5bd7e3e |
| 08-Jul-2022 |
Geert Uytterhoeven <[email protected]> |
drm/fourcc: Add DRM_FORMAT_C[124]
Introduce fourcc codes for color-indexed frame buffer formats with two, four, and sixteen colors, and provide a mapping from bits per pixel and depth to fourcc code
drm/fourcc: Add DRM_FORMAT_C[124]
Introduce fourcc codes for color-indexed frame buffer formats with two, four, and sixteen colors, and provide a mapping from bits per pixel and depth to fourcc codes.
As the number of bits per pixel is less than eight, these rely on proper block handling for the calculation of bits per pixel and pitch.
The fill order (the order in which multiple pixels are packed in a byte) is the same order as used for indexed-color (2, 4, and 16 colors) images in the PNG specification, Version 1.2. This order is also the recommended and default order (FillOrder = 1) for palette-color (16 colors) images in the TIFF 6.0 Specification, and is also used for 16-color Linux frame buffer logos.
Signed-off-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Pekka Paalanen <[email protected]> Reviewed-by: Javier Martinez Canillas <[email protected]> Signed-off-by: Sam Ravnborg <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/3d88ca7ad32ff3ff3469c10f0b36c312ea233a33.1657294931.git.geert@linux-m68k.org
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20b82643 |
| 21-Jun-2022 |
Carlos Llamas <[email protected]> |
drm/fourcc: fix integer type usage in uapi header
Kernel uapi headers are supposed to use __[us]{8,16,32,64} types defined by <linux/types.h> as opposed to 'uint32_t' and similar. See [1] for the re
drm/fourcc: fix integer type usage in uapi header
Kernel uapi headers are supposed to use __[us]{8,16,32,64} types defined by <linux/types.h> as opposed to 'uint32_t' and similar. See [1] for the relevant discussion about this topic. In this particular case, the usage of 'uint64_t' escaped headers_check as these macros are not being called here. However, the following program triggers a compilation error:
#include <drm/drm_fourcc.h>
int main() { unsigned long x = AMD_FMT_MOD_CLEAR(RB); return 0; }
gcc error: drm.c:5:27: error: ‘uint64_t’ undeclared (first use in this function) 5 | unsigned long x = AMD_FMT_MOD_CLEAR(RB); | ^~~~~~~~~~~~~~~~~
This patch changes AMD_FMT_MOD_{SET,CLEAR} macros to use the correct integer types, which fixes the above issue.
[1] https://lkml.org/lkml/2019/6/5/18
Fixes: 8ba16d599374 ("drm/fourcc: Add AMD DRM modifiers.") Signed-off-by: Carlos Llamas <[email protected]> Reviewed-by: Simon Ser <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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882d9031 |
| 23-Jun-2022 |
Imre Deak <[email protected]> |
drm/fourcc: Document the Intel CCS modifiers' CC plane expected pitch
The driver expects the pitch of the Intel CCS CC color planes to be 64 bytes aligned, adjust the modifier descriptions according
drm/fourcc: Document the Intel CCS modifiers' CC plane expected pitch
The driver expects the pitch of the Intel CCS CC color planes to be 64 bytes aligned, adjust the modifier descriptions accordingly.
Cc: Nanley Chery <[email protected]> Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Nanley Chery <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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3d313f09 |
| 21-Jun-2022 |
Carlos Llamas <[email protected]> |
drm/fourcc: fix integer type usage in uapi header
Kernel uapi headers are supposed to use __[us]{8,16,32,64} types defined by <linux/types.h> as opposed to 'uint32_t' and similar. See [1] for the re
drm/fourcc: fix integer type usage in uapi header
Kernel uapi headers are supposed to use __[us]{8,16,32,64} types defined by <linux/types.h> as opposed to 'uint32_t' and similar. See [1] for the relevant discussion about this topic. In this particular case, the usage of 'uint64_t' escaped headers_check as these macros are not being called here. However, the following program triggers a compilation error:
#include <drm/drm_fourcc.h>
int main() { unsigned long x = AMD_FMT_MOD_CLEAR(RB); return 0; }
gcc error: drm.c:5:27: error: ‘uint64_t’ undeclared (first use in this function) 5 | unsigned long x = AMD_FMT_MOD_CLEAR(RB); | ^~~~~~~~~~~~~~~~~
This patch changes AMD_FMT_MOD_{SET,CLEAR} macros to use the correct integer types, which fixes the above issue.
[1] https://lkml.org/lkml/2019/6/5/18
Fixes: 8ba16d599374 ("drm/fourcc: Add AMD DRM modifiers.") Signed-off-by: Carlos Llamas <[email protected]> Reviewed-by: Simon Ser <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6 |
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| #
543036a2 |
| 21-Feb-2022 |
Aurabindo Pillai <[email protected]> |
drm/amd: Add GFX11 modifiers support to AMDGPU (v3)
GFX11 IP introduces new tiling mode. Various combinations of DCC settings are possible and the most preferred settings must be exposed for optimal
drm/amd: Add GFX11 modifiers support to AMDGPU (v3)
GFX11 IP introduces new tiling mode. Various combinations of DCC settings are possible and the most preferred settings must be exposed for optimal use of the hardware.
add_gfx11_modifiers() is based on recommendation from Marek for the preferred tiling modifier that are most efficient for the hardware.
v2: microtiling fix noticed by Marek v3: keep Z tiling check
Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1 |
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| #
65187717 |
| 04-Sep-2021 |
Rob Clark <[email protected]> |
drm/fourcc: Add QCOM tiled modifiers
These are mainly used internally in mesa, although I believe the display should be able to scan out the TILED3 format. Currently we define this modifier interna
drm/fourcc: Add QCOM tiled modifiers
These are mainly used internally in mesa, although I believe the display should be able to scan out the TILED3 format. Currently we define this modifier internally in mesa for use with modifier based allocation. But we can get rid of that hack if we define the modfiers properly.
Signed-off-by: Rob Clark <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Clark <[email protected]>
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| #
9035039e |
| 11-Apr-2022 |
Mika Kahola <[email protected]> |
drm/fourcc: Introduce format modifier for DG2 clear color
DG2 clear color render compression uses Tile4 layout. Therefore, we need to define a new format modifier for uAPI to support clear color ren
drm/fourcc: Introduce format modifier for DG2 clear color
DG2 clear color render compression uses Tile4 layout. Therefore, we need to define a new format modifier for uAPI to support clear color rendering.
v2: Display version is fixed. [Imre] KDoc is enhanced for cc modifier. [Nanley & Lionel] v3: Split out the modifier addition to a separate patch. Clarify the modifier layout description.
Cc: [email protected] Signed-off-by: Mika Kahola <[email protected]> cc: Anshuman Gupta <[email protected]> Signed-off-by: Juha-Pekka Heikkilä <[email protected]> Signed-off-by: Ramalingam C <[email protected]> Signed-off-by: Imre Deak <[email protected]> Acked-by: Nanley Chery <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]> Acked-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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764b2668 |
| 11-Apr-2022 |
Matt Roper <[email protected]> |
drm/fourcc: Introduce format modifiers for DG2 render and media compression
The render/media engines on DG2 unify render compression and media compression into a single format for the first time, us
drm/fourcc: Introduce format modifiers for DG2 render and media compression
The render/media engines on DG2 unify render compression and media compression into a single format for the first time, using the Tile 4 layout for main surfaces. The compression algorithm is different from any previous platform and the display engine must still be configured to decompress either a render or media compressed surface; as such, we need new RC and MC framebuffer modifiers to represent buffers in this format.
v2: Clarify modifier layout description.
Cc: [email protected] Signed-off-by: Matt Roper <[email protected]> Signed-off-by: Imre Deak <[email protected]> Acked-by: Nanley Chery <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]> Acked-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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c6e7deb0 |
| 18-Jan-2022 |
Stanislav Lisovskiy <[email protected]> |
drm/i915: Introduce new Tile 4 format
This tiling layout uses 4KB tiles in a row-major layout. It has the same shape as Tile Y at two granularities: 4KB (128B x 32) and 64B (16B x 4). It only differ
drm/i915: Introduce new Tile 4 format
This tiling layout uses 4KB tiles in a row-major layout. It has the same shape as Tile Y at two granularities: 4KB (128B x 32) and 64B (16B x 4). It only differs from Tile Y at the 256B granularity in between. At this granularity, Tile Y has a shape of 16B x 32 rows, but this tiling has a shape of 64B x 8 rows.
Reviewed-by: Imre Deak <[email protected]> Acked-by: Nanley Chery <[email protected]> Signed-off-by: Stanislav Lisovskiy <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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