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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2 |
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| #
aafe181f |
| 27-May-2024 |
Asad Kamal <[email protected]> |
drm/amdgpu: Add flags to distinguish vf/pf/pt mode
Add extra flag definition for ids_flag field to distinguish between vf/pf/pt modes
v2: Updated kms driver minor version & removed pf check as defa
drm/amdgpu: Add flags to distinguish vf/pf/pt mode
Add extra flag definition for ids_flag field to distinguish between vf/pf/pt modes
v2: Updated kms driver minor version & removed pf check as default is 0 v3: Fix up version (Alex) v4: rebase (Alex)
Proposed userspace: https://github.com/ROCm/amdsmi/commit/e663bed7d6b3df79f5959e73981749b1f22ec698
Signed-off-by: Asad Kamal <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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2255b40c |
| 24-Jan-2025 |
Marek Olšák <[email protected]> |
drm/amdgpu: add a BO metadata flag to disable write compression for Vulkan
Vulkan can't support DCC and Z/S compression on GFX12 without WRITE_COMPRESS_DISABLE in this commit or a completely differe
drm/amdgpu: add a BO metadata flag to disable write compression for Vulkan
Vulkan can't support DCC and Z/S compression on GFX12 without WRITE_COMPRESS_DISABLE in this commit or a completely different DCC interface.
AMDGPU_TILING_GFX12_SCANOUT is added because it's already used by userspace.
Cc: [email protected] # 6.12.x Signed-off-by: Marek Olšák <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1 |
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73e1d104 |
| 29-Apr-2023 |
Marek Olšák <[email protected]> |
drm/amdgpu: define new gfx12 uapi flags
define new gfx12 uapi flags
Signed-off-by: Marek Olšák <[email protected]> Acked-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <ale
drm/amdgpu: define new gfx12 uapi flags
define new gfx12 uapi flags
Signed-off-by: Marek Olšák <[email protected]> Acked-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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ef283674 |
| 22-Apr-2024 |
Ville Syrjälä <[email protected]> |
drm/uapi: Move drm_color_ctm_3x4 out from drm_mode.h
drm_color_ctm_3x4 is some undocumented amgdpu private uapi and thus has no business being in drm_mode.h. At least move it to some amdgpu specific
drm/uapi: Move drm_color_ctm_3x4 out from drm_mode.h
drm_color_ctm_3x4 is some undocumented amgdpu private uapi and thus has no business being in drm_mode.h. At least move it to some amdgpu specific header, albeit with the wrong namespace as maybe something somewhere is using this already?
Cc: Harry Wentland <[email protected]> Cc: Joshua Ashton <[email protected]> Cc: Alex Deucher <[email protected]> Fixes: 6872a189be50 ("drm/amd/display: Add 3x4 CTM support for plane CTM") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Harry Wentland <[email protected]>
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Revision tags: v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2 |
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226e4ca5 |
| 13-Feb-2023 |
Likun Gao <[email protected]> |
drm/amdgpu: Add gfx v12_0_0 family id
Add gfx v12_0_0 family id
Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <alexande
drm/amdgpu: Add gfx v12_0_0 family id
Add gfx v12_0_0 family id
Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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7d09d80b |
| 19-Apr-2024 |
Aurabindo Pillai <[email protected]> |
drm/amd: define new gfx12 uapi flags
define new gfx12 uapi flags
Signed-off-by: Marek Olšák <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Hawking Zhang
drm/amd: define new gfx12 uapi flags
define new gfx12 uapi flags
Signed-off-by: Marek Olšák <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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d3f452f3 |
| 02-Oct-2023 |
Alex Deucher <[email protected]> |
drm/amdgpu: add new INFO IOCTL query for input power
Some chips provide both average and input power. Previously we just exposed average power, add a new query for input power.
Example userspace:
drm/amdgpu: add new INFO IOCTL query for input power
Some chips provide both average and input power. Previously we just exposed average power, add a new query for input power.
Example userspace: https://github.com/Umio-Yasuno/libdrm-amdgpu-sys-rs/tree/input_power
Reviewed-by: Yang Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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0029e4d4 |
| 02-Oct-2023 |
Randy Dunlap <[email protected]> |
drm/amdgpu: amdgpu_drm.h: fix comment typos
Correct typos of "occurred".
Signed-off-by: Randy Dunlap <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Christian König <christ
drm/amdgpu: amdgpu_drm.h: fix comment typos
Correct typos of "occurred".
Signed-off-by: Randy Dunlap <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Christian König <[email protected]> Cc: "Pan, Xinhui" <[email protected]> Cc: [email protected] Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9 |
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7a41ed8b |
| 06-Oct-2020 |
Alex Deucher <[email protected]> |
drm/amdgpu: add new INFO ioctl query for the last GPU page fault
Add a interface to query the last GPU page fault for the process. Useful for debugging context lost errors.
v2: split vmhub represen
drm/amdgpu: add new INFO ioctl query for the last GPU page fault
Add a interface to query the last GPU page fault for the process. Useful for debugging context lost errors.
v2: split vmhub representation between kernel and userspace v3: add locking when fetching fault info in INFO IOCTL
Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238 libdrm MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238
Cc: [email protected] Reviewed-by: Christian König <[email protected]> Acked-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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5f248462 |
| 21-Jul-2023 |
David Francis <[email protected]> |
drm/amdgpu: Add EXT_COHERENT memory allocation flags
These flags (for GEM and SVM allocations) allocate memory that allows for system-scope atomic semantics.
On GFX943 these flags cause caches to b
drm/amdgpu: Add EXT_COHERENT memory allocation flags
These flags (for GEM and SVM allocations) allocate memory that allows for system-scope atomic semantics.
On GFX943 these flags cause caches to be avoided on non-local memory.
On all other ASICs they are identical in functionality to the equivalent COHERENT flags.
Corresponding Thunk patch is at https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/pull/88
Reviewed-by: David Yat Sin <[email protected]> Signed-off-by: David Francis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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5f6e9cdc |
| 31-May-2023 |
Lang Yu <[email protected]> |
drm/amdgpu: add VPE FW version query support
Add support to query VPE FW version.
Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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f6523900 |
| 23-Apr-2022 |
Huang Rui <[email protected]> |
drm/amdgpu: add VPE HW IP definition
Add HW IP for Video Processing Engine to support user space CS.
Signed-off-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <alexander.deucher@amd.
drm/amdgpu: add VPE HW IP definition
Add HW IP for Video Processing Engine to support user space CS.
Signed-off-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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2c8a7ca1 |
| 14-Jul-2023 |
Prike Liang <[email protected]> |
drm/amdgpu: add new AMDGPU_FAMILY definition
add GC 11.5.0 family
Signed-off-by: Prike Liang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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89927235 |
| 20-Sep-2022 |
Alex Deucher <[email protected]> |
drm/amdgpu: add UAPI for allocating doorbell memory
This patch adds flags for a new gem domain AMDGPU_GEM_DOMAIN_DOORBELL in the UAPI layer.
V2: Drop 'memory' from description (Christian)
Cc: Alex
drm/amdgpu: add UAPI for allocating doorbell memory
This patch adds flags for a new gem domain AMDGPU_GEM_DOMAIN_DOORBELL in the UAPI layer.
V2: Drop 'memory' from description (Christian)
Cc: Alex Deucher <[email protected]> Cc: Christian Koenig <[email protected]> Reviewed-by: Christian Koenig <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Shashank Sharma <[email protected]>
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489763af |
| 24-Apr-2023 |
Pierre-Eric Pelloux-Prayer <[email protected]> |
drm/amdgpu: add new flag to AMDGPU_CTX_QUERY2
OpenGL EXT_robustness extension expects the driver to stop reporting GUILTY_CONTEXT_RESET when the reset has completed and the GPU is ready to accept su
drm/amdgpu: add new flag to AMDGPU_CTX_QUERY2
OpenGL EXT_robustness extension expects the driver to stop reporting GUILTY_CONTEXT_RESET when the reset has completed and the GPU is ready to accept submission again.
This commit adds a AMDGPU_CTX_QUERY2_FLAGS_RESET_IN_PROGRESS flag, that let the UMD know that the reset is still not finished.
Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290
Reviewed-by: Christian König <[email protected]> Reviewed-by: André Almeida <[email protected]> Signed-off-by: Pierre-Eric Pelloux-Prayer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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edd90380 |
| 09-Mar-2023 |
Alex Deucher <[email protected]> |
drm/amdgpu: add UAPI to query GFX shadow sizes
Add UAPI to query the GFX shadow buffer requirements for preemption on GFX11. UMDs need to specify the shadow areas for preemption.
v2: move into exi
drm/amdgpu: add UAPI to query GFX shadow sizes
Add UAPI to query the GFX shadow buffer requirements for preemption on GFX11. UMDs need to specify the shadow areas for preemption.
v2: move into existing asic info query drop GDS as its use is determined by the UMD (Marek) v3: Update comments to note that alignment is base virtual alignment (Alex)
Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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043dc33f |
| 09-Mar-2023 |
Alex Deucher <[email protected]> |
drm/amdgpu/UAPI: add new CS chunk for GFX shadow buffers
For GFX11, the UMD needs to allocate some shadow buffers to be used for preemption. The UMD allocates the buffers and passes the GPU virtual
drm/amdgpu/UAPI: add new CS chunk for GFX shadow buffers
For GFX11, the UMD needs to allocate some shadow buffers to be used for preemption. The UMD allocates the buffers and passes the GPU virtual address to the kernel since the kernel will program the packet that specified these addresses as part of its IB submission frame.
v2: UMD passes shadow init to tell kernel when to initialize the shadow
Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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4f18b9a6 |
| 13-Apr-2023 |
Bas Nieuwenhuizen <[email protected]> |
drm/amdgpu: Add support for querying the max ibs in a submission. (v3)
This info would be used by radv to figure out when we need to split a submission into multiple submissions. radv currently has
drm/amdgpu: Add support for querying the max ibs in a submission. (v3)
This info would be used by radv to figure out when we need to split a submission into multiple submissions. radv currently has a limit of 192 which seems to work for most gfx submissions, but is way too high for e.g. compute or sdma.
Userspace is available at https://gitlab.freedesktop.org/bnieuwenhuizen/mesa/-/commits/ib-rejection-v3
v3: Completely rewrote based on suggestion of making it a separate query.
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2498 Reviewed-by: Christian König <[email protected]> Signed-off-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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b299221f |
| 30-Jan-2023 |
Marek Olšák <[email protected]> |
drm/amdgpu: add more fields into device info, caches sizes, etc.
AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD: important for conformance on gfx11 Other fields are exposed from IP discovery. enabled_rb_pi
drm/amdgpu: add more fields into device info, caches sizes, etc.
AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD: important for conformance on gfx11 Other fields are exposed from IP discovery. enabled_rb_pipes_mask_hi is added for future chips, currently 0.
Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21403
Signed-off-by: Marek Olšák <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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e3e84b0a |
| 24-Dec-2022 |
Marek Olšák <[email protected]> |
drm/amdgpu: return the PCIe gen and lanes from the INFO ioctl
For computing PCIe bandwidth in userspace and troubleshooting PCIe bandwidth issues. Note that this intentionally fills holes and paddin
drm/amdgpu: return the PCIe gen and lanes from the INFO ioctl
For computing PCIe bandwidth in userspace and troubleshooting PCIe bandwidth issues. Note that this intentionally fills holes and padding in drm_amdgpu_info_device.
Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20790
Signed-off-by: Marek Olšák <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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88347fa1 |
| 05-Dec-2022 |
Evan Quan <[email protected]> |
drm/amdgpu: expose the minimum shader/memory clock frequency
Otherwise, some UMD tools will treate them as 0 at default while actually they are not.
Signed-off-by: Evan Quan <[email protected]> Rev
drm/amdgpu: expose the minimum shader/memory clock frequency
Otherwise, some UMD tools will treate them as 0 at default while actually they are not.
Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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5cfd9784 |
| 05-Dec-2022 |
Evan Quan <[email protected]> |
drm/amdgpu: expose peak profiling mode shader/memory clocks
Expose those informations to UMD who need them as for standard profiling mode.
Signed-off-by: Evan Quan <[email protected]> Reviewed-by:
drm/amdgpu: expose peak profiling mode shader/memory clocks
Expose those informations to UMD who need them as for standard profiling mode.
Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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d1a372af |
| 26-Aug-2022 |
Felix Kuehling <[email protected]> |
drm/amdgpu: Set MTYPE in PTE based on BO flags
The same BO may need different MTYPEs and SNOOP flags in PTEs depending on its current location relative to the mapping GPU. Setting MTYPEs from client
drm/amdgpu: Set MTYPE in PTE based on BO flags
The same BO may need different MTYPEs and SNOOP flags in PTEs depending on its current location relative to the mapping GPU. Setting MTYPEs from clients ahead of time is not practical for coherent memory sharing. Instead determine the correct MTYPE for the desired coherence model and current BO location when updating the page tables.
To maintain backwards compatibility with MTYPE-selection in AMDGPU_VA_OP_MAP, the coherence-model-based MTYPE selection is only applied if it chooses an MTYPE other than MTYPE_NC (the default).
Add two AMDGPU_GEM_CREATE_... flags to indicate the coherence model. The default if no flag is specified is non-coherent (i.e. coarse-grained coherent at dispatch boundaries).
Update amdgpu_amdkfd_gpuvm.c to use this new method to choose the correct MTYPE depending on the current memory location.
v2: * check that bo is not NULL (e.g. PRT mappings) * Fix missing ~ bitmask in gmc_v11_0.c v3: * squash in "drm/amdgpu: Inherit coherence flags on dmabuf import"
Suggested-by: Christian König <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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68bc1473 |
| 16-Sep-2022 |
David Francis <[email protected]> |
drm/amd: Add IMU fw version to fw version queries
IMU is a new firmware for GFX11.
There are four means by which firmware version can be queried from the driver: device attributes, vf2pf, debugfs,
drm/amd: Add IMU fw version to fw version queries
IMU is a new firmware for GFX11.
There are four means by which firmware version can be queried from the driver: device attributes, vf2pf, debugfs, and the AMDGPU_INFO_FW_VERSION option in the amdgpu info ioctl.
Add IMU as an option for those four methods.
V2: Added debugfs
Reviewed-by: Likun Gao <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: David Francis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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b7236296 |
| 16-Sep-2022 |
David Francis <[email protected]> |
drm/amd: Add IMU fw version to fw version queries
IMU is a new firmware for GFX11.
There are four means by which firmware version can be queried from the driver: device attributes, vf2pf, debugfs,
drm/amd: Add IMU fw version to fw version queries
IMU is a new firmware for GFX11.
There are four means by which firmware version can be queried from the driver: device attributes, vf2pf, debugfs, and the AMDGPU_INFO_FW_VERSION option in the amdgpu info ioctl.
Add IMU as an option for those four methods.
V2: Added debugfs
Reviewed-by: Likun Gao <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: David Francis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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