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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11 |
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5ed771f1 |
| 11-Sep-2024 |
Nick Chan <[email protected]> |
tty: serial: samsung: Fix serial rx on Apple A7-A9
Apple's older A7-A9 SoCs seems to use bit 3 in UTRSTAT as RXTO, which is enabled by bit 11 in UCON.
Access these bits in addition to the original
tty: serial: samsung: Fix serial rx on Apple A7-A9
Apple's older A7-A9 SoCs seems to use bit 3 in UTRSTAT as RXTO, which is enabled by bit 11 in UCON.
Access these bits in addition to the original RXTO and RXTO enable bits, to allow serial rx to function on A7-A9 SoCs. This change does not appear to affect the A10 SoC and up.
Tested-by: Janne Grunau <[email protected]> Reviewed-by: Neal Gompa <[email protected]> Signed-off-by: Nick Chan <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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4c59c59e |
| 11-Sep-2024 |
Nick Chan <[email protected]> |
tty: serial: samsung: Use bit manipulation macros for APPLE_S5L_*
New entries using BIT() will be added soon, so change the existing ones to use bit manipulation macros including BIT() and GENMASK()
tty: serial: samsung: Use bit manipulation macros for APPLE_S5L_*
New entries using BIT() will be added soon, so change the existing ones to use bit manipulation macros including BIT() and GENMASK() for consistency.
Suggested-by: Krzysztof Kozlowski <[email protected]> Tested-by: Janne Grunau <[email protected]> Reviewed-by: Neal Gompa <[email protected]> Signed-off-by: Nick Chan <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5 |
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72a43046 |
| 29-Jun-2022 |
Chanho Park <[email protected]> |
tty: serial: samsung_tty: loopback mode support
Internal loopback mode can be supported by setting UCON register's Loopback Mode bit. The mode & bit can be supported since s3c2410 and later SoCs. Th
tty: serial: samsung_tty: loopback mode support
Internal loopback mode can be supported by setting UCON register's Loopback Mode bit. The mode & bit can be supported since s3c2410 and later SoCs. The prefix of LOOPBACK / BIT(5) naming should be also changed to S3C2410_ in order to avoid confusion.
Reviewed-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Signed-off-by: Chanho Park <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6 |
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135c579d |
| 02-May-2022 |
Hector Martin <[email protected]> |
tty: serial: samsung_tty: Fix suspend/resume on S5L
We were restoring the IRQ masks then clearing them again, because ucon_mask wasn't set properly. Adding that makes suspend/resume work as intended
tty: serial: samsung_tty: Fix suspend/resume on S5L
We were restoring the IRQ masks then clearing them again, because ucon_mask wasn't set properly. Adding that makes suspend/resume work as intended.
Signed-off-by: Hector Martin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4 |
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59f37b73 |
| 04-Dec-2021 |
Sam Protsenko <[email protected]> |
tty: serial: samsung: Remove USI initialization
USI control is now extracted to the dedicated USI driver. Remove USI related code from serial driver to avoid conflicts and code duplication.
Signed-
tty: serial: samsung: Remove USI initialization
USI control is now extracted to the dedicated USI driver. Remove USI related code from serial driver to avoid conflicts and code duplication.
Signed-off-by: Sam Protsenko <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6 |
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920792aa |
| 11-Aug-2021 |
Sam Protsenko <[email protected]> |
tty: serial: samsung: Init USI to keep clocks running
UART block is a part of USI (Universal Serial Interface) IP-core in Samsung SoCs since Exynos9810 (e.g. in Exynos850). USI allows one to enable
tty: serial: samsung: Init USI to keep clocks running
UART block is a part of USI (Universal Serial Interface) IP-core in Samsung SoCs since Exynos9810 (e.g. in Exynos850). USI allows one to enable one of three types of serial interface: UART, SPI or I2C. That's possible because USI shares almost all internal circuits within each protocol. USI also provides some additional registers so it's possible to configure it.
One USI register called USI_OPTION has reset value of 0x0. Because of this the clock gating behavior is controlled by hardware (HWACG = Hardware Auto Clock Gating), which simply means the serial won't work after reset as is. In order to make it work, USI_OPTION[2:1] bits must be set to 0b01, so that HWACG is controlled manually (by software). Bits meaning: - CLKREQ_ON = 1: clock is continuously provided to IP - CLKSTOP_ON = 0: drive IP_CLKREQ to High (needs to be set along with CLKREQ_ON = 1)
USI is not present on older chips, like s3c2410, s3c2412, s3c2440, s3c6400, s5pv210, exynos5433, exynos4210. So the new boolean field '.has_usi' was added to struct s3c24xx_uart_info. USI registers will be only actually accessed when '.has_usi' field is set to "1".
This feature is needed for further serial enablement on Exynos850, but some other new Exynos chips (like Exynos9810) may benefit from this feature as well.
Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Sam Protsenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2 |
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fcbba344 |
| 04-Mar-2021 |
Hector Martin <[email protected]> |
tty: serial: samsung_tty: Add support for Apple UARTs
Apple SoCs are a distant descendant of Samsung designs and use yet another variant of their UART style, with different interrupt handling.
In p
tty: serial: samsung_tty: Add support for Apple UARTs
Apple SoCs are a distant descendant of Samsung designs and use yet another variant of their UART style, with different interrupt handling.
In particular, this variant has the following differences with existing ones:
* It includes a built-in interrupt controller with different registers, using only a single platform IRQ
* Internal interrupt sources are treated as edge-triggered, even though the IRQ output is level-triggered. This chiefly affects the TX IRQ path: the driver can no longer rely on the TX buffer empty IRQ immediately firing after TX is enabled, but instead must prime the FIFO with data directly.
Signed-off-by: Hector Martin <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Tested-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5 |
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3ebc0ef0 |
| 11-Sep-2020 |
Krzysztof Kozlowski <[email protected]> |
serial: s3c: Update path of Samsung S3C machine file
Correct the path to Samsung S3C24xx machine file, mentioned in documentation.
Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https:/
serial: s3c: Update path of Samsung S3C machine file
Correct the path to Samsung S3C24xx machine file, mentioned in documentation.
Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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Revision tags: v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3, v5.2-rc2, v5.2-rc1, v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5, v5.1-rc4, v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6, v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20, v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1, v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6, v4.19-rc5, v4.19-rc4, v4.19-rc3, v4.19-rc2, v4.19-rc1, v4.18, v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4, v4.18-rc3, v4.18-rc2, v4.18-rc1, v4.17, v4.17-rc7, v4.17-rc6, v4.17-rc5, v4.17-rc4, v4.17-rc3, v4.17-rc2, v4.17-rc1, v4.16, v4.16-rc7, v4.16-rc6, v4.16-rc5, v4.16-rc4, v4.16-rc3, v4.16-rc2, v4.16-rc1, v4.15, v4.15-rc9, v4.15-rc8 |
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f947153f |
| 09-Jan-2018 |
Krzysztof Kozlowski <[email protected]> |
ARM: EXYNOS: Add SPDX license identifiers
Replace GPL license statements with SPDX GPL-2.0 and GPL-2.0+ license identifiers.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
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Revision tags: v4.15-rc7, v4.15-rc6, v4.15-rc5, v4.15-rc4, v4.15-rc3, v4.15-rc2, v4.15-rc1, v4.14, v4.14-rc8, v4.14-rc7, v4.14-rc6, v4.14-rc5, v4.14-rc4, v4.14-rc3, v4.14-rc2, v4.14-rc1, v4.13, v4.13-rc7, v4.13-rc6, v4.13-rc5, v4.13-rc4, v4.13-rc3, v4.13-rc2, v4.13-rc1, v4.12, v4.12-rc7, v4.12-rc6, v4.12-rc5, v4.12-rc4, v4.12-rc3, v4.12-rc2, v4.12-rc1, v4.11, v4.11-rc8, v4.11-rc7, v4.11-rc6, v4.11-rc5, v4.11-rc4, v4.11-rc3, v4.11-rc2, v4.11-rc1, v4.10, v4.10-rc8, v4.10-rc7, v4.10-rc6, v4.10-rc5, v4.10-rc4, v4.10-rc3, v4.10-rc2, v4.10-rc1, v4.9, v4.9-rc8, v4.9-rc7, v4.9-rc6, v4.9-rc5, v4.9-rc4, v4.9-rc3, v4.9-rc2, v4.9-rc1, v4.8, v4.8-rc8, v4.8-rc7, v4.8-rc6, v4.8-rc5, v4.8-rc4, v4.8-rc3, v4.8-rc2, v4.8-rc1, v4.7, v4.7-rc7, v4.7-rc6, v4.7-rc5, v4.7-rc4, v4.7-rc3, v4.7-rc2, v4.7-rc1, v4.6, v4.6-rc7, v4.6-rc6, v4.6-rc5, v4.6-rc4, v4.6-rc3, v4.6-rc2, v4.6-rc1, v4.5, v4.5-rc7, v4.5-rc6, v4.5-rc5, v4.5-rc4, v4.5-rc3, v4.5-rc2, v4.5-rc1, v4.4, v4.4-rc8, v4.4-rc7, v4.4-rc6, v4.4-rc5, v4.4-rc4, v4.4-rc3, v4.4-rc2, v4.4-rc1, v4.3, v4.3-rc7, v4.3-rc6, v4.3-rc5, v4.3-rc4, v4.3-rc3, v4.3-rc2, v4.3-rc1, v4.2, v4.2-rc8, v4.2-rc7, v4.2-rc6, v4.2-rc5, v4.2-rc4, v4.2-rc3, v4.2-rc2, v4.2-rc1, v4.1, v4.1-rc8, v4.1-rc7, v4.1-rc6, v4.1-rc5, v4.1-rc4, v4.1-rc3, v4.1-rc2, v4.1-rc1, v4.0, v4.0-rc7, v4.0-rc6, v4.0-rc5, v4.0-rc4, v4.0-rc3, v4.0-rc2, v4.0-rc1, v3.19, v3.19-rc7, v3.19-rc6, v3.19-rc5, v3.19-rc4, v3.19-rc3, v3.19-rc2, v3.19-rc1 |
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a291b7d5 |
| 10-Dec-2014 |
Robert Baldyga <[email protected]> |
serial: s3c: add missing register definitions
This macro definitions are necessary to implement DMA transfers is samsung serial driver.
Based on previous work of Sylwester Nawrocki and Lukasz Czerw
serial: s3c: add missing register definitions
This macro definitions are necessary to implement DMA transfers is samsung serial driver.
Based on previous work of Sylwester Nawrocki and Lukasz Czerwinski.
Signed-off-by: Robert Baldyga <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v3.18, v3.18-rc7, v3.18-rc6, v3.18-rc5, v3.18-rc4, v3.18-rc3, v3.18-rc2, v3.18-rc1, v3.17, v3.17-rc7, v3.17-rc6, v3.17-rc5, v3.17-rc4, v3.17-rc3, v3.17-rc2, v3.17-rc1, v3.16, v3.16-rc7, v3.16-rc6, v3.16-rc5, v3.16-rc4, v3.16-rc3, v3.16-rc2, v3.16-rc1, v3.15, v3.15-rc8, v3.15-rc7, v3.15-rc6, v3.15-rc5, v3.15-rc4, v3.15-rc3, v3.15-rc2, v3.15-rc1, v3.14, v3.14-rc8 |
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cf559ab9 |
| 20-Mar-2014 |
Mark Brown <[email protected]> |
serial: s3c: Fix build of header without serial_core.h preinclusion
serial_s3c.h uses upf_t which is defined in serial_core.h but does not include that itself meaning that users which include serial
serial: s3c: Fix build of header without serial_core.h preinclusion
serial_s3c.h uses upf_t which is defined in serial_core.h but does not include that itself meaning that users which include serial_s3c.h by itself don't build.
Signed-off-by: Mark Brown <[email protected]> [t.figa: Moved inclusion under #ifndef __ASSEMBLY__ to fix mach-exynos] Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
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Revision tags: v3.14-rc7, v3.14-rc6, v3.14-rc5, v3.14-rc4, v3.14-rc3, v3.14-rc2, v3.14-rc1, v3.13, v3.13-rc8, v3.13-rc7, v3.13-rc6, v3.13-rc5, v3.13-rc4, v3.13-rc3, v3.13-rc2, v3.13-rc1, v3.12, v3.12-rc7, v3.12-rc6, v3.12-rc5, v3.12-rc4, v3.12-rc3, v3.12-rc2, v3.12-rc1, v3.11, v3.11-rc7, v3.11-rc6, v3.11-rc5, v3.11-rc4, v3.11-rc3, v3.11-rc2, v3.11-rc1, v3.10, v3.10-rc7, v3.10-rc6, v3.10-rc5, v3.10-rc4, v3.10-rc3, v3.10-rc2, v3.10-rc1, v3.9, v3.9-rc8, v3.9-rc7 |
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9ee51f01 |
| 11-Apr-2013 |
Arnd Bergmann <[email protected]> |
tty: serial/samsung: make register definitions global
The registers for the Samsung S3C serial port are currently defined in the platform specific arch/arm/plat-samsung/include/plat/regs-serial.h fi
tty: serial/samsung: make register definitions global
The registers for the Samsung S3C serial port are currently defined in the platform specific arch/arm/plat-samsung/include/plat/regs-serial.h file, which is not visible to multiplatform capable drivers.
Unfortunately, it is not possible to move the file into a more local place as we should normally try to, because the same registers may be used in one of four places:
* In the driver itself * In platform-independent ARM code for early debug output * In platform_data definitions * In the Samsung platform power management code
I have also found no way to logically split out a platform_data file, other than possibly move everything into include/linux/platform_data, which also felt wrong. The only part of this file that makes sense to keep specific to the s3c24xx platform are the virtual and physical addresses defined here, which are needed in no other location.
Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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