memory: omap-gpmc: Use a compatible match table when checking for NAND controller

As more compatibles can be added to the GPMC NAND controller driver
use a compatible match table.

Signed-off-by: Ro

memory: omap-gpmc: Use a compatible match table when checking for NAND controller

As more compatibles can be added to the GPMC NAND controller driver
use a compatible match table.

Signed-off-by: Roger Quadros <[email protected]>
Acked-by: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[krzysztof: remove "is_nand" variable]
Signed-off-by: Krzysztof Kozlowski <[email protected]>

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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

Based on 2 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of th

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

Based on 2 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Enrico Weigelt <[email protected]>
Reviewed-by: Kate Stewart <[email protected]>
Reviewed-by: Allison Randal <[email protected]>
Cc: [email protected]
Link: https://lkml.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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memory: omap-gpmc: Drop gpmc_status

This field is no longer used, drop it.

Signed-off-by: Ladislav Michl <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>

mtd: nand: omap2: Remove omap_nand_platform_data

As driver is now configured using DT, omap_nand_platform_data structure
is no longer needed.

Signed-off-by: Ladislav Michl <[email protected]>
Ac

mtd: nand: omap2: Remove omap_nand_platform_data

As driver is now configured using DT, omap_nand_platform_data structure
is no longer needed.

Signed-off-by: Ladislav Michl <[email protected]>
Acked-by: Roger Quadros <[email protected]>
Signed-off-by: Boris Brezillon <[email protected]>

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mtd: nand: omap2: Implement NAND ready using gpiolib

The GPMC WAIT pin status are now available over gpiolib.
Update the omap_dev_ready() function to use gpio instead of
directly accessing GPMC regi

mtd: nand: omap2: Implement NAND ready using gpiolib

The GPMC WAIT pin status are now available over gpiolib.
Update the omap_dev_ready() function to use gpio instead of
directly accessing GPMC register space.

Signed-off-by: Roger Quadros <[email protected]>
Acked-by: Brian Norris <[email protected]>
Acked-by: Boris Brezillon <[email protected]>
Acked-by: Tony Lindgren <[email protected]>

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memory: omap-gpmc: Prevent GPMC_STATUS from being accessed via gpmc_regs

GPMC_STATUS register is private to the GPMC module and must not be
accessed directly by NAND driver through the gpmc_regs.

T

memory: omap-gpmc: Prevent GPMC_STATUS from being accessed via gpmc_regs

GPMC_STATUS register is private to the GPMC module and must not be
accessed directly by NAND driver through the gpmc_regs.

They must use gpmc_omap_get_nand_ops() instead.

Signed-off-by: Roger Quadros <[email protected]>
Acked-by: Tony Lindgren <[email protected]>

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mtd: nand: omap: Clean up device tree support

Move NAND specific device tree parsing to NAND driver.

The NAND controller node must have a compatible id, register space
resource and interrupt resour

mtd: nand: omap: Clean up device tree support

Move NAND specific device tree parsing to NAND driver.

The NAND controller node must have a compatible id, register space
resource and interrupt resource.

Signed-off-by: Roger Quadros <[email protected]>
Acked-by: Brian Norris <[email protected]>
Acked-by: Tony Lindgren <[email protected]>

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mtd: nand: omap: Use gpmc_omap_get_nand_ops() to get NAND registers

Deprecate nand register passing via platform data and use
gpmc_omap_get_nand_ops() instead.

Signed-off-by: Roger Quadros <rogerq@

mtd: nand: omap: Use gpmc_omap_get_nand_ops() to get NAND registers

Deprecate nand register passing via platform data and use
gpmc_omap_get_nand_ops() instead.

Signed-off-by: Roger Quadros <[email protected]>
Acked-by: Brian Norris <[email protected]>
Acked-by: Tony Lindgren <[email protected]>

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nand: omap2: Add support for flash-based bad block table

This commit adds a new platform-data boolean property that enables use
of a flash-based bad block table. This can also be enabled by setting

nand: omap2: Add support for flash-based bad block table

This commit adds a new platform-data boolean property that enables use
of a flash-based bad block table. This can also be enabled by setting
the 'nand-on-flash-bbt' devicetree property.

If the flash BBT is not enabled, the driver falls back to use OOB
bad block markers only, as before. If the flash BBT is enabled the
kernel will keep track of bad blocks using a BBT, in addition to
the OOB markers.

As explained by Brian Norris the reasons for using a BBT are:

""
The primary reason would be that NAND datasheets specify it these days.
A better argument is that nobody guarantees that you can write a
bad block marker to a worn out block; you may just get program failures.

This has been acknowledged by several developers over the last several
years.

Additionally, you get a boot-time performance improvement if you only
have to read a few pages, instead of a page or two from every block on
the flash.
""

Signed-off-by: Ezequiel Garcia <[email protected]>
Acked-by: Roger Quadros <[email protected]>
Signed-off-by: Brian Norris <[email protected]>

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mtd: nand: omap: Revert to using software ECC by default

For v3.12 and prior, 1-bit Hamming code ECC via software was the
default choice. Commit c66d039197e4 in v3.13 changed the behaviour
to use 1-

mtd: nand: omap: Revert to using software ECC by default

For v3.12 and prior, 1-bit Hamming code ECC via software was the
default choice. Commit c66d039197e4 in v3.13 changed the behaviour
to use 1-bit Hamming code via Hardware using a different ECC layout
i.e. (ROM code layout) than what is used by software ECC.

This ECC layout change causes NAND filesystems created in v3.12
and prior to be unusable in v3.13 and later. So revert back to
using software ECC by default if an ECC scheme is not explicitely
specified.

This defect can be observed on the following boards during legacy boot

-omap3beagle
-omap3touchbook
-overo
-am3517crane
-devkit8000
-ldp
-3430sdp

Signed-off-by: Roger Quadros <[email protected]>
Tested-by: Grazvydas Ignotas <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>

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mtd: nand: omap: add support for BCH16_ECC - GPMC driver updates

This patch add support for BCH16_ECC in GPMC (controller) driver:
- extends configuration space to include BCH16 registers
- extends

mtd: nand: omap: add support for BCH16_ECC - GPMC driver updates

This patch add support for BCH16_ECC in GPMC (controller) driver:
- extends configuration space to include BCH16 registers
- extends parsing of DT binding for selecting BCH16 ecc-scheme

Signed-off-by: Pekon Gupta <[email protected]>
Acked-by: Tony Lindgren <[email protected]>
Signed-off-by: Brian Norris <[email protected]>

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mtd: omap2: Cleanup header files

Commit 2203747c9771 ("ARM: omap: move platform_data definitions")
moved the files to the current location but forgot to remove the pointer
to its previous location.

mtd: omap2: Cleanup header files

Commit 2203747c9771 ("ARM: omap: move platform_data definitions")
moved the files to the current location but forgot to remove the pointer
to its previous location. Clean it up.

Signed-off-by: Sachin Kamat <[email protected]>
Acked-by: Pekon Gupta <[email protected]>
Signed-off-by: Brian Norris <[email protected]>

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mtd: nand: omap: combine different flavours of 1-bit hamming ecc schemes

OMAP NAND driver currently supports multiple flavours of 1-bit Hamming
ecc-scheme, like:
- OMAP_ECC_HAMMING_CODE_DEFAULT
1-b

mtd: nand: omap: combine different flavours of 1-bit hamming ecc schemes

OMAP NAND driver currently supports multiple flavours of 1-bit Hamming
ecc-scheme, like:
- OMAP_ECC_HAMMING_CODE_DEFAULT
1-bit hamming ecc code using software library
- OMAP_ECC_HAMMING_CODE_HW
1-bit hamming ecc-code using GPMC h/w engine
- OMAP_ECC_HAMMING_CODE_HW_ROMCODE
1-bit hamming ecc-code using GPMC h/w engin with ecc-layout compatible
to ROM code.

This patch combines above multiple ecc-schemes into single implementation:
- OMAP_ECC_HAM1_CODE_HW
1-bit hamming ecc-code using GPMC h/w engine with ROM-code compatible
ecc-layout.

Signed-off-by: Pekon Gupta <[email protected]>
Reviewed-by: Felipe Balbi <[email protected]>
Acked-by: Tony Lindgren <[email protected]>
Tested-by: Ezequiel Garcia <[email protected]>
Signed-off-by: Brian Norris <[email protected]>

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ARM: OMAP2+: cleaned-up DT support of various ECC schemes

OMAP NAND driver support multiple ECC scheme, which can used in different
flavours, depending on in-build Hardware engines present on SoC.

ARM: OMAP2+: cleaned-up DT support of various ECC schemes

OMAP NAND driver support multiple ECC scheme, which can used in different
flavours, depending on in-build Hardware engines present on SoC.

This patch updates following in DT bindings related to sectionion of ecc-schemes
- ti,elm-id: replaces elm_id (maintains backward compatibility)
- ti,nand-ecc-opts: selection of h/w or s/w implementation of an ecc-scheme
depends on ti,elm-id. (supported values ham1, bch4, and bch8)
- maintain backward compatibility to deprecated DT bindings (sw, hw, hw-romcode)

Below table shows different flavours of ecc-schemes supported by OMAP devices
+---------------------------------------+---------------+---------------+
| ECC scheme |ECC calculation|Error detection|
+---------------------------------------+---------------+---------------+
|OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W |
|(requires CONFIG_MTD_NAND_ECC_BCH) | | |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) |
|(requires CONFIG_MTD_NAND_OMAP_BCH && | | |
| ti,elm-id in DT) | | |
+---------------------------------------+---------------+---------------+

To optimize footprint of omap2-nand driver, selection of some ECC schemes
also require enabling following Kconfigs, in addition to setting appropriate
DT bindings
- Kconfig:CONFIG_MTD_NAND_ECC_BCH error detection done in software
- Kconfig:CONFIG_MTD_NAND_OMAP_BCH error detection done by h/w engine

Signed-off-by: Pekon Gupta <[email protected]>
Reviewed-by: Felipe Balbi <[email protected]>
Acked-by: Tony Lindgren <[email protected]>
Tested-by: Ezequiel Garcia <[email protected]>
Signed-off-by: Brian Norris <[email protected]>

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mtd: omap-nand: pass device_node in platform data

Pass an optional device_node pointer in the platform data, which in turn
will be put into a mtd_part_parser_data. This way, code that sets up the
pl

mtd: omap-nand: pass device_node in platform data

Pass an optional device_node pointer in the platform data, which in turn
will be put into a mtd_part_parser_data. This way, code that sets up the
platform devices can pass along the node from DT so that the partitions
can be parsed.

For non-DT boards, this change has no effect.

Signed-off-by: Daniel Mack <[email protected]>
Acked-by: Grant Likely <[email protected]>
Acked-by: Artem Bityutskiy <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>

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ARM: OMAP2+: gpmc: nand register helper bch update

Update helper function that provides gpmc-nand register
details for nand driver with bch register information.
Using this nand driver can be made s

ARM: OMAP2+: gpmc: nand register helper bch update

Update helper function that provides gpmc-nand register
details for nand driver with bch register information.
Using this nand driver can be made self sufficient to
handle remaining gpmc-nand operations by itself instead
of relying on gpmc exported nand functions.

Signed-off-by: Afzal Mohammed <[email protected]>

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ARM: OMAP2+: nand: header cleanup

For common arm zImage existing nand header file
in platform specific location was moved to generic
platform data location, but it contained more than
platform data,

ARM: OMAP2+: nand: header cleanup

For common arm zImage existing nand header file
in platform specific location was moved to generic
platform data location, but it contained more than
platform data, remove it. New local header has been
created for exposing functions.

Also move gpmc-nand platform data to platform header
meant for nand from gpmc header file

Signed-off-by: Afzal Mohammed <[email protected]>

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ARM: omap: move platform_data definitions

Platform data for device drivers should be defined in
include/linux/platform_data/*.h, not in the architecture
and platform specific directories.

This move

ARM: omap: move platform_data definitions

Platform data for device drivers should be defined in
include/linux/platform_data/*.h, not in the architecture
and platform specific directories.

This moves such data out of the omap include directories

Signed-off-by: Arnd Bergmann <[email protected]>
Acked-by: Mark Brown <[email protected]>
Acked-by: Greg Kroah-Hartman <[email protected]>
Acked-by: Nicolas Pitre <[email protected]>
Acked-by: Tony Lindgren <[email protected]>
Cc: Kevin Hilman <[email protected]>
Cc: "Benoît Cousson" <[email protected]>
Cc: Dmitry Torokhov <[email protected]>
Cc: David Woodhouse <[email protected]>
Cc: Kyungmin Park <[email protected]>
Cc: Ohad Ben-Cohen <[email protected]>
Cc: Grant Likely <[email protected]>
Cc: Omar Ramirez Luna <[email protected]>
Cc: Tomi Valkeinen <[email protected]>
Cc: Florian Tobias Schandinat <[email protected]>
Cc: Peter Ujfalusi <[email protected]>
Cc: Jarkko Nikula <[email protected]>
Cc: Liam Girdwood <[email protected]>
Cc: Artem Bityutskiy <[email protected]>
Cc: Jean Pihet <[email protected]>
Cc: J Keerthy <[email protected]>
Cc: [email protected]

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