mfd: lpc_ich: Move APL GPIO resources to a custom structure

We are expecting more platforms that want to instantiate
the GPIO device via P2SB. For them prepare the custom structure
and move Apollo L

mfd: lpc_ich: Move APL GPIO resources to a custom structure

We are expecting more platforms that want to instantiate
the GPIO device via P2SB. For them prepare the custom structure
and move Apollo Lake data there. Refactor the code accordingly.

Signed-off-by: Andy Shevchenko <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Lee Jones <[email protected]>

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mfd: lpc_ich: Convert gpio_version to be enum

We have an anonymous enum for the GPIO versions. Make it named
and use this type for the gpio_version member of struct lpc_ich_info.

Signed-off-by: And

mfd: lpc_ich: Convert gpio_version to be enum

We have an anonymous enum for the GPIO versions. Make it named
and use this type for the gpio_version member of struct lpc_ich_info.

Signed-off-by: Andy Shevchenko <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Lee Jones <[email protected]>

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mtd: spi-nor: intel-spi: Convert to SPI MEM

The preferred way to implement SPI-NOR controller drivers is through SPI
subsubsystem utilizing the SPI MEM core functions. This converts the
Intel SPI fl

mtd: spi-nor: intel-spi: Convert to SPI MEM

The preferred way to implement SPI-NOR controller drivers is through SPI
subsubsystem utilizing the SPI MEM core functions. This converts the
Intel SPI flash controller driver over the SPI MEM by moving the driver
from SPI-NOR subsystem to SPI subsystem and in one go make it use the
SPI MEM functions. The driver name will be changed from intel-spi to
spi-intel to match the convention used in the SPI subsystem.

Signed-off-by: Mika Westerberg <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
Reviewed-by: Mauro Lima <[email protected]>
Reviewed-by: Boris Brezillon <[email protected]>
Acked-by: Lee Jones <[email protected]>
Acked-by: Pratyush Yadav <[email protected]>
Reviewed-by: Tudor Ambarus <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>

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mtd: spi-nor: intel-spi: Move platform data header to x86 subfolder

In order to group x86 related platform data move intel-spi.h to x86 folder.

While at it, remove duplicate inclusion in C file.

S

mtd: spi-nor: intel-spi: Move platform data header to x86 subfolder

In order to group x86 related platform data move intel-spi.h to x86 folder.

While at it, remove duplicate inclusion in C file.

Signed-off-by: Andy Shevchenko <[email protected]>
[ta: s/x85/x86]
Signed-off-by: Tudor Ambarus <[email protected]>
Reviewed-by: Vignesh Raghavendra <[email protected]>
Link: https://lore.kernel.org/r/[email protected]

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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 300

Based on 1 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of th

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 300

Based on 1 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license 2 as published
by the free software foundation this program is distributed in the
hope that it will be useful but without any warranty without even
the implied warranty of merchantability or fitness for a particular
purpose see the gnu general public license for more details you
should have received a copy of the gnu general public license along
with this program see the file copying if not write to the free
software foundation 675 mass ave cambridge ma 02139 usa

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-only

has been chosen to replace the boilerplate/reference in 3 file(s).

Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Alexios Zavras <[email protected]>
Reviewed-by: Allison Randal <[email protected]>
Reviewed-by: Richard Fontana <[email protected]>
Cc: [email protected]
Link: https://lkml.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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mfd: lpc_ich: Add support for SPI serial flash host controller

Many Intel CPUs including Haswell, Broadwell and Baytrail have SPI serial
flash host controller as part of the LPC device. This will po

mfd: lpc_ich: Add support for SPI serial flash host controller

Many Intel CPUs including Haswell, Broadwell and Baytrail have SPI serial
flash host controller as part of the LPC device. This will populate an MFD
cell suitable for the SPI host controller driver if we know that the LPC
device has one.

Signed-off-by: Mika Westerberg <[email protected]>
Acked-by: Lee Jones <[email protected]>
Signed-off-by: Lee Jones <[email protected]>

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mfd: watchdog: iTCO_wdt: Expose watchdog properties using platform data

Intel Sunrisepoint (Skylake PCH) has the iTCO watchdog accessible across
the SMBus, unlike previous generations of PCH/ICH whe

mfd: watchdog: iTCO_wdt: Expose watchdog properties using platform data

Intel Sunrisepoint (Skylake PCH) has the iTCO watchdog accessible across
the SMBus, unlike previous generations of PCH/ICH where it was on the
LPC bus. Because it's on the SMBus, it doesn't make sense to pass around
a 'struct lpc_ich_info', and leaking the type of bus into the iTCO
watchdog driver is kind of backwards anyway.

This change introduces a new 'struct itco_wdt_platform_data' for use
inside the iTCO watchdog driver and by the upcoming Intel Sunrisepoint
code, which neatly avoids having to include lpc_ich headers in the i801
i2c driver.

This change is overdue because lpc_ich_info has already found its way
into other TCO watchdog users, notably the intel_pmc_ipc driver where
the watchdog actually isn't on the LPC bus as far as I can see.

A simple translation layer is provided for converting from the existing
'struct lpc_ich_info' inside the lpc_ich mfd driver.

Signed-off-by: Matt Fleming <[email protected]>
Acked-by: Darren Hart <[email protected]> [drivers/x86 refactoring]
Reviewed-by: Guenter Roeck <[email protected]>
Signed-off-by: Lee Jones <[email protected]>

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mfd: lpc_ich: Add support for iTCO v3

Some newer Atom CPUs, eg Avoton and Bay Trail, use slightly different
register layouts for the iTCO than the current v1 and v2 iTCO.
Differences from previous i

mfd: lpc_ich: Add support for iTCO v3

Some newer Atom CPUs, eg Avoton and Bay Trail, use slightly different
register layouts for the iTCO than the current v1 and v2 iTCO.
Differences from previous iTCO versions include:
- The ACPI space is enabled in the "ACPI base address" register instead
of the "ACPI control register"

- The "no reboot" functionality is set in the "Power Management
Configuration" register instead of the "General Control and Status"
(GCS) register or PCI configuration space.

- The "ACPI Control Register" is not present on v3. The "Power
Management Configuration Base Address" register resides at the same
address is Avoton/Bay Trail.

To differentiate these newer chipsets create a new v3 iTCO version and
update the MFD driver to support them.

Signed-off-by: Peter Tyser <[email protected]>
Tested-by: Rajat Jain <[email protected]>
Reviewed-by: Guenter Roeck <[email protected]>
Signed-off-by: Lee Jones <[email protected]>

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mfd: lpc_ich: Add support for Intel Avoton GPIOs

Signed-off-by: Vincent Donnefort <[email protected]>
Signed-off-by: Lee Jones <[email protected]>

mfd: lpc_ich: Convert ICH GPIOs IDs to enum

All those IDs are arbitrary and so can be encapsulated into an enumeration.

Signed-off-by: Vincent Donnefort <[email protected]>
Signed-off-by: Lee Jo

mfd: lpc_ich: Convert ICH GPIOs IDs to enum

All those IDs are arbitrary and so can be encapsulated into an enumeration.

Signed-off-by: Vincent Donnefort <[email protected]>
Signed-off-by: Lee Jones <[email protected]>

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gpio: gpio-ich: Share ownership of GPIO groups

The ICH chips have their GPIO pins organized in 2 or 3 independent
groups of 32 GPIO pins. It can happen that the ACPI BIOS wants to make
use of pins i

gpio: gpio-ich: Share ownership of GPIO groups

The ICH chips have their GPIO pins organized in 2 or 3 independent
groups of 32 GPIO pins. It can happen that the ACPI BIOS wants to make
use of pins in one group, preventing the OS to access these. This does
not prevent the OS from accessing the other group(s).

This is the case for example on my Asus Z8NA-D6 board. The ACPI BIOS
wants to control GPIO 18 (group 1), while I (the OS) need to control
GPIO 52 and 53 (group 2) for SMBus multiplexing.

So instead of checking for ACPI resource conflict on the whole I/O
range, check on a per-group basis, and consider it a success if at
least one of the groups is available for the OS to use.

Signed-off-by: Jean Delvare <[email protected]>
Cc: Peter Tyser <[email protected]>
Cc: Aaron Sierra <[email protected]>
Cc: Grant Likely <[email protected]>
Acked-by: Linus Walleij <[email protected]>
Signed-off-by: Samuel Ortiz <[email protected]>

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watchdog: Convert iTCO_wdt driver to mfd model

This patch converts the iTCO_wdt driver to use the multi-function device
driver model. It uses resources discovered by the lpc_ich driver, so that
it n

watchdog: Convert iTCO_wdt driver to mfd model

This patch converts the iTCO_wdt driver to use the multi-function device
driver model. It uses resources discovered by the lpc_ich driver, so that
it no longer does its own PCI scanning.

Signed-off-by: Aaron Sierra <[email protected]>
Signed-off-by: Guenter Roeck <[email protected]>
Signed-off-by: Samuel Ortiz <[email protected]>

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mfd: Add LPC driver for Intel ICH chipsets

This driver currently creates resources for use by a forthcoming ICH
chipset GPIO driver. It could be expanded to create the resources for
converting the e

mfd: Add LPC driver for Intel ICH chipsets

This driver currently creates resources for use by a forthcoming ICH
chipset GPIO driver. It could be expanded to create the resources for
converting the esb2rom (mtd) and iTCO_wdt (wdt), and potentially more,
drivers to use the mfd model.

Signed-off-by: Aaron Sierra <[email protected]>
Signed-off-by: Guenter Roeck <[email protected]>
Signed-off-by: Samuel Ortiz <[email protected]>

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