| 642af0f9 | 01-Jun-2023 |
Maxime Chevallier <[email protected]> |
net: mdio: Introduce a regmap-based mdio driver
There exists several examples today of devices that embed an ethernet PHY or PCS directly inside an SoC. In this situation, either the device is contr
net: mdio: Introduce a regmap-based mdio driver
There exists several examples today of devices that embed an ethernet PHY or PCS directly inside an SoC. In this situation, either the device is controlled through a vendor-specific register set, or sometimes exposes the standard 802.3 registers that are typically accessed over MDIO.
As phylib and phylink are designed to use mdiodevices, this driver allows creating a virtual MDIO bus, that translates mdiodev register accesses to regmap accesses.
The reason we use regmap is because there are at least 3 such devices known today, 2 of them are Altera TSE PCS's, memory-mapped, exposed with a 4-byte stride in stmmac's dwmac-socfpga variant, and a 2-byte stride in altera-tse. The other one (nxp,sja1110-base-tx-mdio) is exposed over SPI.
Signed-off-by: Maxime Chevallier <[email protected]> Reviewed-by: Simon Horman <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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