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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5 |
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4a5917cd |
| 13-Feb-2024 |
Tony Lindgren <[email protected]> |
clk: ti: Improve clksel clock bit parsing for reg property
Because of legacy reasons, the TI clksel composite clocks can have overlapping reg properties, and use a custom ti,bit-shift property.
For
clk: ti: Improve clksel clock bit parsing for reg property
Because of legacy reasons, the TI clksel composite clocks can have overlapping reg properties, and use a custom ti,bit-shift property.
For the clksel clocks we can start using of the standard reg property instead of the custom ti,bit-shift property.
To do this, let's add a ti_clk_get_legacy_bit_shift() helper, and make ti_clk_get_reg_addr() populate the clock bit offset.
This makes it possible to update the devicetree files to use the reg property one clock at a time.
Acked-by: Stephen Boyd <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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Revision tags: v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2 |
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5a729246 |
| 07-Jun-2022 |
Thomas Gleixner <[email protected]> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE
Based on the normalized pattern:
this program is free software you can redistribute it and/or modify it under the
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE
Based on the normalized pattern:
this program is free software you can redistribute it and/or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed as is without any warranty of any kind whether express or implied without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference.
Reviewed-by: Allison Randal <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5 |
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0899431f |
| 06-Jun-2021 |
Dario Binacchi <[email protected]> |
clk: ti: add am33xx/am43xx spread spectrum clock support
The patch enables spread spectrum clocking (SSC) for MPU and LCD PLLs. As reported by the TI spruh73x/spruhl7x RM, SSC is only supported for
clk: ti: add am33xx/am43xx spread spectrum clock support
The patch enables spread spectrum clocking (SSC) for MPU and LCD PLLs. As reported by the TI spruh73x/spruhl7x RM, SSC is only supported for the DISP/LCD and MPU PLLs on am33xx/am43xx. SSC is not supported for DDR, PER, and CORE PLLs.
Calculating the required values and setting the registers accordingly was taken from the set_mpu_spreadspectrum routine contained in the arch/arm/mach-omap2/am33xx/clock_am33xx.c file of the u-boot project.
In locked condition, DPLL output clock = CLKINP *[M/N]. In case of SSC enabled, the reference manual explains that there is a restriction of range of M values. Since the omap2_dpll_round_rate routine attempts to select the minimum possible N, the value of M obtained is not guaranteed to be within the range required. With the new "ti,min-div" parameter it is possible to increase N and consequently M to satisfy the constraint imposed by SSC.
Signed-off-by: Dario Binacchi <[email protected]> Reviewed-by: Tero Kristo <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
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Revision tags: v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3 |
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2209b72d |
| 12-Sep-2019 |
Tero Kristo <[email protected]> |
clk: ti: clkctrl: add new exported API for checking standby info
Standby status is provided for certain clkctrl clocks to see if the given module has entered standby or not. This is mostly needed by
clk: ti: clkctrl: add new exported API for checking standby info
Standby status is provided for certain clkctrl clocks to see if the given module has entered standby or not. This is mostly needed by remoteproc code to see if the remoteproc has entered standby and the clock can be turned off safely.
Signed-off-by: Tero Kristo <[email protected]>
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22a6564f |
| 12-Sep-2019 |
Tero Kristo <[email protected]> |
clk: ti: clkctrl: convert to use bit helper macros instead of bitops
This improves the readibility of the code slightly, and makes modifying the flags bit simpler.
Signed-off-by: Tero Kristo <t-kri
clk: ti: clkctrl: convert to use bit helper macros instead of bitops
This improves the readibility of the code slightly, and makes modifying the flags bit simpler.
Signed-off-by: Tero Kristo <[email protected]>
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Revision tags: v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3, v5.2-rc2, v5.2-rc1, v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5, v5.1-rc4 |
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869decd1 |
| 04-Apr-2019 |
Tero Kristo <[email protected]> |
clk: ti: dra7: disable the RNG and TIMER12 clkctrl clocks on HS devices
RNG and TIMER12 are reserved for secure side usage only on HS devices, so disable their clkctrl clocks on HS SoCs also.
Signe
clk: ti: dra7: disable the RNG and TIMER12 clkctrl clocks on HS devices
RNG and TIMER12 are reserved for secure side usage only on HS devices, so disable their clkctrl clocks on HS SoCs also.
Signed-off-by: Tero Kristo <[email protected]> Tested-by: Andrew F. Davis <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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b88b5b71 |
| 04-Apr-2019 |
Tero Kristo <[email protected]> |
clk: ti: export the omap2_clk_is_hw_omap call
There is one instance outside the TI clock driver that needs the info whether a clock is an OMAP HW clock or not. Thus, move the function declaration in
clk: ti: export the omap2_clk_is_hw_omap call
There is one instance outside the TI clock driver that needs the info whether a clock is an OMAP HW clock or not. Thus, move the function declaration into the public header.
Signed-off-by: Tero Kristo <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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Revision tags: v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6, v5.0-rc5, v5.0-rc4, v5.0-rc3 |
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d277ce2d |
| 16-Jan-2019 |
Andreas Kemnade <[email protected]> |
clk: ti: add a usecount for autoidle
Multiple users might deny autoidle on a clock. So we should have some counting here, also according to the comment in _setup_iclk_autoidle(). Also setting autoi
clk: ti: add a usecount for autoidle
Multiple users might deny autoidle on a clock. So we should have some counting here, also according to the comment in _setup_iclk_autoidle(). Also setting autoidle regs is not atomic, so there is another reason for locking.
Signed-off-by: Andreas Kemnade <[email protected]> Acked-by: Tony Lindgren <[email protected]> Tested-by: Keerthy <[email protected]> Signed-off-by: Tero Kristo <[email protected]>
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Revision tags: v5.0-rc2, v5.0-rc1, v4.20, v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1, v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6, v4.19-rc5, v4.19-rc4, v4.19-rc3 |
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d6e7bbc1 |
| 04-Sep-2018 |
Russ Dill <[email protected]> |
clk: ti: Add functions to save/restore clk context
SoCs like AM43XX lose clock registers context during RTC-only suspend. Hence add functions to save/restore the clock registers context.
Signed-off
clk: ti: Add functions to save/restore clk context
SoCs like AM43XX lose clock registers context during RTC-only suspend. Hence add functions to save/restore the clock registers context.
Signed-off-by: Keerthy <[email protected]> Signed-off-by: Russ Dill <[email protected]> Acked-by: Tony Lindgren <[email protected]> Signed-off-by: Tero Kristo <[email protected]>
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Revision tags: v4.19-rc2, v4.19-rc1, v4.18 |
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47b00dcf |
| 10-Aug-2018 |
Tero Kristo <[email protected]> |
clk: ti: clkctrl: support multiple clkctrl nodes under a cm node
Currently, only one clkctrl node can be added under a specific CM node due to limitation with the implementation. Modify the code to
clk: ti: clkctrl: support multiple clkctrl nodes under a cm node
Currently, only one clkctrl node can be added under a specific CM node due to limitation with the implementation. Modify the code to pick-up clockdomain name from the clkctrl node instead of CM node if provided. Also, add a new flag to the TI clock driver so that both modes can be supported simultaneously.
Signed-off-by: Tero Kristo <[email protected]> Tested-by: Tony Lindgren <[email protected]>
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Revision tags: v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4, v4.18-rc3, v4.18-rc2, v4.18-rc1, v4.17, v4.17-rc7, v4.17-rc6, v4.17-rc5, v4.17-rc4, v4.17-rc3, v4.17-rc2, v4.17-rc1, v4.16, v4.16-rc7, v4.16-rc6 |
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04dfac09 |
| 14-Mar-2018 |
Tero Kristo <[email protected]> |
ARM: omap2+: control: add support for auxiliary control module instances
Control module can have multiple instances in a system, each with separate address space and features. Add base support for t
ARM: omap2+: control: add support for auxiliary control module instances
Control module can have multiple instances in a system, each with separate address space and features. Add base support for these auxiliary instances, with support for syscon and clock mappings under them.
Signed-off-by: Tero Kristo <[email protected]> Tested-by: Peter Ujfalusi <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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Revision tags: v4.16-rc5, v4.16-rc4, v4.16-rc3, v4.16-rc2, v4.16-rc1, v4.15, v4.15-rc9, v4.15-rc8, v4.15-rc7, v4.15-rc6, v4.15-rc5, v4.15-rc4, v4.15-rc3, v4.15-rc2, v4.15-rc1, v4.14, v4.14-rc8, v4.14-rc7, v4.14-rc6, v4.14-rc5, v4.14-rc4, v4.14-rc3, v4.14-rc2, v4.14-rc1, v4.13, v4.13-rc7, v4.13-rc6, v4.13-rc5, v4.13-rc4, v4.13-rc3 |
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4902c202 |
| 26-Jul-2017 |
Tero Kristo <[email protected]> |
clk: ti: add support for register read-modify-write low-level operation
Useful for changing few bits on a register, this makes sure for example that the operation is done atomically in case of sysco
clk: ti: add support for register read-modify-write low-level operation
Useful for changing few bits on a register, this makes sure for example that the operation is done atomically in case of syscon.
Signed-off-by: Tero Kristo <[email protected]>
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Revision tags: v4.13-rc2, v4.13-rc1, v4.12, v4.12-rc7, v4.12-rc6, v4.12-rc5, v4.12-rc4, v4.12-rc3, v4.12-rc2, v4.12-rc1, v4.11, v4.11-rc8, v4.11-rc7, v4.11-rc6, v4.11-rc5, v4.11-rc4, v4.11-rc3, v4.11-rc2, v4.11-rc1, v4.10, v4.10-rc8 |
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6c0afb50 |
| 09-Feb-2017 |
Tero Kristo <[email protected]> |
clk: ti: convert to use proper register definition for all accesses
Currently, TI clock driver uses an encapsulated struct that is cast into a void pointer to store all register addresses. This can
clk: ti: convert to use proper register definition for all accesses
Currently, TI clock driver uses an encapsulated struct that is cast into a void pointer to store all register addresses. This can be considered as rather nasty hackery, and prevents from expanding the register address field also. Instead, replace all the code to use proper struct in place for this, which contains all the previously used data.
This patch is rather large as it is touching multiple files, but this can't be split up as we need to avoid any boot breakage.
Signed-off-by: Tero Kristo <[email protected]> Acked-by: Tony Lindgren <[email protected]>
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Revision tags: v4.10-rc7 |
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c91f0780 |
| 30-Jan-2017 |
Tero Kristo <[email protected]> |
clk: ti: drop unnecessary MEMMAP_ADDRESSING flag
This has been superceded by the usage of ti_clk_ll_ops for now.
Signed-off-by: Tero Kristo <[email protected]> Acked-by: Tony Lindgren <[email protected]
clk: ti: drop unnecessary MEMMAP_ADDRESSING flag
This has been superceded by the usage of ti_clk_ll_ops for now.
Signed-off-by: Tero Kristo <[email protected]> Acked-by: Tony Lindgren <[email protected]>
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Revision tags: v4.10-rc6, v4.10-rc5, v4.10-rc4, v4.10-rc3, v4.10-rc2, v4.10-rc1, v4.9, v4.9-rc8, v4.9-rc7, v4.9-rc6, v4.9-rc5, v4.9-rc4, v4.9-rc3, v4.9-rc2, v4.9-rc1, v4.8 |
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2e1a294c |
| 30-Sep-2016 |
Tero Kristo <[email protected]> |
clk: ti: move omap2_init_clk_clkdm under TI clock driver
This is not needed outside the driver, so move it inside it and remove the prototype from the public header also.
Signed-off-by: Tero Kristo
clk: ti: move omap2_init_clk_clkdm under TI clock driver
This is not needed outside the driver, so move it inside it and remove the prototype from the public header also.
Signed-off-by: Tero Kristo <[email protected]> Acked-by: Tony Lindgren <[email protected]>
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b6f27b2d |
| 30-Sep-2016 |
Tero Kristo <[email protected]> |
clk: ti: add clkdm_lookup to the exported functions
This will be needed to move some additional clockdomain functionality under clock driver.
Signed-off-by: Tero Kristo <[email protected]> Acked-by:
clk: ti: add clkdm_lookup to the exported functions
This will be needed to move some additional clockdomain functionality under clock driver.
Signed-off-by: Tero Kristo <[email protected]> Acked-by: Tony Lindgren <[email protected]>
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Revision tags: v4.8-rc8, v4.8-rc7, v4.8-rc6, v4.8-rc5, v4.8-rc4, v4.8-rc3, v4.8-rc2, v4.8-rc1, v4.7, v4.7-rc7, v4.7-rc6, v4.7-rc5, v4.7-rc4, v4.7-rc3, v4.7-rc2, v4.7-rc1, v4.6, v4.6-rc7, v4.6-rc6, v4.6-rc5, v4.6-rc4, v4.6-rc3, v4.6-rc2, v4.6-rc1, v4.5, v4.5-rc7, v4.5-rc6, v4.5-rc5, v4.5-rc4, v4.5-rc3, v4.5-rc2, v4.5-rc1, v4.4, v4.4-rc8, v4.4-rc7, v4.4-rc6 |
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923386f7 |
| 18-Dec-2015 |
Tero Kristo <[email protected]> |
clk: ti: remove un-used definitions from public clk_hw_omap struct
Clksel support has been deprecated a while back, so remove these from the struct also.
Signed-off-by: Tero Kristo <[email protected]
clk: ti: remove un-used definitions from public clk_hw_omap struct
Clksel support has been deprecated a while back, so remove these from the struct also.
Signed-off-by: Tero Kristo <[email protected]> Acked-by: Tony Lindgren <[email protected]>
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c5cc2a0b |
| 16-Mar-2016 |
Tero Kristo <[email protected]> |
clk: ti: dpll: add support for specifying max rate for DPLLs
DPLLs typically have a maximum rate they can support, and this varies from DPLL to DPLL. Add support of the maximum rate value to the DPL
clk: ti: dpll: add support for specifying max rate for DPLLs
DPLLs typically have a maximum rate they can support, and this varies from DPLL to DPLL. Add support of the maximum rate value to the DPLL data struct, and also add check for this in the DPLL round_rate function.
Signed-off-by: Tero Kristo <[email protected]> Reviewed-by: Nishanth Menon <[email protected]> Cc: Tomi Valkeinen <[email protected]> Cc: Lokesh Vutla <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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b6f51284 |
| 20-Feb-2016 |
Tero Kristo <[email protected]> |
clk: ti: dpll: convert DPLL support code to use clk_hw instead of clk ptrs
Convert DPLL support code to use clk_hw pointers for reference and bypass clocks. This allows us to use clk_hw_* APIs for a
clk: ti: dpll: convert DPLL support code to use clk_hw instead of clk ptrs
Convert DPLL support code to use clk_hw pointers for reference and bypass clocks. This allows us to use clk_hw_* APIs for accessing any required parameters for these clocks, avoiding some locking problems at least with DPLL enable code; this used clk_get_rate which uses mutex but isn't good under clk_enable / clk_disable.
Signed-off-by: Tero Kristo <[email protected]> Acked-by: Tony Lindgren <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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Revision tags: v4.4-rc5, v4.4-rc4 |
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4e34df0c |
| 03-Dec-2015 |
Tony Lindgren <[email protected]> |
ARM: OMAP2+: Add DPPLS clock manager for dm814x
On dm814x we have some clocks at DPLLS and some at PRCM. Let's add a new omap_prcm_init_data entry for the DPLLS so we can initalize timer clocks earl
ARM: OMAP2+: Add DPPLS clock manager for dm814x
On dm814x we have some clocks at DPLLS and some at PRCM. Let's add a new omap_prcm_init_data entry for the DPLLS so we can initalize timer clocks early.
Cc: Paul Walmsley <[email protected]> Cc: Tero Kristo <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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07ff73a9 |
| 30-Nov-2015 |
Tero Kristo <[email protected]> |
clk: ti: omap5+: dpll: implement errata i810
Errata i810 states that DPLL controller can get stuck while transitioning to a power saving state, while its M/N ratio is being re-programmed.
As a work
clk: ti: omap5+: dpll: implement errata i810
Errata i810 states that DPLL controller can get stuck while transitioning to a power saving state, while its M/N ratio is being re-programmed.
As a workaround, before re-programming the M/N ratio, SW has to ensure the DPLL cannot start an idle state transition. SW can disable DPLL idling by setting the DPLL AUTO_DPLL_MODE=0 or keeping a clock request active by setting a dependent clock domain in SW_WKUP.
This errata impacts OMAP5 and DRA7 chips, so enable the errata for these.
Signed-off-by: Tero Kristo <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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Revision tags: v4.4-rc3, v4.4-rc2, v4.4-rc1, v4.3, v4.3-rc7, v4.3-rc6, v4.3-rc5, v4.3-rc4, v4.3-rc3, v4.3-rc2, v4.3-rc1, v4.2, v4.2-rc8, v4.2-rc7, v4.2-rc6, v4.2-rc5, v4.2-rc4, v4.2-rc3, v4.2-rc2 |
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0817b62c |
| 07-Jul-2015 |
Boris Brezillon <[email protected]> |
clk: change clk_ops' ->determine_rate() prototype
Clock rates are stored in an unsigned long field, but ->determine_rate() (which returns a rounded rate from a requested one) returns a long value (e
clk: change clk_ops' ->determine_rate() prototype
Clock rates are stored in an unsigned long field, but ->determine_rate() (which returns a rounded rate from a requested one) returns a long value (errors are reported using negative error codes), which can lead to long overflow if the clock rate exceed 2Ghz.
Change ->determine_rate() prototype to return 0 or an error code, and pass a pointer to a clk_rate_request structure containing the expected target rate and the rate constraints imposed by clk users.
The clk_rate_request structure might be extended in the future to contain other kind of constraints like the rounding policy, the maximum clock inaccuracy or other things that are not yet supported by the CCF (power consumption constraints ?).
Signed-off-by: Boris Brezillon <[email protected]> CC: Jonathan Corbet <[email protected]> CC: Tony Lindgren <[email protected]> CC: Ralf Baechle <[email protected]> CC: "Emilio López" <[email protected]> CC: Maxime Ripard <[email protected]> Acked-by: Tero Kristo <[email protected]> CC: Peter De Schrijver <[email protected]> CC: Prashant Gaikwad <[email protected]> CC: Stephen Warren <[email protected]> CC: Thierry Reding <[email protected]> CC: Alexandre Courbot <[email protected]> CC: [email protected] CC: [email protected] CC: [email protected] CC: [email protected] CC: [email protected] CC: [email protected] [[email protected]: Fix parent dereference problem in __clk_determine_rate()] Signed-off-by: Stephen Boyd <[email protected]> Tested-by: Romain Perier <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]> [[email protected]: Folded in fix from Heiko for fixed-rate clocks without parents or a rate determining op] Signed-off-by: Stephen Boyd <[email protected]>
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9cf705de |
| 16-Jul-2015 |
Tony Lindgren <[email protected]> |
ARM: OMAP2+: Add support for initializing dm814x clocks
Let's add a minimal clocks for dm814x to get it booted. This is mostly a placeholder and relies on the PLLs being on from the bootloader.
Not
ARM: OMAP2+: Add support for initializing dm814x clocks
Let's add a minimal clocks for dm814x to get it booted. This is mostly a placeholder and relies on the PLLs being on from the bootloader.
Note that the divider clocks work the same way as on dm816x and am335x.
Cc: Matthijs van Duin <[email protected]> Cc: Mike Turquette <[email protected]> Cc: Paul Walmsley <[email protected]> Cc: Stephen Boyd <[email protected]> Cc: Tero Kristo <[email protected]> Acked-by: Stephen Boyd <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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Revision tags: v4.2-rc1, v4.1, v4.1-rc8, v4.1-rc7, v4.1-rc6, v4.1-rc5, v4.1-rc4, v4.1-rc3, v4.1-rc2 |
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989feafb |
| 27-Apr-2015 |
Tero Kristo <[email protected]> |
clk: ti: move low-level access and init code under clock driver
With most of the clock code under clock driver already, the low-level register access code, and the init code for the same, is no long
clk: ti: move low-level access and init code under clock driver
With most of the clock code under clock driver already, the low-level register access code, and the init code for the same, is no longer needed outside the clock driver. Thus, these can be moved under clock driver also.
Signed-off-by: Tero Kristo <[email protected]>
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e9e63088 |
| 27-Apr-2015 |
Tero Kristo <[email protected]> |
clk: ti: remove exported ll_ops struct, instead add an API for registration
We should avoid exporting data from drivers, instead use an API for registering the clock low level operations.
Signed-of
clk: ti: remove exported ll_ops struct, instead add an API for registration
We should avoid exporting data from drivers, instead use an API for registering the clock low level operations.
Signed-off-by: Tero Kristo <[email protected]>
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