|
Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8 |
|
| #
eddb24a8 |
| 06-Mar-2024 |
Jani Nikula <[email protected]> |
drm/amdgpu: make amd_asic_type.h self-contained
Include <linux/types.h> for u8.
Reviewed-by: Thomas Zimmermann <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by
drm/amdgpu: make amd_asic_type.h self-contained
Include <linux/types.h> for u8.
Reviewed-by: Thomas Zimmermann <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/115327b880b69b1c8ad157e5ff7f6b419868fab0.1709749576.git.jani.nikula@intel.com
show more ...
|
|
Revision tags: v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1 |
|
| #
dbab6356 |
| 31-Oct-2023 |
Ma Jun <[email protected]> |
drm/amdgpu: Optimize the asic type fix code
Use a new struct array to define the asic information which
asic type needs to be fixed.
Signed-off-by: Ma Jun <[email protected]>
Reviewed-by: Kenneth Fen
drm/amdgpu: Optimize the asic type fix code
Use a new struct array to define the asic information which
asic type needs to be fixed.
Signed-off-by: Ma Jun <[email protected]>
Reviewed-by: Kenneth Feng <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
|
Revision tags: v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6 |
|
| #
3ae695d6 |
| 09-Aug-2021 |
Alex Deucher <[email protected]> |
drm/amdgpu: add new asic_type for IP discovery
Add a new asic type for asics where we don't have an
explicit entry in the PCI ID list. We don't need
an asic type for these asics, other than somethi
drm/amdgpu: add new asic_type for IP discovery
Add a new asic type for asics where we don't have an
explicit entry in the PCI ID list. We don't need
an asic type for these asics, other than something higher
than the existing ones, so just use this for all new
asics.
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
|
Revision tags: v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2 |
|
| #
d0f56dc2 |
| 13-Jul-2021 |
Tao Zhou <[email protected]> |
drm/amdgpu: add cyan_skillfish asic type
Add cyan_skillfish asic family.
Signed-off-by: Tao Zhou <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <
drm/amdgpu: add cyan_skillfish asic type
Add cyan_skillfish asic family.
Signed-off-by: Tao Zhou <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
|
Revision tags: v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3 |
|
| #
ee9236b7 |
| 04-Nov-2020 |
Aaron Liu <[email protected]> |
drm/amdgpu: add yellow carp asic_type enum
This patch adds yellow carp to amd_asic_type enum and amdgpu_asic_name[].
Signed-off-by: Aaron Liu <[email protected]>
Reviewed-by: Huang Rui <ray.huang@a
drm/amdgpu: add yellow carp asic_type enum
This patch adds yellow carp to amd_asic_type enum and amdgpu_asic_name[].
Signed-off-by: Aaron Liu <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
|
Revision tags: v5.10-rc2, v5.10-rc1 |
|
| #
6f169591 |
| 13-Oct-2020 |
Chengming Gui <[email protected]> |
drm/amd/amdgpu: add beige_goby asic type
Add chip type for beige_goby
v2: fix enum count (Alex)
Signed-off-by: Chengming Gui <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
R
drm/amd/amdgpu: add beige_goby asic type
Add chip type for beige_goby
v2: fix enum count (Alex)
Signed-off-by: Chengming Gui <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Reviewed-by: Tao Zhou <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
|
Revision tags: v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8 |
|
| #
d46b417a |
| 11-Nov-2019 |
Le Ma <[email protected]> |
drm/amdgpu: add aldebaran asic type
Add aldebaran in amdgpu_asic_name array and amdgpu_asic_type enum
Signed-off-by: Le Ma <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Acked-b
drm/amdgpu: add aldebaran asic type
Add aldebaran in amdgpu_asic_name array and amdgpu_asic_type enum
Signed-off-by: Le Ma <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Acked-by: Evan Quan <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
| #
a2468e04 |
| 02-Oct-2020 |
Tao Zhou <[email protected]> |
drm/amdgpu: add dimgrey_cavefish asic type
Add chip type for dimgrey_cavefish.
Signed-off-by: Tao Zhou <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Reviewed-by: Jiansong C
drm/amdgpu: add dimgrey_cavefish asic type
Add chip type for dimgrey_cavefish.
Signed-off-by: Tao Zhou <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Reviewed-by: Jiansong Chen <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
| #
4f1e9a76 |
| 27-Aug-2020 |
Huang Rui <[email protected]> |
drm/amdgpu: add van gogh asic_type enum (v2)
This patch adds van gogh to amd_asic_type enum and amdgpu_asic_name[].
v2: add missing comma
Signed-off-by: Huang Rui <[email protected]>
Reviewed-by:
drm/amdgpu: add van gogh asic_type enum (v2)
This patch adds van gogh to amd_asic_type enum and amdgpu_asic_name[].
v2: add missing comma
Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
| #
ddd8fbe7 |
| 10-Feb-2020 |
Jiansong Chen <[email protected]> |
drm/amdgpu: add navy_flounder asic type
Signed-off-by: Jiansong Chen <[email protected]>
Reviewed-by: Tao Zhou <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
|
|
Revision tags: v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3, v5.2-rc2, v5.2-rc1, v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5, v5.1-rc4, v5.1-rc3, v5.1-rc2 |
|
| #
ccaf72d3 |
| 18-Mar-2019 |
Likun Gao <[email protected]> |
drm/amdgpu: add sienna_cichlid asic type
Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
|
| #
4e66d7d2 |
| 30-Aug-2019 |
Yong Zhao <[email protected]> |
drm/amdgpu: Add a kernel parameter for specifying the asic type
As more and more new asics start to reuse the old device IDs before
launch, there is a need to quickly override the existing asic type
drm/amdgpu: Add a kernel parameter for specifying the asic type
As more and more new asics start to reuse the old device IDs before
launch, there is a need to quickly override the existing asic type
corresponding to the reused device ID through a kernel parameter. With
this, engineers no longer need to rely on local hack patches,
facilitating cooperation across teams.
Signed-off-by: Yong Zhao <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
| #
050091ab |
| 03-Sep-2019 |
Yong Zhao <[email protected]> |
drm/amdkfd: Query kfd device info by CHIP id instead of pci device id
This optimizes out the pci device id usage in KFD and makes the code
more maintainable.
Signed-off-by: Yong Zhao <Yong.Zhao@amd
drm/amdkfd: Query kfd device info by CHIP id instead of pci device id
This optimizes out the pci device id usage in KFD and makes the code
more maintainable.
Signed-off-by: Yong Zhao <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
| #
1eee4228 |
| 24-Jul-2019 |
Huang Rui <[email protected]> |
drm/amdgpu: add renoir asic_type enum
This patch adds renoir to amd_asic_type enum and amdgpu_asic_name[].
Acked-by: Huang Rui <[email protected]>
Signed-off-by: Huang Rui <[email protected]>
Revie
drm/amdgpu: add renoir asic_type enum
This patch adds renoir to amd_asic_type enum and amdgpu_asic_name[].
Acked-by: Huang Rui <[email protected]>
Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
|
Revision tags: v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6, v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20 |
|
| #
9802f5d7 |
| 17-Dec-2018 |
Xiaojie Yuan <[email protected]> |
drm/amdgpu: add navi12 asic type
Add asic type.
Signed-off-by: Xiaojie Yuan <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <alexander.deucher@
drm/amdgpu: add navi12 asic type
Add asic type.
Signed-off-by: Xiaojie Yuan <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
| #
d6c3b24e |
| 09-Jul-2019 |
Le Ma <[email protected]> |
drm/amdgpu: add Arcturus asic type
Add asic type for Arcturus.
Signed-off-by: Le Ma <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <alexander.deucher
drm/amdgpu: add Arcturus asic type
Add asic type for Arcturus.
Signed-off-by: Le Ma <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
| #
87dbad02 |
| 17-Dec-2018 |
Xiaojie Yuan <[email protected]> |
drm/amdgpu: add navi14 asic type
Add CHIP_NAVI14 to the list of asic types.
Signed-off-by: Xiaojie Yuan <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Jac
drm/amdgpu: add navi14 asic type
Add CHIP_NAVI14 to the list of asic types.
Signed-off-by: Xiaojie Yuan <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Jack Xiao <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
|
Revision tags: v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1, v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6, v4.19-rc5, v4.19-rc4, v4.19-rc3, v4.19-rc2, v4.19-rc1, v4.18, v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4, v4.18-rc3, v4.18-rc2, v4.18-rc1, v4.17, v4.17-rc7, v4.17-rc6, v4.17-rc5, v4.17-rc4, v4.17-rc3, v4.17-rc2, v4.17-rc1, v4.16, v4.16-rc7, v4.16-rc6, v4.16-rc5, v4.16-rc4, v4.16-rc3, v4.16-rc2, v4.16-rc1, v4.15, v4.15-rc9, v4.15-rc8, v4.15-rc7, v4.15-rc6, v4.15-rc5, v4.15-rc4, v4.15-rc3, v4.15-rc2, v4.15-rc1, v4.14, v4.14-rc8, v4.14-rc7, v4.14-rc6, v4.14-rc5, v4.14-rc4, v4.14-rc3, v4.14-rc2, v4.14-rc1, v4.13, v4.13-rc7, v4.13-rc6, v4.13-rc5, v4.13-rc4, v4.13-rc3, v4.13-rc2 |
|
| #
852a6626 |
| 18-Jul-2017 |
Huang Rui <[email protected]> |
drm/amdgpu: add navi10 asic type
Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by:
drm/amdgpu: add navi10 asic type
Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
| #
741deade |
| 13-Sep-2018 |
Alex Deucher <[email protected]> |
drm/amdgpu: simplify Raven, Raven2, and Picasso handling
Treat them all as Raven rather than adding a new picasso
asic type. This simplifies a lot of code and also handles the
case of rv2 chips wit
drm/amdgpu: simplify Raven, Raven2, and Picasso handling
Treat them all as Raven rather than adding a new picasso
asic type. This simplifies a lot of code and also handles the
case of rv2 chips with the 0x15d8 pci id. It also fixes dmcu
fw handling for picasso.
Acked-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
| #
be9699e3 |
| 10-Jul-2018 |
Likun Gao <[email protected]> |
drm/amdgpu: add picasso to asic_type enum
Add picasso to amd_asic_type enum and amdgpu_asic_name[].
Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]
drm/amdgpu: add picasso to asic_type enum
Add picasso to amd_asic_type enum and amdgpu_asic_name[].
Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
| #
956fcddc |
| 20-Apr-2018 |
Feifei Xu <[email protected]> |
drm/amdgpu: Add vega20 to asic_type enum.
Add vega20 to amd_asic_type enum and amdgpu_asic_name[].
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]
drm/amdgpu: Add vega20 to asic_type enum.
Add vega20 to amd_asic_type enum and amdgpu_asic_name[].
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|
| #
48ff108d |
| 09-Nov-2017 |
Leo Liu <[email protected]> |
drm/amdgpu: add VEGAM ASIC type
Signed-off-by: Leo Liu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
|
| #
8fab806a |
| 19-Oct-2017 |
Feifei Xu <[email protected]> |
drm/amdgpu: add vega12 to asic_type enum
Add vega12 to amd_asic_type enum and amdgpu_asic_name[].
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <alexander.deucher
drm/amdgpu: add vega12 to asic_type enum
Add vega12 to amd_asic_type enum and amdgpu_asic_name[].
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Signed-off-by: Hawking Zhang <[email protected]>
show more ...
|
|
Revision tags: v4.13-rc1, v4.12 |
|
| #
f674bd28 |
| 28-Jun-2017 |
Akshu Agrawal <[email protected]> |
drm/amdgpu Moving amdgpu asic types to a separate file
Amdgpu asic types will be required for other drivers too.
Hence, its better to keep it in a separate include file.
Reviewed-by: Alex Deucher <
drm/amdgpu Moving amdgpu asic types to a separate file
Amdgpu asic types will be required for other drivers too.
Hence, its better to keep it in a separate include file.
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Akshu Agrawal <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
show more ...
|