tty: serial: sh-sci: Add support for tx end interrupt handling

As per the RZ/G2L users hardware manual (Rev.1.20 Sep, 2022), section
23.3.7 Serial Data Transmission (Asynchronous Mode), it is mentio

tty: serial: sh-sci: Add support for tx end interrupt handling

As per the RZ/G2L users hardware manual (Rev.1.20 Sep, 2022), section
23.3.7 Serial Data Transmission (Asynchronous Mode), it is mentioned
that, set the SCR.TIE bit to 0 and SCR.TEIE bit to 1, after the last
data to be transmitted are written to the TDR.

This will generate tx end interrupt and in the handler set SCR.TE and
SCR.TEIE to 0.

Signed-off-by: Biju Das <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Add support for RZ/G2L SoC

Add serial support for RZ/G2L SoC with earlycon and
extended mode register support.

Signed-off-by: Biju Das <[email protected]>
Signed-off-by: La

serial: sh-sci: Add support for RZ/G2L SoC

Add serial support for RZ/G2L SoC with earlycon and
extended mode register support.

Signed-off-by: Biju Das <[email protected]>
Signed-off-by: Lad Prabhakar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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Revert "serial: sh-sci: Add support for RZ/G2L SoC"

This reverts commit 064b6e47b2b2d4a20566ba6f8dc90e46b599b35f as it
wasn't quite ready yet :(

Cc: Biju Das <[email protected]>
CC: Geert

Revert "serial: sh-sci: Add support for RZ/G2L SoC"

This reverts commit 064b6e47b2b2d4a20566ba6f8dc90e46b599b35f as it
wasn't quite ready yet :(

Cc: Biju Das <[email protected]>
CC: Geert Uytterhoeven <[email protected]>
Reported-by: Lad Prabhakar <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Add support for RZ/G2L SoC

Add serial support for RZ/G2L SoC with earlycon and
extended mode register support.

Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Lad

serial: sh-sci: Add support for RZ/G2L SoC

Add serial support for RZ/G2L SoC with earlycon and
extended mode register support.

Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Lad Prabhakar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Drop unused include

The sh-sci.h file includes the legacy <linux/gpio.h> header
but the driver is actually migrated to use the mctrl_gpio
library so this is not needed.

Cc: George G

serial: sh-sci: Drop unused include

The sh-sci.h file includes the legacy <linux/gpio.h> header
but the driver is actually migrated to use the mctrl_gpio
library so this is not needed.

Cc: George G. Davis <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Support for HSCIF RX sampling point adjustment

HSCIF has facilities that allow moving the RX sampling point by between
-8 and 7 sampling cycles (one sampling cycles equals 1/15 of a

serial: sh-sci: Support for HSCIF RX sampling point adjustment

HSCIF has facilities that allow moving the RX sampling point by between
-8 and 7 sampling cycles (one sampling cycles equals 1/15 of a bit
by default) to improve the error margin in case of slightly mismatched
bit rates between sender and receiver.

This patch tries to determine if shifting the sampling point can improve
the error margin and will enable it if so.

Signed-off-by: Ulrich Hecht <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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License cleanup: add SPDX GPL-2.0 license identifier to files with no license

Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine

License cleanup: add SPDX GPL-2.0 license identifier to files with no license

Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.

By default all files without license information are under the default
license of the kernel, which is GPL version 2.

Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.

This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.

How this work was done:

Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,

Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.

The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.

The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.

Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).

All documentation files were explicitly excluded.

The following heuristics were used to determine which SPDX license
identifiers to apply.

- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.

For non */uapi/* files that summary was:

SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139

and resulted in the first patch in this series.

If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:

SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930

and resulted in the second patch in this series.

- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:

SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1

and that resulted in the third patch in this series.

- when the two scanners agreed on the detected license(s), that became
the concluded license(s).

- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.

- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).

- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.

- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.

In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.

Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.

Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.

In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.

Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct

This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.

These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.

Reviewed-by: Kate Stewart <[email protected]>
Reviewed-by: Philippe Ombredanne <[email protected]>
Reviewed-by: Thomas Gleixner <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Support for variable HSCIF hardware RX timeout

HSCIF has facilities that allow changing the timeout after which an RX
interrupt is triggered even if the FIFO is not filled. This patc

serial: sh-sci: Support for variable HSCIF hardware RX timeout

HSCIF has facilities that allow changing the timeout after which an RX
interrupt is triggered even if the FIFO is not filled. This patch allows
changing the default (15 bits of silence) using the existing sysfs
attribute "rx_fifo_timeout".

Signed-off-by: Ulrich Hecht <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: consider DR (data ready) bit adequately

To allow operation with a higher RX FIFO interrupt threshold in PIO
mode, it is necessary to consider the DR bit ("FIFO not full, but no
data

serial: sh-sci: consider DR (data ready) bit adequately

To allow operation with a higher RX FIFO interrupt threshold in PIO
mode, it is necessary to consider the DR bit ("FIFO not full, but no
data received for 1.5 frames") as an indicator that data can be read.
Otherwise the driver will let data rot in the FIFO until the threshold
is reached.

Signed-off-by: Ulrich Hecht <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: add FIFO trigger bits

Defines the bits controlling FIFO thresholds, adds the additional
HSCIF registers to the register map.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.

serial: sh-sci: add FIFO trigger bits

Defines the bits controlling FIFO thresholds, adds the additional
HSCIF registers to the register map.

Signed-off-by: Ulrich Hecht <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Extend sci_port_params with more port parameters

The fifo size, overrun register and mask, sampling rate mask and error
mask all depend on the port type only and don't need to be com

serial: sh-sci: Extend sci_port_params with more port parameters

The fifo size, overrun register and mask, sampling rate mask and error
mask all depend on the port type only and don't need to be computed at
runtime. Add them to the sci_port_parameters structure.

Signed-off-by: Laurent Pinchart <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Clear (H)SCIF timeout and overrun during reset

Add the missing timeout bit definition for (H)SCIF.
Clear the timeout and overrun flag bits during UART reset, cfr. the
initialization

serial: sh-sci: Clear (H)SCIF timeout and overrun during reset

Add the missing timeout bit definition for (H)SCIF.
Clear the timeout and overrun flag bits during UART reset, cfr. the
initialization flowchart in the datasheet.

Signed-off-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Add more Serial Port Control/Data Register documentation

Improve documentation for the SCIFA/SCIFB Serial Port Control and Data
Registers:
- State clearly that the RTS and CTS line

serial: sh-sci: Add more Serial Port Control/Data Register documentation

Improve documentation for the SCIFA/SCIFB Serial Port Control and Data
Registers:
- State clearly that the RTS and CTS lines are active-low,
- Document the bits related to the serial port's SCK, RXD, and TXD
pins.

Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Peter Hurley <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Add more Serial Port Register documentation

Improve documentation for the (H)SCIF Serial Port Register:
- Make it clear the RTS and CTS lines are active-low,
- Document the bits

serial: sh-sci: Add more Serial Port Register documentation

Improve documentation for the (H)SCIF Serial Port Register:
- Make it clear the RTS and CTS lines are active-low,
- Document the bits related to the serial port's clock pin.

Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Peter Hurley <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Add more Serial Mode Register documentation

Signed-off-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

serial: sh-sci: Add BRG register definitions

Add register definitions for the Baud Rate Generator for External Clock
(BRG), as found in some SCIF and in HSCIF, including a new regtype for
the "SH-4(

serial: sh-sci: Add BRG register definitions

Add register definitions for the Baud Rate Generator for External Clock
(BRG), as found in some SCIF and in HSCIF, including a new regtype for
the "SH-4(A)"-derived SCIF variant with BRG.

Signed-off-by: Geert Uytterhoeven <[email protected]>
Acked-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Correct SCIF_ERROR_CLEAR for plain SCIF

SCIF_ERROR_CLEAR includes SCIFA_ORER, which exists only on SCIFA/SCIFB
and SCIF on sh7705/sh7720/sh7721.

To fix this:
1. Remove SCIFA_ORER

serial: sh-sci: Correct SCIF_ERROR_CLEAR for plain SCIF

SCIF_ERROR_CLEAR includes SCIFA_ORER, which exists only on SCIFA/SCIFB
and SCIF on sh7705/sh7720/sh7721.

To fix this:
1. Remove SCIFA_ORER from the definition of SCIF_ERROR_CLEAR,
2. During initialization, store the error clear mask to use,
incorporating the overrun bit only if it applies to the SCxSR
register.

Signed-off-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Prevent compiler warnings on 64-bit

Expressions involving "BIT(...)" create values of type "long", which is
64-bit on 64-bit. Hence "~BIT(...)" no longer fits in 32-bit, which
will

serial: sh-sci: Prevent compiler warnings on 64-bit

Expressions involving "BIT(...)" create values of type "long", which is
64-bit on 64-bit. Hence "~BIT(...)" no longer fits in 32-bit, which
will cause future compiler warnings when assigning to 32-bit variables:

drivers/tty/serial/sh-sci.c: In function 'sci_init_single':
drivers/tty/serial/sh-sci.h:58:25: warning: large integer implicitly truncated to unsigned type [-Woverflow]
#define SCI_ERROR_CLEAR ~(SCI_RESERVED | SCI_PER | SCI_FER | SCI_ORER)
^
drivers/tty/serial/sh-sci.c:2325:27: note: in expansion of macro 'SCI_ERROR_CLEAR'
sci_port->error_clear = SCI_ERROR_CLEAR;

As these values are (at most) 32-bit register values anyway, cast them
to "u32" at the definition level to prevent such compiler warnings.

Reported-by: kbuild test robot <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Replace buggy big #ifdef by runtime logic

The #ifdef logic to clear SCxSR bits using RMW on SCIFA/SCIFB and SCIF
variants with some SCIFA features (sh7705/SH7720/sh7721) has several

serial: sh-sci: Replace buggy big #ifdef by runtime logic

The #ifdef logic to clear SCxSR bits using RMW on SCIFA/SCIFB and SCIF
variants with some SCIFA features (sh7705/SH7720/sh7721) has several
drawbacks:
- It wasn't updated for newer R-Mobile variants (APE6),
- It doesn't correctly handle SoCs with both SCIF and SCIFA/B (e.g.
R-Car Gen2, but also legacy sh7723/sh7724),
- It doesn't play well with ARM multi-platform kernels: on R-Car Gen2,
SCIF/SCIFA/SCIFB/HSCIF were handled differently, depending on
whether r8a7740 or sh73a0 support was enabled or not,

Replace the #ifdef logic by runtime logic to fix this.

SCIFA/SCIFB and SCIF on sh7705/sh7720/sh7721 use RMW to clear error
bits, other variants use plain stores, as before.

Note that this changes behavior for SCIFA on sh7723/sh7724 (these SoCs
have both SCIF and SCIFA), which didn't use RMW before.

Signed-off-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Replace hardcoded overrun bit values

Add the missing overrun bit definition for (H)SCIF.
Replace overrun_bit by overrun_mask, so we can use the existing
defines instead of hardcoded

serial: sh-sci: Replace hardcoded overrun bit values

Add the missing overrun bit definition for (H)SCIF.
Replace overrun_bit by overrun_mask, so we can use the existing
defines instead of hardcoded values.

Signed-off-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Replace hardcoded values in SCxSR_*_CLEAR macros

Add the missing overrun error bit in SCxSR on SCIFA/SCIFB and SCIF on
SH7705/SH7720/SH7721.
Document what the corresponding bit(s) on

serial: sh-sci: Replace hardcoded values in SCxSR_*_CLEAR macros

Add the missing overrun error bit in SCxSR on SCIFA/SCIFB and SCIF on
SH7705/SH7720/SH7721.
Document what the corresponding bit(s) on plain SCIF are used for.
Sort the components of SCIF_DEFAULT_ERROR_MASK by reverse definition
order.

Replace the hardcoded values in the SCxSR_*_CLEAR macros by proper
defines. Use bit masks (negations of sets of bits) to make it more
obvious which bits are being cleared.

Assembler output (on sh) was compared before and after this commit:
- For the first branch of the big "#if defined(...) || ..." construct,
the code has changed slightly, as 32-bit bitmasks can be loaded in a
single instruction, unlike the old large 16-bit constants (the SCxSR
register is 16 bit, so we don't care about the top 16 bits),
- For the second branch, the generated code is identical.

Signed-off-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Standardize on using the BIT() macro to define register bits

Signed-off-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

serial: sh-sci: Document remaining FIFO Control Register bits

Signed-off-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

serial: sh-sci: Add SCIFA/B SCPCR register definitions

Add the register definitions for the Serial Port Control and Data
Registers on SCIFA/SCIFB, which are needed for RTS/CTS pin control.

Extracte

serial: sh-sci: Add SCIFA/B SCPCR register definitions

Add the register definitions for the Serial Port Control and Data
Registers on SCIFA/SCIFB, which are needed for RTS/CTS pin control.

Extracted from patches by Magnus Damm <[email protected]>.

Signed-off-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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serial: sh-sci: Add (H)SCIF RTS/CTS pin data register bit definitions

Add the missing register bit definitions to set the RTS pin and read the
CTS pin on (H)SCIF.

Extracted from patches by Magnus D

serial: sh-sci: Add (H)SCIF RTS/CTS pin data register bit definitions

Add the missing register bit definitions to set the RTS pin and read the
CTS pin on (H)SCIF.

Extracted from patches by Magnus Damm <[email protected]>.

Signed-off-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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