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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5 |
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| #
5cdc2376 |
| 27-Feb-2025 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel: add BPT context definition
This is needed to be shared between open/send_async/close.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Signed-off-by: Bard Liao
soundwire: intel: add BPT context definition
This is needed to be shared between open/send_async/close.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Signed-off-by: Bard Liao <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Reviewed-by: Liam Girdwood <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Tested-by: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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Revision tags: v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5 |
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| #
d2234596 |
| 19-Aug-2024 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel: add probe-time check on link id
In older platforms, the number of links was constant and hard-coded to 4. Newer platforms can have varying number of links, so we need to add a prob
soundwire: intel: add probe-time check on link id
In older platforms, the number of links was constant and hard-coded to 4. Newer platforms can have varying number of links, so we need to add a probe-time check to make sure the ACPI-reported information with _DSD properties is aligned with hardware capabilities reported in the SoundWire LCAP register.
Acked-by: Vinod Koul <[email protected]> Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Signed-off-by: Bard Liao <[email protected]> Acked-by: Mark Brown <[email protected]> Reviewed-by: Takashi Iwai <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
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Revision tags: v6.11-rc4, v6.11-rc3 |
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f8c35d61 |
| 05-Aug-2024 |
Pierre-Louis Bossart <[email protected]> |
soundwire: cadence: re-check Peripheral status with delayed_work
The SoundWire peripheral enumeration is entirely based on interrupts, more specifically sticky bits tracking state changes.
This pat
soundwire: cadence: re-check Peripheral status with delayed_work
The SoundWire peripheral enumeration is entirely based on interrupts, more specifically sticky bits tracking state changes.
This patch adds a defensive programming check on the actual status reported in PING frames. If for some reason an interrupt was lost or delayed, the delayed work would detect a peripheral change of status after the bus starts.
The 100ms defined for the delay is not completely arbitrary, if a Peripheral didn't join the bus within that delay then probably the hardware link is broken, and conversely if the detection didn't happen because of software issues the 100ms is still acceptable in terms of user experience.
The overhead of the one-shot workqueue is minimal, and the mutual exclusion ensures that the interrupt and delayed work cannot update the status concurrently.
Reviewed-by: Liam Girdwood <[email protected]> Signed-off-by: Pierre-Louis Bossart <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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Revision tags: v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3 |
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| #
9b5fd115 |
| 03-Jun-2024 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel_ace2.x: add AC timing extensions for PantherLake
The ACE3 IP used in PantherLake exposes new bitfields in the ACTMCTL register to better control clocks/delays. These bitfields were
soundwire: intel_ace2.x: add AC timing extensions for PantherLake
The ACE3 IP used in PantherLake exposes new bitfields in the ACTMCTL register to better control clocks/delays. These bitfields were reserved/zero in the ACE2.x IP, to simplify the integration the new bifields are added unconditionally. The behavior will only be impacted when the firmware exposes DSD properties to set non-zero values.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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Revision tags: v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7 |
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| #
a0df7e04 |
| 29-Apr-2024 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel_ace2.x: add support for DOAISE property
Extend previous patches with the DOAISE field and property.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Signe
soundwire: intel_ace2.x: add support for DOAISE property
Extend previous patches with the DOAISE field and property.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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75933ba5 |
| 29-Apr-2024 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel_ace2.x: add support for DODSE property
Extend previous patches with the DODSE field and property.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Signed-
soundwire: intel_ace2.x: add support for DODSE property
Extend previous patches with the DODSE field and property.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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3b0b441a |
| 29-Apr-2024 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel_ace2x: use DOAIS and DODS settings from firmware
Starting with LNL, the recommendation is to use settings read from DSD properties instead of hard-coding the values.
The DOAIS and
soundwire: intel_ace2x: use DOAIS and DODS settings from firmware
Starting with LNL, the recommendation is to use settings read from DSD properties instead of hard-coding the values.
The DOAIS and DODS values are completely-specific to Intel and are stored in a vendor-specific property structure.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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Revision tags: v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3 |
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| #
312316d5 |
| 15-May-2023 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel_ace2x: add debugfs support
Add access to registers in SHIM and SHIM_VS (vendor-specific) areas.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-
soundwire: intel_ace2x: add debugfs support
Add access to registers in SHIM and SHIM_VS (vendor-specific) areas.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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881cf1e9 |
| 15-May-2023 |
Pierre-Louis Bossart <[email protected]> |
ASoC/soundwire: intel: pass hdac_bus pointer for link management
The hdac_bus pointer is used to access the extended link information and handle power management. Pass it from the SOF driver down to
ASoC/soundwire: intel: pass hdac_bus pointer for link management
The hdac_bus pointer is used to access the extended link information and handle power management. Pass it from the SOF driver down to the auxiliary devices.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Signed-off-by: Bard Liao <[email protected]> Acked-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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e40e0e11 |
| 15-May-2023 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel/cadence: set ip_offset at run-time
Select relevant ip-offset depending on hardware version. This offset is used to access MCP_ or IP_MCP_ registers with a fixed offset.
For existin
soundwire: intel/cadence: set ip_offset at run-time
Select relevant ip-offset depending on hardware version. This offset is used to access MCP_ or IP_MCP_ registers with a fixed offset.
For existing platforms, the offset is exactly zero. Starting with LunarLake, the offset is 0x4000.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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6ab915b9 |
| 15-May-2023 |
Pierre-Louis Bossart <[email protected]> |
soundwire/ASOC: Intel: update offsets for LunarLake
The previous settings are not applicable, use a flag to determine what the register layout is.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.
soundwire/ASOC: Intel: update offsets for LunarLake
The previous settings are not applicable, use a flag to determine what the register layout is.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Signed-off-by: Bard Liao <[email protected]> Acked-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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Revision tags: v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3 |
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fb43d62e |
| 14-Mar-2023 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel: move bank switch routine to common intel_bus_common.c
No functionality change, just moving the routines to a common file so that they can be used for new hardware.
Signed-off-by:
soundwire: intel: move bank switch routine to common intel_bus_common.c
No functionality change, just moving the routines to a common file so that they can be used for new hardware.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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1e76de2e |
| 14-Mar-2023 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel: add abstraction for cmdsync check
If we add one more callback, we can have common bank switch sequences between old and new hardware: the only difference is where the CMDSYNC regis
soundwire: intel: add abstraction for cmdsync check
If we add one more callback, we can have common bank switch sequences between old and new hardware: the only difference is where the CMDSYNC register is located.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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1a1a6a69 |
| 14-Mar-2023 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel: move bus common sequences to different file
Now that the bus start/stop/clock_stop sequences use the ops, we can move them to a different file to reuse them.
Note that we could in
soundwire: intel: move bus common sequences to different file
Now that the bus start/stop/clock_stop sequences use the ops, we can move them to a different file to reuse them.
Note that we could in theory remove the abstraction for all those sequences and directly call the functions in intel_auxdevice.c. To allow for more flexibility and have means to special-case new platforms, we decided to keep the abstraction. If in time it becomes clear there is no benefit the abstraction will be simplified.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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84706e9a |
| 14-Mar-2023 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel: add sync_arm/sync_go to ops
The bus start/stop sequences can be reused between platforms if we add a couple of new callbacks. In following patches the code will be moved to a share
soundwire: intel: add sync_arm/sync_go to ops
The bus start/stop sequences can be reused between platforms if we add a couple of new callbacks. In following patches the code will be moved to a shared file.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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4dd50aff |
| 14-Mar-2023 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel: move common definitions to header file
Prepare for reused for addition of new hardware
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rand
soundwire: intel: move common definitions to header file
Prepare for reused for addition of new hardware
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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Revision tags: v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5 |
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| #
7cbf00bd |
| 11-Nov-2022 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel: split auxdevice to different file
The auxdevice layer is completely generic, it should be split from intel.c which is only geared to the 'cnl' hw_ops now.
Signed-off-by: Pierre-Lo
soundwire: intel: split auxdevice to different file
The auxdevice layer is completely generic, it should be split from intel.c which is only geared to the 'cnl' hw_ops now.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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36e3b385 |
| 11-Nov-2022 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel: add in-band wake callbacks in hw_ops
No functionality change, only add indirection for in-band wake management helpers.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@l
soundwire: intel: add in-band wake callbacks in hw_ops
No functionality change, only add indirection for in-band wake management helpers.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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49c9ff45 |
| 11-Nov-2022 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel: add link power management callbacks in hw_ops
No functionality change, only add indirection for link power management helpers.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bo
soundwire: intel: add link power management callbacks in hw_ops
No functionality change, only add indirection for link power management helpers.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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3db0c5a6 |
| 11-Nov-2022 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel: add bus management callbacks in hw_ops
No functionality change, only add indirection for bus management helpers.
Signed-off-by: Pierre-Louis Bossart <[email protected]
soundwire: intel: add bus management callbacks in hw_ops
No functionality change, only add indirection for bus management helpers.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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b6234bcc |
| 11-Nov-2022 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel: add register_dai callback in hw_ops
No functionality change, only add indirection for DAI registration helper.
Signed-off-by: Pierre-Louis Bossart <[email protected]
soundwire: intel: add register_dai callback in hw_ops
No functionality change, only add indirection for DAI registration helper.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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fb2dc6a0 |
| 11-Nov-2022 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel: add debugfs callbacks in hw_ops
No functionality change, only add indirection for debugfs helpers.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Revie
soundwire: intel: add debugfs callbacks in hw_ops
No functionality change, only add indirection for debugfs helpers.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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b3ad31f3 |
| 11-Nov-2022 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel: start using hw_ops
Before introducing new hardware with completely different register spaces and programming sequences, we need to abstract some of the existing routines in hw_ops
soundwire: intel: start using hw_ops
Before introducing new hardware with completely different register spaces and programming sequences, we need to abstract some of the existing routines in hw_ops that will be platform-specific. For now we only use the 'cnl' ops - after the first Intel platform with SoundWire capabilities.
Rather than one big intrusive patch, hw_ops are introduced in this patch so show the dependencies between drivers. Follow-up patches will introduce callbacks for debugfs, power and bus management.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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Revision tags: v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7 |
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| #
e4401abb |
| 18-Aug-2021 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel: skip suspend/resume/wake when link was not started
The SoundWire Linux devices are created purely based on information provided by platform firmware (e.g. ACPI DSDT table). When th
soundwire: intel: skip suspend/resume/wake when link was not started
The SoundWire Linux devices are created purely based on information provided by platform firmware (e.g. ACPI DSDT table). When the kernel finds a matching driver for the device address (_ADR), the probe will initialize required data structures and initialize pm ops.
When the SoundWire link is started at a later point, the physical devices will synchronize on the SoundWire frames and report their attachment status, thereby triggering the enumeration and initialization of device registers.
This two-step solution was a conscious design decision to allow e.g. a driver to use sideband mechanisms to turn power rails on. This can also allow OEMs to describe multiple platforms with the same DSDT table, the devices that are not physically present in hardware.
The drawback of this approach is a bit of confusion, with more devices than are actually present in hardware. This results in 'ghost' devices, for which the driver successfully probes, but that will not generate any traffic on the bus. suspend-resume transitions are handled by drivers, and skipped when the devices are not physically present.
This patch provides a work-around for a second-level of confusion in platform firmware: some platforms only use HDaudio links, but nevertheless expose SoundWire 'ghost' devices. This results in error messages in the Intel driver while trying to suspend/resume these links. The simplest solution is to add a boolean status flag to skip all suspend/resume/wake sequences if the link was never started.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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Revision tags: v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2 |
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| #
29a269c6 |
| 11-May-2021 |
Pierre-Louis Bossart <[email protected]> |
soundwire: intel: move to auxiliary bus
Now that the auxiliary_bus exists, there's no reason to use platform devices as children of a PCI device any longer.
This patch refactors the code by extendi
soundwire: intel: move to auxiliary bus
Now that the auxiliary_bus exists, there's no reason to use platform devices as children of a PCI device any longer.
This patch refactors the code by extending a basic auxiliary device with Intel link-specific structures that need to be passed between controller and link levels. This refactoring is much cleaner with no need for cross-pointers between device and link structures.
Note that the auxiliary bus API has separate init and add steps, which requires more attention in the error unwinding paths. The main loop needs to deal with kfree() and auxiliary_device_uninit() for the current iteration before jumping to the common label which releases everything allocated in prior iterations.
Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Guennadi Liakhovetski <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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