soc: renesas: rz-sysc: Move RZ/V2H SoC detection to the SYS driver

As per the other SoC variant of the same family, the system controller
provides SoC ID in its own registers.

Signed-off-by: John M

soc: renesas: rz-sysc: Move RZ/V2H SoC detection to the SYS driver

As per the other SoC variant of the same family, the system controller
provides SoC ID in its own registers.

Signed-off-by: John Madieu <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...

soc: renesas: rz-sysc: Add support for RZ/G3E family

Add SoC detection support for the RZ/G3E SoC. Also add support for
detecting the number of cores and the ETHOS-U55 NPU, and also detect PLL
mism

soc: renesas: rz-sysc: Add support for RZ/G3E family

Add SoC detection support for the RZ/G3E SoC. Also add support for
detecting the number of cores and the ETHOS-U55 NPU, and also detect PLL
mismatch for SW settings other than 1.7GHz.

Signed-off-by: John Madieu <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...

soc: renesas: rz-sysc: Move RZ/G3S SoC detection to the SYSC driver

Now that we have SoC detection in the RZ SYSC driver, move the RZ/G3S
SoC detection to it. The SYSC provides SoC ID in its own reg

soc: renesas: rz-sysc: Move RZ/G3S SoC detection to the SYSC driver

Now that we have SoC detection in the RZ SYSC driver, move the RZ/G3S
SoC detection to it. The SYSC provides SoC ID in its own registers.

Signed-off-by: Claudiu Beznea <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: John Madieu <[email protected]>
Link: https://lore.kernel.org/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...

soc: renesas: Add SYSC driver for Renesas RZ family

The RZ/G3S system controller (SYSC) has various registers that control
different functionalities. One of the exposed register offers
information

soc: renesas: Add SYSC driver for Renesas RZ family

The RZ/G3S system controller (SYSC) has various registers that control
different functionalities. One of the exposed register offers
information about the SoC identification.

Add a driver that identifies the SoC. Later the driver will be extended
with other functionalities.

Signed-off-by: Claudiu Beznea <[email protected]>
Signed-off-by: John Madieu <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...

soc: renesas: Add RZ/G3E (R9A09G047) config option

Add a configuration option for the RZ/G3E SoC.

Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Geert Uytterhoeven <geert+renesas

soc: renesas: Add RZ/G3E (R9A09G047) config option

Add a configuration option for the RZ/G3E SoC.

Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...

irqchip: Add RZ/V2H(P) Interrupt Control Unit (ICU) driver

Add driver for the Renesas RZ/V2H(P) Interrupt Control Unit (ICU).

This driver supports the external interrupts NMI, IRQn, and TINTn.

Sig

irqchip: Add RZ/V2H(P) Interrupt Control Unit (ICU) driver

Add driver for the Renesas RZ/V2H(P) Interrupt Control Unit (ICU).

This driver supports the external interrupts NMI, IRQn, and TINTn.

Signed-off-by: Fabrizio Castro <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Link: https://lore.kernel.org/all/[email protected]

show more ...

soc: renesas: Enable TMU support on R-Car Gen2

All Renesas R-Car Gen2 SoCs have Timer Units (TMU). Enable support for
them by selecting the SYS_SUPPORTS_SH_TMU gatekeeper config symbol.

Signed-off

soc: renesas: Enable TMU support on R-Car Gen2

All Renesas R-Car Gen2 SoCs have Timer Units (TMU). Enable support for
them by selecting the SYS_SUPPORTS_SH_TMU gatekeeper config symbol.

Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Niklas Söderlund <[email protected]>
Reviewed-by: Wolfram Sang <[email protected]>
Link: https://lore.kernel.org/r/b7b9fdd6f517a8b29bf5754e7f083d3b71805130.1710865761.git.geert+renesas@glider.be

show more ...

soc: renesas: Add identification support for RZ/V2H SoC

Add support to identify the RZ/V2H (R9A09G057) SoC.

Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Fabri

soc: renesas: Add identification support for RZ/V2H SoC

Add support to identify the RZ/V2H (R9A09G057) SoC.

Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Fabrizio Castro <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...

soc: renesas: Identify R-Car V4M

Add support for identifying the R-Car V4M (R8A779H0) SoC.

Signed-off-by: Duy Nguyen <[email protected]>
Signed-off-by: Geert Uytterhoeven <geert+renesas@gli

soc: renesas: Identify R-Car V4M

Add support for identifying the R-Car V4M (R8A779H0) SoC.

Signed-off-by: Duy Nguyen <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Wolfram Sang <[email protected]>
Reviewed-by: Niklas Söderlund <[email protected]>
Link: https://lore.kernel.org/r/31e06d055aec1bc70c3e9a02f9268bcfc72b2204.1706194617.git.geert+renesas@glider.be

show more ...

soc: renesas: Introduce ARCH_RCAR_GEN4

Currently, all Kconfig symbols for R-Car Gen4 SoCs select the
ARCH_RCAR_GEN3 SoC family symbol, which might confuse the casual reader.

Fix this by introducing

soc: renesas: Introduce ARCH_RCAR_GEN4

Currently, all Kconfig symbols for R-Car Gen4 SoCs select the
ARCH_RCAR_GEN3 SoC family symbol, which might confuse the casual reader.

Fix this by introducing a new SoC family symbol for R-Car Gen4 SoCs.
For now this just selects ARCH_RCAR_GEN3, to avoid duplication, and to
relax dependencies.

Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Wolfram Sang <[email protected]>
Reviewed-by: Niklas Söderlund <[email protected]>
Link: https://lore.kernel.org/r/a283913ba7a39ec2dae0ebf9fc2b06096f009511.1706194617.git.geert+renesas@glider.be

show more ...

soc: renesas: Make RZ/Five depend on !DMA_DIRECT_REMAP

Randy reported yet another build issue with randconfigs on rv32:
WARNING: unmet direct dependencies detected for DMA_GLOBAL_POOL
Depends on [

soc: renesas: Make RZ/Five depend on !DMA_DIRECT_REMAP

Randy reported yet another build issue with randconfigs on rv32:
WARNING: unmet direct dependencies detected for DMA_GLOBAL_POOL
Depends on [n]: !ARCH_HAS_DMA_SET_UNCACHED [=n] && !DMA_DIRECT_REMAP [=y]
Selected by [y]:
- ARCH_R9A07G043 [=y] && SOC_RENESAS [=y] && RISCV [=y] && NONPORTABLE [=y] && RISCV_ALTERNATIVE [=y] && !RISCV_ISA_ZICBOM [=n] && RISCV_SBI [=y]

This happens when DMA_DIRECT_REMAP is selected by the T-Head CMO erratum
option and DMA_GLOBAL_POOL is selected by the Andes CMO erratum. Block
selecting the RZ/Five config option, and by extension DMA_GLOBAL_POOL,
if DMA_DIRECT_REMAP has already been enabled.

Reported-by: Randy Dunlap <[email protected]>
Closes: https://lore.kernel.org/all/[email protected]/
Tested-by: Randy Dunlap <[email protected]> # build-tested
Signed-off-by: Conor Dooley <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/20231211-primate-arbitrate-fbcd307a0b00@spud
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...

soc: renesas: ARCH_R9A07G043 depends on !RISCV_ISA_ZICBOM

ARCH_R9A07G043 has its own non-standard global pool based DMA coherent
allocator, which conflicts with the remap based RISCV_ISA_ZICBOM vers

soc: renesas: ARCH_R9A07G043 depends on !RISCV_ISA_ZICBOM

ARCH_R9A07G043 has its own non-standard global pool based DMA coherent
allocator, which conflicts with the remap based RISCV_ISA_ZICBOM version.
Add a proper dependency.

Signed-off-by: Christoph Hellwig <[email protected]>
Reviewed-by: Lad Prabhakar <[email protected]>
Acked-by: Conor Dooley <[email protected]>
Acked-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...

soc: renesas: Make ARCH_R9A07G043 depend on required options

Randy reported a randconfig build issue against linux-next:

WARNING: unmet direct dependencies detected for ERRATA_ANDES
Depen

soc: renesas: Make ARCH_R9A07G043 depend on required options

Randy reported a randconfig build issue against linux-next:

WARNING: unmet direct dependencies detected for ERRATA_ANDES
Depends on [n]: RISCV_ALTERNATIVE [=n] && RISCV_SBI [=y]
Selected by [y]:
- ARCH_R9A07G043 [=y] && SOC_RENESAS [=y] && RISCV [=y] && NONPORTABLE [=y] && RISCV_SBI [=y]

../arch/riscv/errata/andes/errata.c:59:54: warning: 'struct alt_entry' declared inside parameter list will not be visible outside of this definition or declaration
59 | void __init_or_module andes_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,

On RISC-V, alternatives are not usable in XIP kernels, which this
randconfig happened to select. Rather than add a check for whether
alternatives are available before selecting the ERRATA_ANDES config
option, rework the R9A07G043 Kconfig entry to depend on the
configuration options required to support its non-standard cache
coherency implementation.

Without these options enabled, the SoC is effectively non-functional to
begin with, so there's an extra benefit in preventing the creation of
non-functional kernels.

The "if RISCV_DMA_NONCOHERENT" can be dropped, as ERRATA_ANDES_CMO will
select it.

Reported-by: Randy Dunlap <[email protected]>
Closes: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Conor Dooley <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/20231012-pouch-parkway-7d26c04b3300@spud
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...

soc: renesas: Make ARCH_R9A07G043 (riscv version) depend on NONPORTABLE

Drew found "CONFIG_DMA_GLOBAL_POOL=y causes ADMA buffer alloc to fail"
the log looks like:

mmc0: Unable to allocate ADMA

soc: renesas: Make ARCH_R9A07G043 (riscv version) depend on NONPORTABLE

Drew found "CONFIG_DMA_GLOBAL_POOL=y causes ADMA buffer alloc to fail"
the log looks like:

mmc0: Unable to allocate ADMA buffers - falling back to standard DMA

The logic is: generic riscv defconfig selects ARCH_RENESAS then
ARCH_R9A07G043 which selects DMA_GLOBAL_POOL, which assumes all
non-dma-coherent riscv platforms have a dma global pool, this assumption
seems not correct. And I believe DMA_GLOBAL_POOL should not be
selected by ARCH_SOCFAMILIY, instead, only ARCH under some specific
conditions can select it globaly, for example NOMMU ARM and so on,
because it's designed for special cases such as "nommu cases where
non-cacheable memory lives in a fixed place in the physical address
map" as pointed out by Robin.

Fix the issue by making ARCH_R9A07G043 (riscv version) depend on
NONPORTABLE, thus generic defconfig won't select ARCH_R9A07G043 by
default. And even for random config case, there will be less debug
effort once we see NONPORTABLE is enabled.

Reported-by: Drew Fustini <[email protected]>
Closes: https://lore.kernel.org/linux-riscv/ZRuamJuShOnvP1pr@x1/
Fixes: 484861e09f3e ("soc: renesas: Kconfig: Select the required configs for RZ/Five SoC")
Signed-off-by: Jisheng Zhang <[email protected]>
Reviewed-by: Robin Murphy <[email protected]>
Reviewed-by: Lad Prabhakar <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Tested-by: Drew Fustini <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...

pmdomain: renesas: Move Kconfig options to the pmdomain subsystem

The Kconfig options belongs closer to the corresponding implementations,
hence let's move them from the soc subsystem to the pmdomai

pmdomain: renesas: Move Kconfig options to the pmdomain subsystem

The Kconfig options belongs closer to the corresponding implementations,
hence let's move them from the soc subsystem to the pmdomain subsystem.

Cc: Geert Uytterhoeven <[email protected]>
Cc: Magnus Damm <[email protected]>
Cc: <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Acked-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Ulf Hansson <[email protected]>

show more ...

soc: renesas: Kconfig: Remove blank line before ARCH_R9A07G043 help text

There should not be a blank line before the "help" keyword in the
ARCH_R9A07G043 configuration section.

Fixes: c6a906cce61a8

soc: renesas: Kconfig: Remove blank line before ARCH_R9A07G043 help text

There should not be a blank line before the "help" keyword in the
ARCH_R9A07G043 configuration section.

Fixes: c6a906cce61a8015 ("soc: renesas: Kconfig: For ARCH_R9A07G043 select the required configs if dependencies are met")
Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Lad Prabhakar <[email protected]>
Link: https://lore.kernel.org/r/2a3a9d595579b7cea416c12bf9abcfa2227243bb.1694768174.git.geert+renesas@glider.be

show more ...

soc: renesas: Identify RZ/G3S SoC

Add support to identify the RZ/G3S (R9A08G045) SoC.

Signed-off-by: Claudiu Beznea <[email protected]>
Reviewed-by: Geert Uytterhoeven <geert+renesas

soc: renesas: Identify RZ/G3S SoC

Add support to identify the RZ/G3S (R9A08G045) SoC.

Signed-off-by: Claudiu Beznea <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...

soc: renesas: Kconfig: For ARCH_R9A07G043 select the required configs if dependencies are met

To prevent randconfig build issues when enabling the RZ/Five SoC, consider
selecting specific configurat

soc: renesas: Kconfig: For ARCH_R9A07G043 select the required configs if dependencies are met

To prevent randconfig build issues when enabling the RZ/Five SoC, consider
selecting specific configurations only when their dependencies are
satisfied.

Reported-by: kernel test robot <[email protected]>
Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/
Signed-off-by: Lad Prabhakar <[email protected]>
Fixes: 484861e09f3e ("soc: renesas: Kconfig: Select the required configs for RZ/Five SoC")
Reviewed-by: Geert Uytterhoeven <[email protected]>
Acked-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Palmer Dabbelt <[email protected]>

show more ...

soc: renesas: Kconfig: Select the required configs for RZ/Five SoC

Explicitly select the required Cache management and Errata configs
required for the RZ/Five SoC.

Signed-off-by: Lad Prabhakar <pra

soc: renesas: Kconfig: Select the required configs for RZ/Five SoC

Explicitly select the required Cache management and Errata configs
required for the RZ/Five SoC.

Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Acked-by: Geert Uytterhoeven <[email protected]>
Tested-by: Conor Dooley <[email protected]> # tyre-kicking on a d1
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Palmer Dabbelt <[email protected]>

show more ...

soc: renesas: Remove r8a77950 arch

R-Car H3 ES1.* was only available to an internal development group and
needed a lot of quirks and workarounds. These become a maintenance
burden now, so our devel

soc: renesas: Remove r8a77950 arch

R-Car H3 ES1.* was only available to an internal development group and
needed a lot of quirks and workarounds. These become a maintenance
burden now, so our development group decided to remove upstream support
and disable booting for this SoC. Public users only have ES2 onwards.

Remove the architecture which describes H3 ES1.*.

Signed-off-by: Wolfram Sang <[email protected]>
Reviewed-by: Laurent Pinchart <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...

soc: renesas: Add PWC support for RZ/V2M

The Renesas RZ/V2M External Power Sequence Controller (PWC)
IP is capable of:
* external power supply on/off sequence generation
* on/off signal generation f

soc: renesas: Add PWC support for RZ/V2M

The Renesas RZ/V2M External Power Sequence Controller (PWC)
IP is capable of:
* external power supply on/off sequence generation
* on/off signal generation for the LPDDR4 core power supply (LPVDD)
* key input signals processing
* general-purpose output pins

Add the corresponding device driver.

Signed-off-by: Fabrizio Castro <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...

soc: renesas: Kconfig: Explicitly select GPIOLIB and PINCTRL config under SOC_RENESAS

GPIOLIB and PINCTRL config options are required by all ARM32/ARM64/RISC-V
Renesas SoCs, so instead of selecting

soc: renesas: Kconfig: Explicitly select GPIOLIB and PINCTRL config under SOC_RENESAS

GPIOLIB and PINCTRL config options are required by all ARM32/ARM64/RISC-V
Renesas SoCs, so instead of selecting them under ARCH_RENESAS for each
architecture just explicitly select them under SOC_RENESAS config option
which will be visible for all the three architectures (if ARCH_RENESAS is
enabled).

Suggested-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Lad Prabhakar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...

soc: renesas: Identify RZ/Five SoC

Add support for identifying the (R9A07G043) RZ/Five SoC.

Signed-off-by: Lad Prabhakar <[email protected]>
Link: https://lore.kernel.org/r/20

soc: renesas: Identify RZ/Five SoC

Add support for identifying the (R9A07G043) RZ/Five SoC.

Signed-off-by: Lad Prabhakar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...

soc: renesas: Kconfig: Enable IRQC driver for RZ/G2L SoC

Select RENESAS_RZG2L_IRQC config option if ARCH_RZG2L is enabled
so that IRQC driver is enabled on RZ/G2L (and alike) SoC's.

Signed-off-by:

soc: renesas: Kconfig: Enable IRQC driver for RZ/G2L SoC

Select RENESAS_RZG2L_IRQC config option if ARCH_RZG2L is enabled
so that IRQC driver is enabled on RZ/G2L (and alike) SoC's.

Signed-off-by: Lad Prabhakar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...

soc: renesas: rzn1: Select PM and PM_GENERIC_DOMAINS configs

PM and PM_GENERIC_DOMAINS configs are required for RZ/N1 SOCs.
Without these configs, the clocks used by the PCI bridge are not
enabled a

soc: renesas: rzn1: Select PM and PM_GENERIC_DOMAINS configs

PM and PM_GENERIC_DOMAINS configs are required for RZ/N1 SOCs.
Without these configs, the clocks used by the PCI bridge are not
enabled and so accessing the devices leads to a kernel crash:

Unhandled fault: external abort on non-linefetch (0x1008) at 0x90b5f848

Select PM and PM_GENERIC_DOMAINS for ARCH_RZN1

Signed-off-by: Herve Codina <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>

show more ...