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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12 |
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5a67c0d1 |
| 12-Nov-2024 |
Basavaraj Natikar <[email protected]> |
platform/x86/amd: amd_3d_vcache: Add AMD 3D V-Cache optimizer driver
AMD X3D processors, also known as AMD 3D V-Cache, feature dual Core Complex Dies (CCDs) and enlarged L3 cache, enabling dynamic m
platform/x86/amd: amd_3d_vcache: Add AMD 3D V-Cache optimizer driver
AMD X3D processors, also known as AMD 3D V-Cache, feature dual Core Complex Dies (CCDs) and enlarged L3 cache, enabling dynamic mode switching between Frequency and Cache modes. To optimize performance, implement the AMD 3D V-Cache Optimizer, which allows selecting either:
Frequency mode: cores within the faster CCD are prioritized before those in the slower CCD.
Cache mode: cores within the larger L3 CCD are prioritized before those in the smaller L3 CCD.
Co-developed-by: Perry Yuan <[email protected]> Signed-off-by: Perry Yuan <[email protected]> Co-developed-by: Mario Limonciello <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Shyam Sundar S K <[email protected]> Reviewed-by: Armin Wolf <[email protected]> Signed-off-by: Basavaraj Natikar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Ilpo Järvinen <[email protected]> Signed-off-by: Ilpo Järvinen <[email protected]>
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Revision tags: v6.12-rc7, v6.12-rc6, v6.12-rc5 |
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9df19308 |
| 21-Oct-2024 |
Suma Hegde <[email protected]> |
platform/x86/amd/hsmp: Create hsmp/ directory
This is in preparation to splitting ACPI and platform device drivers. Create and move hsmp specific code into its own directory, no logical changes.
Si
platform/x86/amd/hsmp: Create hsmp/ directory
This is in preparation to splitting ACPI and platform device drivers. Create and move hsmp specific code into its own directory, no logical changes.
Signed-off-by: Suma Hegde <[email protected]> Reviewed-by: Naveen Krishna Chatradhi <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]>
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Revision tags: v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7 |
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ba8dcff0 |
| 06-Jan-2024 |
Suma Hegde <[email protected]> |
platform/x86/amd/hsmp: Add support for ACPI based probing
ACPI table provides mailbox base address and register offset information. The base address is provided as part of CRS method and mailbox off
platform/x86/amd/hsmp: Add support for ACPI based probing
ACPI table provides mailbox base address and register offset information. The base address is provided as part of CRS method and mailbox offsets are provided through DSD table. Sockets are differentiated by UIDs.
Signed-off-by: Suma Hegde <[email protected]> Signed-off-by: Naveen Krishna Chatradhi <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] [ij: Removed extra parenthesis.] Signed-off-by: Ilpo Järvinen <[email protected]>
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Revision tags: v6.7-rc8, v6.7-rc7, v6.7-rc6 |
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58e82a62 |
| 11-Dec-2023 |
Ma Jun <[email protected]> |
platform/x86/amd: Add support for AMD ACPI based Wifi band RFI mitigation feature
Due to electrical and mechanical constraints in certain platform designs there may be likely interference of relativ
platform/x86/amd: Add support for AMD ACPI based Wifi band RFI mitigation feature
Due to electrical and mechanical constraints in certain platform designs there may be likely interference of relatively high-powered harmonics of the (G-)DDR memory clocks with local radio module frequency bands used by Wifi 6/6e/7.
To mitigate this, AMD has introduced a mechanism that devices can use to notify active use of particular frequencies so that other devices can make relative internal adjustments as necessary to avoid this resonance.
Co-developed-by: Evan Quan <[email protected]> Signed-off-by: Evan Quan <[email protected]> Signed-off-by: Ma Jun <[email protected]> Reviewed-by: Mario Limonciello <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
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Revision tags: v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6 |
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92c2fb8f |
| 11-Aug-2023 |
Shyam Sundar S K <[email protected]> |
platform/x86/amd/pmc: Move PMC driver to separate directory
With latest commits having PMC code spread across multiple files, it would be easier to maintain them in a separate directory under amd/pm
platform/x86/amd/pmc: Move PMC driver to separate directory
With latest commits having PMC code spread across multiple files, it would be easier to maintain them in a separate directory under amd/pmc.
Co-developed-by: Sanket Goswami <[email protected]> Signed-off-by: Sanket Goswami <[email protected]> Signed-off-by: Shyam Sundar S K <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
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Revision tags: v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7 |
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310e782a |
| 09-Apr-2023 |
Shyam Sundar S K <[email protected]> |
platform/x86/amd: pmc: Utilize SMN index 0 for driver probe
The current SMN index used for the driver probe seems to be meant for the BIOS pair and there are potential concurrency problems that can
platform/x86/amd: pmc: Utilize SMN index 0 for driver probe
The current SMN index used for the driver probe seems to be meant for the BIOS pair and there are potential concurrency problems that can occur with an inopportune SMI.
It is been advised to use SMN_INDEX_0 instead of SMN_INDEX_2, which is what amd_nb.c provides and this function has protections to ensure that only one caller can use it at a time.
Fixes: 156ec4731cb2 ("platform/x86: amd-pmc: Add AMD platform support for S2Idle") Co-developed-by: Sanket Goswami <[email protected]> Signed-off-by: Sanket Goswami <[email protected]> Signed-off-by: Shyam Sundar S K <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
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Revision tags: v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6 |
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abce209d |
| 27-Jan-2023 |
Arnd Bergmann <[email protected]> |
platform/x86/amd: pmc: add CONFIG_SERIO dependency
Using the serio subsystem now requires the code to be reachable:
x86_64-linux-ld: drivers/platform/x86/amd/pmc.o: in function `amd_pmc_suspend_han
platform/x86/amd: pmc: add CONFIG_SERIO dependency
Using the serio subsystem now requires the code to be reachable:
x86_64-linux-ld: drivers/platform/x86/amd/pmc.o: in function `amd_pmc_suspend_handler': pmc.c:(.text+0x86c): undefined reference to `serio_bus'
Add the usual dependency: as other users of serio use 'select' rather than 'depends on', use the same here.
Fixes: 8e60615e8932 ("platform/x86/amd: pmc: Disable IRQ1 wakeup for RN/CZN") Signed-off-by: Arnd Bergmann <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
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Revision tags: v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1 |
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da5ce22d |
| 02-Aug-2022 |
Shyam Sundar S K <[email protected]> |
platform/x86/amd/pmf: Add support for PMF core layer
PMF core layer is meant to abstract the common functionalities across PMF features. This layer also does the plumbing work like setting up the ma
platform/x86/amd/pmf: Add support for PMF core layer
PMF core layer is meant to abstract the common functionalities across PMF features. This layer also does the plumbing work like setting up the mailbox channel for the communication between the PMF driver and the PMFW (Power Management Firmware) running on the SMU.
Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Shyam Sundar S K <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
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Revision tags: v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2 |
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ef233eaf |
| 08-Jun-2022 |
Shyam Sundar S K <[email protected]> |
platform/x86: Move AMD platform drivers to separate directory
Currently, AMD supported platform drivers are grouped under generic "x86" folder structure. Move the current drivers (amd-pmc and amd_hs
platform/x86: Move AMD platform drivers to separate directory
Currently, AMD supported platform drivers are grouped under generic "x86" folder structure. Move the current drivers (amd-pmc and amd_hsmp) to a separate directory. This would also mean the newer driver submissions to pdx86 subsystem in the future will also land in AMD specific directory.
Reviewed-by: Naveen Krishna Chatradhi <[email protected]> Tested-by: Suma Hegde <[email protected]> Signed-off-by: Shyam Sundar S K <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
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