pinctrl: qcom: Introduce SM4250 LPI pinctrl driver

Add support for the pin controller block on SM4250 Low Power Island.

Signed-off-by: Srinivas Kandagatla <[email protected]>
Reviewed-

pinctrl: qcom: Introduce SM4250 LPI pinctrl driver

Add support for the pin controller block on SM4250 Low Power Island.

Signed-off-by: Srinivas Kandagatla <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: sm8650-lpass-lpi: correct Kconfig name

Use proper model name in SM8650 LPASS pin controller Kconfig entry.

Cc: <[email protected]>
Fixes: c4e47673853f ("pinctrl: qcom: sm8650-l

pinctrl: qcom: sm8650-lpass-lpi: correct Kconfig name

Use proper model name in SM8650 LPASS pin controller Kconfig entry.

Cc: <[email protected]>
Fixes: c4e47673853f ("pinctrl: qcom: sm8650-lpass-lpi: add SM8650 LPASS")
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: sm8650-lpass-lpi: add SM8650 LPASS

Add driver for the pin controller in Low Power Audio SubSystem (LPASS)
of Qualcomm SM8650 SoC.

Notable differences against SM8550 LPASS pin control

pinctrl: qcom: sm8650-lpass-lpi: add SM8650 LPASS

Add driver for the pin controller in Low Power Audio SubSystem (LPASS)
of Qualcomm SM8650 SoC.

Notable differences against SM8550 LPASS pin controller:
1. Additional address space for slew rate thus driver uses
LPI_FLAG_SLEW_RATE_SAME_REG and sets slew rate via different
register.

2. Two new pin mux functions: qca_swr_clk and qca_swr_data

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: Introduce SM6115 LPI pinctrl driver

Add support for the pin controller block on SM6115's Low Power Island.

Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-of

pinctrl: qcom: Introduce SM6115 LPI pinctrl driver

Add support for the pin controller block on SM6115's Low Power Island.

Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: Introduce SM6115 LPI pinctrl driver

Add support for the pin controller block on SM6115's Low Power Island.

Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-of

pinctrl: qcom: Introduce SM6115 LPI pinctrl driver

Add support for the pin controller block on SM6115's Low Power Island.

Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Krzysztof Kozlowski <[email protected]>

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pinctrl: qcom: sm8350-lpass-lpi: add SM8350 LPASS TLMM

Add driver for pin controller in Low Power Audio SubSystem (LPASS). The
driver is similar to SM8250 LPASS pin controller, with difference in o

pinctrl: qcom: sm8350-lpass-lpi: add SM8350 LPASS TLMM

Add driver for pin controller in Low Power Audio SubSystem (LPASS). The
driver is similar to SM8250 LPASS pin controller, with difference in one
new pin (gpio14) belonging to swr_tx_data.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Krzysztof Kozlowski <[email protected]>

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pinctrl: qcom: organize audio drivers in menuconfig

The audio pin controller drivers depend on PINCTRL_LPASS_LPI, but since
PINCTRL_LPASS_LPI is not the first entry, they are not displayed in
menuco

pinctrl: qcom: organize audio drivers in menuconfig

The audio pin controller drivers depend on PINCTRL_LPASS_LPI, but since
PINCTRL_LPASS_LPI is not the first entry, they are not displayed in
menuconfig as dependent of PINCTRL_LPASS_LPI. Re-order the entries to
fix this.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: organize main SoC drivers in new Kconfig.msm

In menuconfig, some entries depending on PINCTRL_MSM are indented and
expressed as dependening but some not, because of other Kconfig entr

pinctrl: qcom: organize main SoC drivers in new Kconfig.msm

In menuconfig, some entries depending on PINCTRL_MSM are indented and
expressed as dependening but some not, because of other Kconfig entries
in between,

Move all main Qualcomm SoC pin controller driver entries into new
Kconfig.msm file so they will be nicely ordered in Kconfig file (by
CONFIG_ name) and properly indented as PINCTRL_MSM dependency in
menuconfig.

Functionally this is the same, but since entire file is guarded with "if
PINCTRL_MSM" drop this dependency from individual entries.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: mark true OF dependency - common MSM pinctrl code

The common MSM pinctrl driver code (PINCTRL_MSM) uses
pinconf_generic_dt_node_to_map_group() from GENERIC_PINCONF, which is
not avail

pinctrl: qcom: mark true OF dependency - common MSM pinctrl code

The common MSM pinctrl driver code (PINCTRL_MSM) uses
pinconf_generic_dt_node_to_map_group() from GENERIC_PINCONF, which is
not available for compile testing for !OF cases. Drivers actually do
not depend on OF. Move the OF dependency to the entry actually
depending on it and drop any "|| COMPILE_TEST", because OF is required
also for compile testing (lack of OF was never visible in compile
testing because none of the drivers could be compile tested due to
Makefile).

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: drop unneeded GPIOLIB dependency

PINCTRL_MSM depends on GPIOLIB, thus individual driver entries depending
on the first do not have to depend on the latter.

Signed-off-by: Krzysztof K

pinctrl: qcom: drop unneeded GPIOLIB dependency

PINCTRL_MSM depends on GPIOLIB, thus individual driver entries depending
on the first do not have to depend on the latter.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: correct language typo (Technologies)

Correct typo: Tehcnologies->Technologies.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Konrad Dybcio <konrad.

pinctrl: qcom: correct language typo (Technologies)

Correct typo: Tehcnologies->Technologies.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: fix indentation in Kconfig

Use tab for correct Kconfig indentation.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Konrad Dybcio <konrad.dybcio@lina

pinctrl: qcom: fix indentation in Kconfig

Use tab for correct Kconfig indentation.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: Add IPQ5018 pinctrl driver

Add pinctrl definitions for the TLMM of IPQ5018.

Reviewed-by: Bjorn Andersson <[email protected]>
Reviewed-by: Linus Walleij <linus.walleij@linaro

pinctrl: qcom: Add IPQ5018 pinctrl driver

Add pinctrl definitions for the TLMM of IPQ5018.

Reviewed-by: Bjorn Andersson <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Co-developed-by: Nitheesh Sekar <[email protected]>
Signed-off-by: Nitheesh Sekar <[email protected]>
Co-developed-by: Varadarajan Narayanan <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
Signed-off-by: Sricharan Ramabadhran <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: Add SDX75 pincontrol driver

Add initial Qualcomm SDX75 pinctrl driver to support pin configuration
with pinctrl framework for SDX75 SoC.
While at it, reordering the SDX65 entry.

Sign

pinctrl: qcom: Add SDX75 pincontrol driver

Add initial Qualcomm SDX75 pinctrl driver to support pin configuration
with pinctrl framework for SDX75 SoC.
While at it, reordering the SDX65 entry.

Signed-off-by: Rohit Agarwal <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: Add IPQ9574 pinctrl driver

Add pinctrl definitions for the TLMM of IPQ9574

Reviewed-by: Krzysztof Kozlowski <[email protected]>
Co-developed-by: Anusha Rao <quic_anusha@

pinctrl: qcom: Add IPQ9574 pinctrl driver

Add pinctrl definitions for the TLMM of IPQ9574

Reviewed-by: Krzysztof Kozlowski <[email protected]>
Co-developed-by: Anusha Rao <[email protected]>
Signed-off-by: Anusha Rao <[email protected]>
Signed-off-by: Devi Priya <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: Add SM7150 pinctrl driver

Add pinctrl driver for TLMM block found in SM7150 SoC.

Signed-off-by: Danila Tikhonov <[email protected]>
Link: https://lore.kernel.org/r/20230311212114.10

pinctrl: qcom: Add SM7150 pinctrl driver

Add pinctrl driver for TLMM block found in SM7150 SoC.

Signed-off-by: Danila Tikhonov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: Introduce IPQ5332 TLMM driver

The IPQ5332 SoC comes with a TLMM block, like all other Qualcomm
platforms, so add a driver for it.

Signed-off-by: Kathiravan T <[email protected]

pinctrl: qcom: Introduce IPQ5332 TLMM driver

The IPQ5332 SoC comes with a TLMM block, like all other Qualcomm
platforms, so add a driver for it.

Signed-off-by: Kathiravan T <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: pinctrl-sm8550-lpass-lpi: add SM8550 LPASS

Add druver for pin controller in Low Power Audio SubSystem (LPASS). The
driver is similar to SM8450 LPASS pin controller, with differences

pinctrl: qcom: pinctrl-sm8550-lpass-lpi: add SM8550 LPASS

Add druver for pin controller in Low Power Audio SubSystem (LPASS). The
driver is similar to SM8450 LPASS pin controller, with differences in
few pin groups (qua_mi2s -> i2s0).

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: add the tlmm driver sa8775p platforms

Add support for Lemans TLMM configuration and control via the pinctrl
framework.

Signed-off-by: Yadu MG <[email protected]>
Signed-off-by: Pr

pinctrl: qcom: add the tlmm driver sa8775p platforms

Add support for Lemans TLMM configuration and control via the pinctrl
framework.

Signed-off-by: Yadu MG <[email protected]>
Signed-off-by: Prasad Sodagudi <[email protected]>
[Bartosz: made the driver ready for upstream]
Co-developed-by: Bartosz Golaszewski <[email protected]>
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: Add SM8550 pinctrl driver

Add pinctrl driver for TLMM block found in SM8550 SoC.

Co-developed-by: Neil Armstrong <[email protected]>
Signed-off-by: Neil Armstrong <neil.armst

pinctrl: qcom: Add SM8550 pinctrl driver

Add pinctrl driver for TLMM block found in SM8550 SoC.

Co-developed-by: Neil Armstrong <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Signed-off-by: Abel Vesa <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Reviewed-by: Bjorn Andersson <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: Add QDU1000/QRU1000 pinctrl driver

Add pin control driver for the TLMM block found in the QDU1000
and QRU1000 SoC.

Signed-off-by: Melody Olvera <[email protected]>
Reviewed-by

pinctrl: qcom: Add QDU1000/QRU1000 pinctrl driver

Add pin control driver for the TLMM block found in the QDU1000
and QRU1000 SoC.

Signed-off-by: Melody Olvera <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: add sdm670 pinctrl

The Snapdragon 670 has a Top-Level Mode Multiplexer (TLMM) for various
features. Add a driver to support it.

Link: https://android.googlesource.com/kernel/msm/+/de

pinctrl: qcom: add sdm670 pinctrl

The Snapdragon 670 has a Top-Level Mode Multiplexer (TLMM) for various
features. Add a driver to support it.

Link: https://android.googlesource.com/kernel/msm/+/de5a12173c7fa6d65bedee9ad36af55b2dbfeb36%5E%21/#F6
Link: https://android.googlesource.com/kernel/msm/+/04f083156d9b9f3bfcf204c1c6da88632fbb3863%5E%21/#F22
Link: https://android.googlesource.com/kernel/msm/+/54837652e3400ecc63ccc78b2193faf4f349a32e%5E%21/#F0
Link: https://android.googlesource.com/kernel/msm/+/f0409b07174ceca217f8b7fd255418feff06092d%5E%21/#F0
Signed-off-by: Richard Acayan <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: restrict drivers per ARM/ARM64

There is no point to allow selecting pin-controller drivers for Qualcomm
ARMv7 SoCs when building ARM64 kernel, and vice versa. This makes
kernel confi

pinctrl: qcom: restrict drivers per ARM/ARM64

There is no point to allow selecting pin-controller drivers for Qualcomm
ARMv7 SoCs when building ARM64 kernel, and vice versa. This makes
kernel configuration more difficult as many do not remember the Qualcomm
SoCs. There won't be a single image for ARMv7 and ARMv8/9 SoCs, so no
features/options are lost.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: Add sc8280xp lpass lpi pinctrl driver

Add pinctrl driver to support pin configuration for LPASS
(Low Power Audio SubSystem) LPI (Low Power Island) pinctrl
on SC8280XP.

This IP is an

pinctrl: qcom: Add sc8280xp lpass lpi pinctrl driver

Add pinctrl driver to support pin configuration for LPASS
(Low Power Audio SubSystem) LPI (Low Power Island) pinctrl
on SC8280XP.

This IP is an additional pin control block for Audio Pins on top the
existing SoC Top level pin-controller.

Hardware setup looks like:

TLMM GPIO[189 - 207] --> LPASS LPI GPIO [0 - 18]

This pin controller has some similarities compared to Top level
msm SoC Pin controller like 'each pin belongs to a single group'
and so on. However this one is intended to control only audio
pins in particular, which can not be configured/touched by the
Top level SoC pin controller except setting them as gpios.
Apart from this, slew rate is also available in this block for
certain pins which are connected to SLIMbus or SoundWire Bus.

Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

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pinctrl: qcom: Add sm8450 lpass lpi pinctrl driver

Add pinctrl driver to support pin configuration for LPASS
(Low Power Audio SubSystem) LPI (Low Power Island) pinctrl
on SM8450.

This IP is an addi

pinctrl: qcom: Add sm8450 lpass lpi pinctrl driver

Add pinctrl driver to support pin configuration for LPASS
(Low Power Audio SubSystem) LPI (Low Power Island) pinctrl
on SM8450.

This IP is an additional pin control block for Audio Pins on top the
existing SoC Top level pin-controller.

Hardware setup looks like:

TLMM GPIO[165 - 187] --> LPASS LPI GPIO [0 - 22]

This pin controller has some similarities compared to Top level
msm SoC Pin controller like 'each pin belongs to a single group'
and so on. However this one is intended to control only audio
pins in particular, which can not be configured/touched by the
Top level SoC pin controller except setting them as gpios.
Apart from this, slew rate is also available in this block for
certain pins which are connected to SLIMbus or SoundWire Bus.

Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>

show more ...