| b1f9f454 | 29-Oct-2021 |
Kunihiko Hayashi <[email protected]> |
phy: uniphier-ahci: Add support for Pro4 SoC
Add support for PHY interface built into ahci controller implemented
in UniPhier Pro4 SoC.
Pro4 SoC distinguishes it from other SoCs as "legacy" SoC, wh
phy: uniphier-ahci: Add support for Pro4 SoC
Add support for PHY interface built into ahci controller implemented
in UniPhier Pro4 SoC.
Pro4 SoC distinguishes it from other SoCs as "legacy" SoC, which has GIO
clock line. And Pro4 AHCI-PHY needs to control additional reset lines
("pm", "tx", and "rx").
Signed-off-by: Kunihiko Hayashi <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
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| 1c1597c8 | 29-Oct-2021 |
Kunihiko Hayashi <[email protected]> |
phy: uniphier-pcie: Add compatible string and SoC-dependent data for NX1 SoC
Add basic support for UniPhier NX1 SoC. This includes a compatible string,
SoC-dependent data, and a function that set to
phy: uniphier-pcie: Add compatible string and SoC-dependent data for NX1 SoC
Add basic support for UniPhier NX1 SoC. This includes a compatible string,
SoC-dependent data, and a function that set to 2-lane mode.
Signed-off-by: Kunihiko Hayashi <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
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| 6861781a | 30-Jan-2020 |
Kunihiko Hayashi <[email protected]> |
phy: uniphier-pcie: Add SoC-dependent phy-mode function support
Since this phy is shared by multiple devices including USB and PCIe,
it is necessary to determine which device use this phy.
This patc
phy: uniphier-pcie: Add SoC-dependent phy-mode function support
Since this phy is shared by multiple devices including USB and PCIe,
it is necessary to determine which device use this phy.
This patch adds SoC-dependent functions to determine a device using
this phy.
When there is 'socionext,syscon' property in the pcie-phy node,
the driver calls SoC-dependt function instead of checking .has_syscon
in SoC-dependent data. The function configures the system controller
to use phy for PCIe.
Signed-off-by: Kunihiko Hayashi <[email protected]>
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
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| 04de8fa2 | 30-Jan-2020 |
Kunihiko Hayashi <[email protected]> |
phy: uniphier-pcie: Add legacy SoC support for Pro5
Add legacy SoC support that needs to manage gio clock and reset and to skip
setting unimplemented phy parameters. This supports Pro5.
This specif
phy: uniphier-pcie: Add legacy SoC support for Pro5
Add legacy SoC support that needs to manage gio clock and reset and to skip
setting unimplemented phy parameters. This supports Pro5.
This specifies only 1 port use because Pro5 doesn't set it in the power-on
sequence.
Signed-off-by: Kunihiko Hayashi <[email protected]>
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
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| 25858c52 | 30-Jan-2020 |
Kunihiko Hayashi <[email protected]> |
phy: uniphier-usb3hs: Change Rx sync mode to avoid communication failure
In case of using default parameters, communication failure might occur
in rare cases. This sets Rx sync mode parameter to avo
phy: uniphier-usb3hs: Change Rx sync mode to avoid communication failure
In case of using default parameters, communication failure might occur
in rare cases. This sets Rx sync mode parameter to avoid the issue.
Signed-off-by: Kunihiko Hayashi <[email protected]>
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
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