phy: add NXP PTN3222 eUSB2 to USB2 redriver

The NXP PTN3222 is the single-port eUSB2 to USB2 redriver that performs
translation between eUSB2 and USB2 signalling schemes. It supports all
three data

phy: add NXP PTN3222 eUSB2 to USB2 redriver

The NXP PTN3222 is the single-port eUSB2 to USB2 redriver that performs
translation between eUSB2 and USB2 signalling schemes. It supports all
three data rates: Low Speed, Full Speed and High Speed.

The reset state enables autonegotiation of the PHY role and of the data
rate, so no additional programming is required.

Reviewed-by: Neil Armstrong <[email protected]>
Tested-by: Konrad Dybcio <[email protected]>
Signed-off-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Stephan Gerhold <[email protected]>
Tested-by: Stephan Gerhold <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>

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phy: nuvoton: add new driver for the Nuvoton MA35 SoC USB 2.0 PHY

Nuvoton MA35 SoCs support DWC2 USB controller.
Add the driver to drive the USB 2.0 PHY transceivers.

Signed-off-by: Hui-Ping Chen <

phy: nuvoton: add new driver for the Nuvoton MA35 SoC USB 2.0 PHY

Nuvoton MA35 SoCs support DWC2 USB controller.
Add the driver to drive the USB 2.0 PHY transceivers.

Signed-off-by: Hui-Ping Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>

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phy: airoha: Add PCIe PHY driver for EN7581 SoC.

Introduce support for Airoha PCIe PHY controller available in EN7581
SoC.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabo

phy: airoha: Add PCIe PHY driver for EN7581 SoC.

Introduce support for Airoha PCIe PHY controller available in EN7581
SoC.

Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Tested-by: Zhengping Zhang <[email protected]>
Signed-off-by: Lorenzo Bianconi <[email protected]>
Link: https://lore.kernel.org/r/20ac99aa8628d97778594f606681db7f868f24fe.1718485860.git.lorenzo@kernel.org
Signed-off-by: Vinod Koul <[email protected]>

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phy: realtek: usb: add new driver for the Realtek RTD SoC USB 2.0 PHY

Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB
controller. Added the driver to drive the USB 2.0 PHY transceiv

phy: realtek: usb: add new driver for the Realtek RTD SoC USB 2.0 PHY

Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB
controller. Added the driver to drive the USB 2.0 PHY transceivers.

Note: New driver,remove the port status notification on legacy USB PHY.
Use the generic PHY to notify the usb device connect and disconnect.
To avoid using these PHYs would require describing the very same
PHY using both the generic "phy" property and the deprecated "usb-phy"
property.

Signed-off-by: Stanley Chang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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Revert "phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHY"

This reverts commit 134e6d25f6bd06071e5aac0a7eefcea6f7713955.

The recently added Realtek PHY drivers depend on the new port st

Revert "phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHY"

This reverts commit 134e6d25f6bd06071e5aac0a7eefcea6f7713955.

The recently added Realtek PHY drivers depend on the new port status
notification mechanism which was built on the deprecated USB PHY
implementation and devicetree binding.

Specifically, using these PHYs would require describing the very same
PHY using both the generic "phy" property and the deprecated "usb-phy"
property which is clearly wrong.

We should not be building new functionality on top of the legacy USB PHY
implementation even if it is currently stuck in some kind of
transitional limbo.

Revert the new Realtek PHY drivers for now so that the port status
notification interface can be reverted and replaced.

Fixes: 134e6d25f6bd ("phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHY")
Cc: [email protected] # 6.6
Cc: Stanley Chang <[email protected]>
Signed-off-by: Johan Hovold <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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phy: Kconfig: Select GENERIC_PHY for GENERIC_PHY_MIPI_DPHY

GENERIC_PHY can be selected by GENERIC_PHY_MIPI_DPHY directly as
GENERIC_PHY has no dependencies. This way drivers that depend on
GENERIC_P

phy: Kconfig: Select GENERIC_PHY for GENERIC_PHY_MIPI_DPHY

GENERIC_PHY can be selected by GENERIC_PHY_MIPI_DPHY directly as
GENERIC_PHY has no dependencies. This way drivers that depend on
GENERIC_PHY_MIPI_DPHY can avoid having to select both --- which they
apparently often omit, too, which further leads to build failures.

Signed-off-by: Sakari Ailus <[email protected]>
Reviewed-by: Randy Dunlap <[email protected]>
Tested-by: Randy Dunlap <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>

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phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHY

Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB
controller. Added the driver to drive the USB 2.0 PHY transceivers.

Si

phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHY

Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB
controller. Added the driver to drive the USB 2.0 PHY transceivers.

Signed-off-by: Stanley Chang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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phy: starfive: Add JH7110 USB 2.0 PHY driver

Add Starfive JH7110 SoC USB 2.0 PHY driver support.
USB 2.0 PHY default connect to Cadence USB controller.

Signed-off-by: Minda Chen <minda.chen@starfiv

phy: starfive: Add JH7110 USB 2.0 PHY driver

Add Starfive JH7110 SoC USB 2.0 PHY driver support.
USB 2.0 PHY default connect to Cadence USB controller.

Signed-off-by: Minda Chen <[email protected]>
Reviewed-by: Roger Quadros <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>

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media: tc358746: select CONFIG_GENERIC_PHY

The tc358746 driver selects CONFIG_GENERIC_PHY_MIPI_DPHY and links to
that, but this fails when CONFIG_GENERIC_PHY is disabled, because Kbuild
then never e

media: tc358746: select CONFIG_GENERIC_PHY

The tc358746 driver selects CONFIG_GENERIC_PHY_MIPI_DPHY and links to
that, but this fails when CONFIG_GENERIC_PHY is disabled, because Kbuild
then never enters the drivers/phy directory for building object files:

ERROR: modpost: "phy_mipi_dphy_get_default_config_for_hsclk" [drivers/media/i2c/tc358746.ko] undefined!

Add an explicit 'select GENERIC_PHY' here to ensure that the directory
is entered, and add another dependency on that symbol so make it
more obvious what is going on if another driver has the same problem,
as this will produce a Kconfig warning.

Link: https://lore.kernel.org/linux-media/[email protected]
Fixes: 80a21da360516 ("media: tc358746: add Toshiba TC358746 Parallel to CSI-2 bridge driver")
Signed-off-by: Arnd Bergmann <[email protected]>
Reviewed-by: Marco Felsch <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>

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phy: xgene: Depend on ARCH_XGENE rather than plain arm64

The X-Gene PHY driver is unlikely to be useful on a kernel without general
X-Gene support enabled but currently only depends on arm64 rather

phy: xgene: Depend on ARCH_XGENE rather than plain arm64

The X-Gene PHY driver is unlikely to be useful on a kernel without general
X-Gene support enabled but currently only depends on arm64 rather than the
specific platform support. Narrow the dependency to ARCH_XGENE like we do
for other X-Gene specific drivers to ensure that users who have configured
down the set of platforms enabled don't see the option.

Signed-off-by: Mark Brown <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>

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phy: usb: Add USB2.0 phy driver for Sunplus SP7021

Add USB2.0 phy driver for Sunplus SP7021

Signed-off-by: Vincent Shih <[email protected]>
Link: https://lore.kernel.org/r/1658717052-26142-

phy: usb: Add USB2.0 phy driver for Sunplus SP7021

Add USB2.0 phy driver for Sunplus SP7021

Signed-off-by: Vincent Shih <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[vkoul: remove trailing line in driver file]
Signed-off-by: Vinod Koul <[email protected]>

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phy: phy-can-transceiver: Add support for setting mux

On some boards, for routing CAN signals from controller to transceiver,
muxes might need to be set. Therefore, add support for setting the mux b

phy: phy-can-transceiver: Add support for setting mux

On some boards, for routing CAN signals from controller to transceiver,
muxes might need to be set. Therefore, add support for setting the mux by
reading the mux-states property from the device tree node.

Signed-off-by: Aswath Govindraju <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>

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phy: pistachio-usb: Depend on MIPS || COMPILE_TEST

So it will be avilable for generic MIPS kernel.

Signed-off-by: Jiaxun Yang <[email protected]>
Acked-By: Vinod Koul <[email protected]>
Signe

phy: pistachio-usb: Depend on MIPS || COMPILE_TEST

So it will be avilable for generic MIPS kernel.

Signed-off-by: Jiaxun Yang <[email protected]>
Acked-By: Vinod Koul <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>

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phy: phy-can-transceiver: Add support for generic CAN transceiver driver

The driver adds support for generic CAN transceivers. Currently
the modes supported by this driver are standby and normal mod

phy: phy-can-transceiver: Add support for generic CAN transceiver driver

The driver adds support for generic CAN transceivers. Currently
the modes supported by this driver are standby and normal modes for TI
TCAN1042 and TCAN1043 CAN transceivers.

The transceiver is modelled as a phy with pins controlled by gpios, to put
the transceiver in various device functional modes. It also gets the phy
attribute max_link_rate for the usage of CAN drivers.

Signed-off-by: Aswath Govindraju <[email protected]>
Acked-by: Marc Kleine-Budde <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>

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phy: Add Sparx5 ethernet serdes PHY driver

Add the Microchip Sparx5 ethernet serdes PHY driver for the 6G, 10G and 25G
interfaces available in the Sparx5 SoC.

Signed-off-by: Bjarni Jonasson <bjarni

phy: Add Sparx5 ethernet serdes PHY driver

Add the Microchip Sparx5 ethernet serdes PHY driver for the 6G, 10G and 25G
interfaces available in the Sparx5 SoC.

Signed-off-by: Bjarni Jonasson <[email protected]>
Signed-off-by: Steen Hegelund <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
Reviewed-by: Alexandre Belloni <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>

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phy: USB_LGM_PHY should depend on X86

The Intel Lightning Mountain (LGM) USB3 USB is only present on Intel
Lightning Mountain SoCs. Hence add a dependency on X86, to prevent
asking the user about t

phy: USB_LGM_PHY should depend on X86

The Intel Lightning Mountain (LGM) USB3 USB is only present on Intel
Lightning Mountain SoCs. Hence add a dependency on X86, to prevent
asking the user about this driver when configuring a kernel without
Intel Lightning Mountain platform support.

Fixes: 1cce8f73a561c944 ("phy: Add USB3 PHY support for Intel LGM SoC")
Signed-off-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>

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PHY: Ingenic: Add USB PHY driver using generic PHY framework.

Used the generic PHY framework API to create the PHY, this driver
supoorts USB OTG PHY used in JZ4770 SoC, JZ4775 SoC, JZ4780 SoC,
X1000

PHY: Ingenic: Add USB PHY driver using generic PHY framework.

Used the generic PHY framework API to create the PHY, this driver
supoorts USB OTG PHY used in JZ4770 SoC, JZ4775 SoC, JZ4780 SoC,
X1000 SoC, X1830 SoC and X2000 SoC.

Co-developed-by: 漆鹏振 (Qi Pengzhen) <[email protected]>
Signed-off-by: 漆鹏振 (Qi Pengzhen) <[email protected]>
Signed-off-by: 周琰杰 (Zhou Yanjie) <[email protected]>
Tested-by: 周正 (Zhou Zheng) <[email protected]>
Tested-by: H. Nikolaus Schaller <[email protected]>
Reviewed-by: Paul Cercueil <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>

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phy: fix USB_LGM_PHY warning & build errors

Fix a Kconfig warning that is causing lots of build errors
when USB_SUPPORT is not set.

USB_PHY depends on USB_SUPPORT but "select" doesn't care about
de

phy: fix USB_LGM_PHY warning & build errors

Fix a Kconfig warning that is causing lots of build errors
when USB_SUPPORT is not set.

USB_PHY depends on USB_SUPPORT but "select" doesn't care about
dependencies, so this driver should also depend on USB_SUPPORT.
It should not select USB_SUPPORT.

WARNING: unmet direct dependencies detected for USB_PHY
Depends on [n]: USB_SUPPORT [=n]
Selected by [m]:
- USB_LGM_PHY [=m]

Signed-off-by: Randy Dunlap <[email protected]>
Cc: Li Yin <[email protected]>
Cc: Vadivel Murugan R <[email protected]>
Cc: Kishon Vijay Abraham I <[email protected]>
Cc: Vinod Koul <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>

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phy: Add USB3 PHY support for Intel LGM SoC

Add support for USB PHY on Intel LGM SoC.

Signed-off-by: Ramuthevar Vadivel Murugan <[email protected]>
Reviewed-by: Philipp Za

phy: Add USB3 PHY support for Intel LGM SoC

Add support for USB PHY on Intel LGM SoC.

Signed-off-by: Ramuthevar Vadivel Murugan <[email protected]>
Reviewed-by: Philipp Zabel <[email protected]>
Link: https://lore.kernel.org/r/20200828022312.52724-3-vadivel.muruganx.ramuthevar@linux.intel.com
Signed-off-by: Vinod Koul <[email protected]>

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phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver

Xilinx ZynqMP SoCs have a Gigabit Transceiver with four lanes. All the
high speed peripherals such as USB, SATA, PCIE, Display P

phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver

Xilinx ZynqMP SoCs have a Gigabit Transceiver with four lanes. All the
high speed peripherals such as USB, SATA, PCIE, Display Port and
Ethernet SGMII can rely on any of the four GT lanes for PHY layer. This
patch adds driver for that ZynqMP GT core.

Signed-off-by: Anurag Kumar Vulisha <[email protected]>
Signed-off-by: Laurent Pinchart <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>

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phy: intel-lgm-emmc: Add support for eMMC PHY

Add support for eMMC PHY on Intel's Lightning Mountain SoC.

Signed-off-by: Ramuthevar Vadivel Murugan <[email protected]>
Rev

phy: intel-lgm-emmc: Add support for eMMC PHY

Add support for eMMC PHY on Intel's Lightning Mountain SoC.

Signed-off-by: Ramuthevar Vadivel Murugan <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
Signed-off-by: Kishon Vijay Abraham I <[email protected]>

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treewide: Add SPDX license identifier - Makefile/Kconfig

Add SPDX license identifiers to all Make/Kconfig files which:

- Have no license information of any form

These files fall under the project

treewide: Add SPDX license identifier - Makefile/Kconfig

Add SPDX license identifiers to all Make/Kconfig files which:

- Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

GPL-2.0-only

Signed-off-by: Thomas Gleixner <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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phy: dphy: Add configuration helpers

The MIPI D-PHY spec defines default values and boundaries for most of the
parameters it defines. Introduce helpers to help drivers get meaningful
values based on

phy: dphy: Add configuration helpers

The MIPI D-PHY spec defines default values and boundaries for most of the
parameters it defines. Introduce helpers to help drivers get meaningful
values based on their current parameters, and validate the boundaries of
these parameters if needed.

Signed-off-by: Maxime Ripard <[email protected]>
Signed-off-by: Kishon Vijay Abraham I <[email protected]>

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phy: add driver for Freescale i.MX8MQ USB3 PHY

This is a cleaned up port of the downstream i.MX8MQ USB3 PHY driver.

Signed-off-by: Li Jun <[email protected]>
Signed-off-by: Lucas Stach <l.stach@pengut

phy: add driver for Freescale i.MX8MQ USB3 PHY

This is a cleaned up port of the downstream i.MX8MQ USB3 PHY driver.

Signed-off-by: Li Jun <[email protected]>
Signed-off-by: Lucas Stach <[email protected]>
Signed-off-by: Kishon Vijay Abraham I <[email protected]>

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phy: add driver for Microsemi Ocelot SerDes muxing

The Microsemi Ocelot can mux SerDes lanes (aka macros) to different
switch ports or even make it act as a PCIe interface.

This adds support for th

phy: add driver for Microsemi Ocelot SerDes muxing

The Microsemi Ocelot can mux SerDes lanes (aka macros) to different
switch ports or even make it act as a PCIe interface.

This adds support for the muxing of the SerDes.

Signed-off-by: Quentin Schulz <[email protected]>
Signed-off-by: David S. Miller <[email protected]>

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