PCI: amd-mdb: Add AMD MDB Root Port driver

Add support for AMD MDB (Multimedia DMA Bridge) IP core as Root Port.

The Versal2 devices include MDB Module. The integrated block for MDB
along with the

PCI: amd-mdb: Add AMD MDB Root Port driver

Add support for AMD MDB (Multimedia DMA Bridge) IP core as Root Port.

The Versal2 devices include MDB Module. The integrated block for MDB
along with the integrated bridge can function as PCIe Root Port
controller at Gen5 32-GT/s operation per lane.

Bridge supports error and INTx interrupts and are handled using platform
specific interrupt line in Versal2.

Signed-off-by: Thippeswamy Havalige <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[bhelgaas: only present on ARM64-based SoCs; squash Kconfig dependency on
ARM64 from Geert Uytterhoeven <[email protected]>:
https://lore.kernel.org/r/eaef1dea7edcf146aa377d5e5c5c85a76ff56bae.1742306383.git.geert+renesas@glider.be]
Signed-off-by: Bjorn Helgaas <[email protected]>
[kwilczynski: commit log, code comments and error messages clean-up,
drop redundant "depends on PCI" from Kconfig, expose the error code
as part of error messages where appropriatie, change "depends on"
expression to match existing style from other drivers]
Signed-off-by: Krzysztof Wilczyński <[email protected]>

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PCI: dwc: Add debugfs based Silicon Debug support for DWC

Add support to provide Silicon Debug interface to userspace.

This set of debug registers are part of the RAS DES feature present in
DesignW

PCI: dwc: Add debugfs based Silicon Debug support for DWC

Add support to provide Silicon Debug interface to userspace.

This set of debug registers are part of the RAS DES feature present in
DesignWare PCIe controllers.

Co-developed-by: Manivannan Sadhasivam <[email protected]>
Signed-off-by: Shradha Todi <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Reviewed-by: Fan Ni <[email protected]>
Tested-by: Hrishikesh Deleep <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[kwilczynski: commit log, tidy up Kconfig and drop "default y", tidy up
code comments, squashed patch that fixes a NULL pointer dereference when
debugfs is already unavailable during clean-up from
https://lore.kernel.org/linux-pci/[email protected],
refactor dwc_pcie_debugfs_init() to not return errors, squashed patch that
changes how lack of the RAS DES capability is handled from
https://lore.kernel.org/linux-pci/20250304151814.6xu7cbpwpqrvcad5@thinkpad]
Signed-off-by: Krzysztof Wilczyński <[email protected]>

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PCI: qcom: Add equalization settings for 16.0 GT/s

During high data transmission rates such as 16.0 GT/s, there is an
increased risk of signal loss due to poor channel quality and
interference. This

PCI: qcom: Add equalization settings for 16.0 GT/s

During high data transmission rates such as 16.0 GT/s, there is an
increased risk of signal loss due to poor channel quality and
interference. This can impact receiver's ability to capture signals
accurately.

Hence, as signal compensation is achieved through appropriate lane
equalization, apply lane equalization settings at both transmitter
and receiver which results in an increase in the PCIe signal strength.

While at it, modify the pcie-tegra194 driver to make use of the
common GEN3_EQ_CONTROL_OFF definitions in pcie-designware.h.

Link: https://lore.kernel.org/linux-pci/[email protected]
Tested-by: Johan Hovold <[email protected]>
Signed-off-by: Shashank Babu Chinta Venkata <[email protected]>
[mani: dropped the code refactoring and minor changes]
Signed-off-by: Manivannan Sadhasivam <[email protected]>
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <[email protected]>
Reviewed-by: Johan Hovold <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>

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PCI: dw-rockchip: Add endpoint mode support

The PCIe controller in rk3568 and rk3588 can operate in endpoint mode.

This endpoint mode support heavily leverages the existing code in
pcie-designware-

PCI: dw-rockchip: Add endpoint mode support

The PCIe controller in rk3568 and rk3588 can operate in endpoint mode.

This endpoint mode support heavily leverages the existing code in
pcie-designware-ep.c.

Add support for endpoint mode to the existing pcie-dw-rockchip glue
driver.

[kwilczynski: squash with patch adding the PCI_ENDPOINT dependency]
Link: https://lore.kernel.org/linux-pci/[email protected]
Signed-off-by: Niklas Cassel <[email protected]>
Signed-off-by: Krzysztof Wilczyński <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>

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PCI: dwc: Convert SOC_SIFIVE to ARCH_SIFIVE

As part of converting RISC-V SOC_FOO symbols to ARCH_FOO to match the
use of such symbols on other architectures, convert the SiFive PCI
drivers to use th

PCI: dwc: Convert SOC_SIFIVE to ARCH_SIFIVE

As part of converting RISC-V SOC_FOO symbols to ARCH_FOO to match the
use of such symbols on other architectures, convert the SiFive PCI
drivers to use the newer symbol.

Link: https://lore.kernel.org/linux-pci/20230918-safeness-cornflake-62278bc3aaaa@wendy
Signed-off-by: Conor Dooley <[email protected]>
Signed-off-by: Krzysztof Wilczyński <[email protected]>

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PCI: rcar-gen4: Add endpoint mode support

Add R-Car Gen4 PCIe controller for endpoint mode. This controller is based
on Synopsys DesignWare PCIe.

Link: https://lore.kernel.org/linux-pci/20231018085

PCI: rcar-gen4: Add endpoint mode support

Add R-Car Gen4 PCIe controller for endpoint mode. This controller is based
on Synopsys DesignWare PCIe.

Link: https://lore.kernel.org/linux-pci/[email protected]
Signed-off-by: Yoshihiro Shimoda <[email protected]>
Signed-off-by: Krzysztof Wilczyński <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Reviewed-by: Serge Semin <[email protected]>

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PCI: rcar-gen4: Add R-Car Gen4 PCIe controller support for host mode

Add R-Car Gen4 PCIe controller support for host mode.

This controller is based on Synopsys DesignWare PCIe. However, this
partic

PCI: rcar-gen4: Add R-Car Gen4 PCIe controller support for host mode

Add R-Car Gen4 PCIe controller support for host mode.

This controller is based on Synopsys DesignWare PCIe. However, this
particular controller has a number of vendor-specific registers, and as
such, requires initialization code like mode setting and retraining and
so on.

Link: https://lore.kernel.org/linux-pci/[email protected]
Signed-off-by: Yoshihiro Shimoda <[email protected]>
Signed-off-by: Krzysztof Wilczyński <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Reviewed-by: Serge Semin <[email protected]>

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PCI: dwc: Sort Kconfig entries by vendor

Sort Kconfig entries by vendor so they appear in alphabetical order in
menuconfig.

Link: https://lore.kernel.org/r/[email protected]

PCI: dwc: Sort Kconfig entries by vendor

Sort Kconfig entries by vendor so they appear in alphabetical order in
menuconfig.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Helgaas <[email protected]>

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PCI: Use consistent controller Kconfig menu entry language

Use "PCIe controller" consistently instead of "host bridge", "bus driver",
etc. Annotate with "(host mode)" or "(endpoint mode)" as needed

PCI: Use consistent controller Kconfig menu entry language

Use "PCIe controller" consistently instead of "host bridge", "bus driver",
etc. Annotate with "(host mode)" or "(endpoint mode)" as needed.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Helgaas <[email protected]>

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PCI: meson: Add 'Amlogic' to Kconfig prompt

Add the "Amlogic" vendor name to the CONFIG_PCI_MESON Kconfig prompt to
match other PCIe drivers. Capitalize "Meson" to match other Meson Kconfig
prompts

PCI: meson: Add 'Amlogic' to Kconfig prompt

Add the "Amlogic" vendor name to the CONFIG_PCI_MESON Kconfig prompt to
match other PCIe drivers. Capitalize "Meson" to match other Meson Kconfig
prompts.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Helgaas <[email protected]>
Cc: Yue Wang <[email protected]>

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PCI: kirin: Select REGMAP_MMIO

pcie-kirin uses regmaps, and needs to pull them in; otherwise, with
CONFIG_PCIE_KIRIN=y and without CONFIG_REGMAP_MMIO pcie-kirin produces
a linker failure looking for

PCI: kirin: Select REGMAP_MMIO

pcie-kirin uses regmaps, and needs to pull them in; otherwise, with
CONFIG_PCIE_KIRIN=y and without CONFIG_REGMAP_MMIO pcie-kirin produces
a linker failure looking for __devm_regmap_init_mmio_clk().

Fixes: d19afe7be126 ("PCI: kirin: Use regmap for APB registers")
Link: https://lore.kernel.org/r/04636141da1d6d592174eefb56760511468d035d.1668410580.git.josh@joshtriplett.org
Signed-off-by: Josh Triplett <[email protected]>
[[email protected]: commit log and removed REGMAP select]
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Cc: [email protected] # 5.16+

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PCI: imx6: Add i.MX PCIe EP mode support

i.MX PCIe is one dual mode PCIe controller.

Add i.MX PCIe EP mode support here, and split the PCIe modes to the Root
Complex mode and Endpoint mode.

Link:

PCI: imx6: Add i.MX PCIe EP mode support

i.MX PCIe is one dual mode PCIe controller.

Add i.MX PCIe EP mode support here, and split the PCIe modes to the Root
Complex mode and Endpoint mode.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Richard Zhu <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>

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PCI: dwc: Adjust to recent removal of PCI_MSI_IRQ_DOMAIN

a474d3fbe287 ("PCI/MSI: Get rid of PCI_MSI_IRQ_DOMAIN") removed
PCI_MSI_IRQ_DOMAIN and changed all references to refer to PCI_MSI instead.

b

PCI: dwc: Adjust to recent removal of PCI_MSI_IRQ_DOMAIN

a474d3fbe287 ("PCI/MSI: Get rid of PCI_MSI_IRQ_DOMAIN") removed
PCI_MSI_IRQ_DOMAIN and changed all references to refer to PCI_MSI instead.

ba6ed462dcf4 ("PCI: dwc: Add Baikal-T1 PCIe controller support")
independently added PCIE_BT1, depending on PCI_MSI_IRQ_DOMAIN.

Both commits appeared in v6.2-rc1, so the latter missed the conversion from
PCI_MSI_IRQ_DOMAIN to PCI_MSI. Update PCIE_BT1 to depend on PCI_MSI
instead.

[bhelgaas: commit log]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Lukas Bulwahn <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Reviewed-by: Serge Semin <[email protected]>

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PCI: dwc: Add Baikal-T1 PCIe controller support

Baikal-T1 SoC is equipped with DWC PCIe v4.60a host controller. It can be
trained to work up to Gen.3 speed over up to x4 lanes. The host controller
i

PCI: dwc: Add Baikal-T1 PCIe controller support

Baikal-T1 SoC is equipped with DWC PCIe v4.60a host controller. It can be
trained to work up to Gen.3 speed over up to x4 lanes. The host controller
is attached to the DW PCIe 3.0 PCS via the PIPE-4 interface, which in its
turn is connected to the DWC 10G PHY. The whole system is supposed to be
fed up with four clock sources: DBI peripheral clock, AXI application
clocks and external PHY/core reference clock generating the 100MHz signal.
In addition to that the platform provide a way to reset each part of the
controller: sticky/non-sticky bits, host controller core, PIPE interface,
PCS/PHY and Hot/Power reset signal. The driver also provides a way to
handle the GPIO-based PERST# signal.

Note due to the Baikal-T1 MMIO peculiarity we have to implement the DBI
interface accessors which make sure the IO operations are dword-aligned.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Serge Semin <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>

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PCI/MSI: Get rid of PCI_MSI_IRQ_DOMAIN

What a zoo:

PCI_MSI
select GENERIC_MSI_IRQ

PCI_MSI_IRQ_DOMAIN
def_bool y
depends on PCI_MSI
select GENERIC_MSI_IRQ_DOMAIN

Ergo PCI_MSI en

PCI/MSI: Get rid of PCI_MSI_IRQ_DOMAIN

What a zoo:

PCI_MSI
select GENERIC_MSI_IRQ

PCI_MSI_IRQ_DOMAIN
def_bool y
depends on PCI_MSI
select GENERIC_MSI_IRQ_DOMAIN

Ergo PCI_MSI enables PCI_MSI_IRQ_DOMAIN which in turn selects
GENERIC_MSI_IRQ_DOMAIN. So all the dependencies on PCI_MSI_IRQ_DOMAIN are
just an indirection to PCI_MSI.

Match the reality and just admit that PCI_MSI requires
GENERIC_MSI_IRQ_DOMAIN.

Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Jason Gunthorpe <[email protected]>
Acked-by: Bjorn Helgaas <[email protected]>
Link: https://lore.kernel.org/r/[email protected]

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PCI: kirin: Allow building it as a module

There's nothing preventing this driver from being loaded as a module.
Change its config from bool to tristate.

Link: https://lore.kernel.org/r/b5e7cfe9df09

PCI: kirin: Allow building it as a module

There's nothing preventing this driver from being loaded as a module.
Change its config from bool to tristate.

Link: https://lore.kernel.org/r/b5e7cfe9df09b492750bd6db0f0c911eaae8c2d4.1634812676.git.mchehab+huawei@kernel.org
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Acked-by: Xiaowei Song <[email protected]>

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PCI: qcom-ep: Add Qualcomm PCIe Endpoint controller driver

Add driver for Qualcomm PCIe Endpoint controller based on the DesignWare
core with added Qualcomm-specific wrapper around the core. The dri

PCI: qcom-ep: Add Qualcomm PCIe Endpoint controller driver

Add driver for Qualcomm PCIe Endpoint controller based on the DesignWare
core with added Qualcomm-specific wrapper around the core. The driver
support is very basic such that it supports only enumeration, PCIe
read/write, and MSI. There is no ASPM and PM support for now but these will
be added later.

The driver is capable of using the PERST# and WAKE# side-band GPIOs for
operation and written on top of the DWC PCI framework.

[bhelgaas: wrap a few long lines]
Co-developed-by: Siddartha Mohanadoss <[email protected]>
[mani: restructured the driver and fixed several bugs for upstream]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Siddartha Mohanadoss <[email protected]>
Signed-off-by: Manivannan Sadhasivam <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Reviewed-by: Rob Herring <[email protected]>

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PCI: dwc: Clean up Kconfig dependencies (PCIE_DW_EP)

The "depends on" Kconfig construct is a no-op in options that
are selected and therefore has no effect. Remove it.

Clean up the users of PCIE_DW

PCI: dwc: Clean up Kconfig dependencies (PCIE_DW_EP)

The "depends on" Kconfig construct is a no-op in options that
are selected and therefore has no effect. Remove it.

Clean up the users of PCIE_DW_EP and introduce idiom

depends on PCI_ENDPOINT
select PCIE_DW_EP

for all of them.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andy Shevchenko <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>

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PCI: dwc: Clean up Kconfig dependencies (PCIE_DW_HOST)

The "depends on" Kconfig construct is a no-op in options that
are selected and therefore has no effect. Remove it.

Furthermore, there is no ne

PCI: dwc: Clean up Kconfig dependencies (PCIE_DW_HOST)

The "depends on" Kconfig construct is a no-op in options that
are selected and therefore has no effect. Remove it.

Furthermore, there is no need to repeat menu dependencies (PCI).

Clean up the users of PCIE_DW_HOST and introduce idiom

depends on PCI_MSI_IRQ_DOMAIN
select PCIE_DW_HOST

for all of them.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andy Shevchenko <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>

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PCI: dra7xx: Make it a kernel module

Enable building the driver as a loadable kernel module.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Luca Ceres

PCI: dra7xx: Make it a kernel module

Enable building the driver as a loadable kernel module.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Luca Ceresoli <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Acked-by: Kishon Vijay Abraham I <[email protected]>

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PCI: rockchip-dwc: Add Rockchip RK356X host controller driver

Add a driver for the DesignWare-based PCIe controller found on
RK356X. The existing pcie-rockchip-host driver is only used for
the Rockc

PCI: rockchip-dwc: Add Rockchip RK356X host controller driver

Add a driver for the DesignWare-based PCIe controller found on
RK356X. The existing pcie-rockchip-host driver is only used for
the Rockchip-designed IP found on RK3399.

Link: https://lore.kernel.org/r/[email protected]
Tested-by: Peter Geis <[email protected]>
Signed-off-by: Simon Xue <[email protected]>
Signed-off-by: Shawn Lin <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Reviewed-by: Rob Herring <[email protected]>

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PCI: visconti: Add Toshiba Visconti PCIe host controller driver

Add support for the PCIe RC controller on Toshiba Visconti ARM SoCs. This
PCIe controller is based on the Synopsys DesignWare PCIe co

PCI: visconti: Add Toshiba Visconti PCIe host controller driver

Add support for the PCIe RC controller on Toshiba Visconti ARM SoCs. This
PCIe controller is based on the Synopsys DesignWare PCIe core.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Yuji Ishikawa <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Reviewed-by: Rob Herring <[email protected]>

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PCI: keembay: Add support for Intel Keem Bay

Add driver for Intel Keem Bay SoC PCIe controller. This controller
is based on DesignWare PCIe core.

In Root Complex mode, only internal reference clock

PCI: keembay: Add support for Intel Keem Bay

Add driver for Intel Keem Bay SoC PCIe controller. This controller
is based on DesignWare PCIe core.

In Root Complex mode, only internal reference clock is possible for
Keem Bay A0. For Keem Bay B0, external reference clock can be used
and will be the default configuration. Currently, keembay_pcie_of_data
structure has one member. It will be expanded later to handle this
difference.

Endpoint mode link initialization is handled by the boot firmware.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Wan Ahmad Zainie <[email protected]>
Signed-off-by: Srikanth Thokala <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Reviewed-by: Krzysztof Wilczyński <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Acked-by: Andy Shevchenko <[email protected]>

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PCI: fu740: Add SiFive FU740 PCIe host controller driver

Add driver for the SiFive FU740 PCIe host controller.
This controller is based on the DesignWare PCIe core.

Co-developed-by: Henry Styles <h

PCI: fu740: Add SiFive FU740 PCIe host controller driver

Add driver for the SiFive FU740 PCIe host controller.
This controller is based on the DesignWare PCIe core.

Co-developed-by: Henry Styles <[email protected]>
Co-developed-by: Erik Danie <[email protected]>
Co-developed-by: Greentime Hu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Paul Walmsley <[email protected]>
Signed-off-by: Henry Styles <[email protected]>
Signed-off-by: Erik Danie <[email protected]>
Signed-off-by: Greentime Hu <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>

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PCI: tegra: Fix typo for PCIe endpoint mode in Tegra194

In config PCIE_TEGRA194_EP the mode incorrectly is referred to as
host mode. Fix it.

Link: https://lore.kernel.org/r/20201231032539.22322-1-w

PCI: tegra: Fix typo for PCIe endpoint mode in Tegra194

In config PCIE_TEGRA194_EP the mode incorrectly is referred to as
host mode. Fix it.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Wesley Sheng <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Reviewed-by: Krzysztof Wilczyński <[email protected]>
Acked-by: Vidya Sagar <[email protected]>

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