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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6 |
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6fc6ded5 |
| 06-Mar-2025 |
Alistair Francis <[email protected]> |
PCI/DOE: Allow enabling DOE without CXL
PCIe devices (not CXL) can support DOE as well, so allow DOE to be enabled even if CXL isn't.
Link: https://lore.kernel.org/r/20250306075211.1855177-4-alista
PCI/DOE: Allow enabling DOE without CXL
PCIe devices (not CXL) can support DOE as well, so allow DOE to be enabled even if CXL isn't.
Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Alistair Francis <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]>
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Revision tags: v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2 |
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7ffb7914 |
| 06-Feb-2025 |
Balbir Singh <[email protected]> |
x86/kaslr: Reduce KASLR entropy on most x86 systems
When CONFIG_PCI_P2PDMA=y (which is basically enabled on all large x86 distros), it maps the PFN's via a ZONE_DEVICE mapping using devm_memremap_pa
x86/kaslr: Reduce KASLR entropy on most x86 systems
When CONFIG_PCI_P2PDMA=y (which is basically enabled on all large x86 distros), it maps the PFN's via a ZONE_DEVICE mapping using devm_memremap_pages(). The mapped virtual address range corresponds to the pci_resource_start() of the BAR address and size corresponding to the BAR length.
When KASLR is enabled, the direct map range of the kernel is reduced to the size of physical memory plus additional padding. If the BAR address is beyond this limit, PCI peer to peer DMA mappings fail.
Fix this by not shrinking the size of the direct map when CONFIG_PCI_P2PDMA=y.
This reduces the total available entropy, but it's better than the current work around of having to disable KASLR completely.
[ mingo: Clarified the changelog to point out the broad impact ... ]
Signed-off-by: Balbir Singh <[email protected]> Signed-off-by: Ingo Molnar <[email protected]> Reviewed-by: Kees Cook <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> # drivers/pci/Kconfig Cc: Linus Torvalds <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Andy Lutomirski <[email protected]> Link: https://lore.kernel.org/lkml/[email protected]/ Link: https://lore.kernel.org/r/[email protected] -- arch/x86/mm/kaslr.c | 10 ++++++++-- drivers/pci/Kconfig | 6 ++++++ 2 files changed, 14 insertions(+), 2 deletions(-)
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Revision tags: v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12 |
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b88cbaaa |
| 15-Nov-2024 |
Bjorn Helgaas <[email protected]> |
PCI/pwrctrl: Rename pwrctl files to pwrctrl
To slightly reduce confusion between "pwrctl" (the power controller and power sequencing framework) and "bwctrl" (the bandwidth controller), rename "pwrct
PCI/pwrctrl: Rename pwrctl files to pwrctrl
To slightly reduce confusion between "pwrctl" (the power controller and power sequencing framework) and "bwctrl" (the bandwidth controller), rename "pwrctl" to "pwrctrl" so they use the same "ctrl" suffix.
Rename drivers/pci/pwrctl/ to drivers/pci/pwrctrl/, including the related MAINTAINERS, include file (include/linux/pci-pwrctl.h), Makefile, and Kconfig changes.
This is the minimal rename of files only. A subsequent commit will rename functions and data structures.
Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Helgaas <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Acked-by: Krzysztof Wilczyński <[email protected]>
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Revision tags: v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2 |
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f69767a1 |
| 02-Oct-2024 |
Wei Huang <[email protected]> |
PCI: Add TLP Processing Hints (TPH) support
Add support for PCIe TLP Processing Hints (TPH) support (see PCIe r6.2, sec 6.17).
Add TPH register definitions in pci_regs.h, including the TPH Requeste
PCI: Add TLP Processing Hints (TPH) support
Add support for PCIe TLP Processing Hints (TPH) support (see PCIe r6.2, sec 6.17).
Add TPH register definitions in pci_regs.h, including the TPH Requester capability register, TPH Requester control register, TPH Completer capability, and the ST fields of MSI-X entry.
Introduce pcie_enable_tph() and pcie_disable_tph(), enabling drivers to toggle TPH support and configure specific ST mode as needed. Also add a new kernel parameter, "pci=notph", allowing users to disable TPH support across the entire system.
Link: https://lore.kernel.org/r/[email protected] Co-developed-by: Jing Liu <[email protected]> Co-developed-by: Paul Luse <[email protected]> Co-developed-by: Eric Van Tassell <[email protected]> Signed-off-by: Jing Liu <[email protected]> Signed-off-by: Paul Luse <[email protected]> Signed-off-by: Eric Van Tassell <[email protected]> Signed-off-by: Wei Huang <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Ajit Khaparde <[email protected]> Reviewed-by: Somnath Kotur <[email protected]> Reviewed-by: Andy Gospodarek <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]> Reviewed-by: Lukas Wunner <[email protected]>
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Revision tags: v6.12-rc1, v6.11, v6.11-rc7 |
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4e893545 |
| 04-Sep-2024 |
Mariusz Tkaczyk <[email protected]> |
PCI/NPEM: Add Native PCIe Enclosure Management support
Native PCIe Enclosure Management (NPEM, PCIe r6.1 sec 6.28) allows managing LEDs in storage enclosures. NPEM is indication oriented and it does
PCI/NPEM: Add Native PCIe Enclosure Management support
Native PCIe Enclosure Management (NPEM, PCIe r6.1 sec 6.28) allows managing LEDs in storage enclosures. NPEM is indication oriented and it does not give direct access to LEDs. Although each indication *could* represent an individual LED, multiple indications could also be represented as a single, multi-color LED or a single LED blinking in a specific interval. The specification leaves that open.
Each enabled indication (capability register bit on) is represented as a ledclass_dev which can be controlled through sysfs. For every ledclass device only 2 brightness states are allowed: LED_ON (1) or LED_OFF (0). This corresponds to the NPEM control register (Indication bit on/off).
Ledclass devices appear in sysfs as child devices (subdirectory) of PCI device which has an NPEM Extended Capability and indication is enabled in NPEM capability register. For example, these are LEDs created for pcieport "10000:02:05.0" on my setup:
leds/ ├── 10000:02:05.0:enclosure:fail ├── 10000:02:05.0:enclosure:locate ├── 10000:02:05.0:enclosure:ok └── 10000:02:05.0:enclosure:rebuild
They can be also found in "/sys/class/leds" directory. The parent PCIe device domain/bus/device/function address is used to guarantee uniqueness across leds subsystem.
To enable/disable a "fail" indication, the "brightness" file can be edited:
echo 1 > ./leds/10000:02:05.0:enclosure:fail/brightness echo 0 > ./leds/10000:02:05.0:enclosure:fail/brightness
PCIe r6.1, sec 7.9.19.2 defines the possible indications.
Multiple indications for same parent PCIe device can conflict and hardware may update them when processing new request. To avoid issues, driver refresh all indications by reading back control register.
This driver expects to be the exclusive NPEM extended capability manager. It waits up to 1 second after imposing new request, it doesn't verify if controller is busy before write, and it assumes the mutex lock gives protection from concurrent updates.
If _DSM LED management is available, we assume the platform may be using NPEM for its own purposes (see PCI Firmware Spec r3.3 sec 4.7), so the driver does not use NPEM. A future patch will add _DSM support; an info message notes whether NPEM or _DSM is being used.
NPEM is a PCIe extended capability so it should be registered in pcie_init_capabilities() but it is not possible due to LED dependency. The parent pci_device must be added earlier for led_classdev_register() to be successful. NPEM does not require configuration on kernel side, so it is safe to register LED devices later.
Link: https://lore.kernel.org/r/[email protected] Suggested-by: Lukas Wunner <[email protected]> Signed-off-by: Mariusz Tkaczyk <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Tested-by: Stuart Hayes <[email protected]> Reviewed-by: Christoph Hellwig <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]>
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Revision tags: v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4 |
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4565d265 |
| 12-Jun-2024 |
Bartosz Golaszewski <[email protected]> |
PCI/pwrctl: Add PCI power control core code
Some PCI devices must be powered-on before they can be detected on the bus. Introduce a simple framework reusing the existing PCI OF infrastructure.
The
PCI/pwrctl: Add PCI power control core code
Some PCI devices must be powered-on before they can be detected on the bus. Introduce a simple framework reusing the existing PCI OF infrastructure.
The way this works is: a DT node representing a PCI device connected to the port can be matched against its power control platform driver. If the match succeeds, the driver is responsible for powering-up the device and calling pci_pwrctl_device_set_ready() which will trigger a PCI bus rescan as well as subscribe to PCI bus notifications.
When the device is detected and created, we'll make it consume the same DT node that the platform device did. When the device is bound, we'll create a device link between it and the parent power control device.
Tested-by: Amit Pundir <[email protected]> Tested-by: Neil Armstrong <[email protected]> # on SM8550-QRD, SM8650-QRD & SM8650-HDK Tested-by: Caleb Connolly <[email protected]> # OnePlus 8T Acked-by: Bjorn Helgaas <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bartosz Golaszewski <[email protected]>
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Revision tags: v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3 |
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ae874027 |
| 31-Jan-2024 |
Philipp Stanner <[email protected]> |
PCI: Move pci_iomap.c to drivers/pci/
The entirety of pci_iomap.c is guarded by an #ifdef CONFIG_PCI. It, consequently, does not belong to lib/ because it is not generic infrastructure.
Move pci_io
PCI: Move pci_iomap.c to drivers/pci/
The entirety of pci_iomap.c is guarded by an #ifdef CONFIG_PCI. It, consequently, does not belong to lib/ because it is not generic infrastructure.
Move pci_iomap.c to drivers/pci/ and implement the necessary changes to Makefiles and Kconfigs.
Update MAINTAINERS file.
Update Documentation.
Link: https://lore.kernel.org/r/[email protected] [bhelgaas: squash in https://lore.kernel.org/r/[email protected]] Suggested-by: Danilo Krummrich <[email protected]> Signed-off-by: Philipp Stanner <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Arnd Bergmann <[email protected]>
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Revision tags: v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8 |
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43b0294a |
| 20-Jul-2022 |
Liu Song <[email protected]> |
PCI: Replace unnecessary UTF-8 in Kconfig
The CONFIG_PCI_P2PDMA Kconfig help text contains a Cyrillic small "Dze" (ѕ). When menuconfig renders it, it looks like "Enable ~U drivers" instead of "Enab
PCI: Replace unnecessary UTF-8 in Kconfig
The CONFIG_PCI_P2PDMA Kconfig help text contains a Cyrillic small "Dze" (ѕ). When menuconfig renders it, it looks like "Enable ~U drivers" instead of "Enables drivers".
Replace it by a plain "s" so the help text is displayed correctly by menuconfig.
Uwe Kleine-König <[email protected]> later posted the same patch at https://lore.kernel.org/r/[email protected]
Link: https://lore.kernel.org/r/[email protected] Tested-by: Randy Dunlap <[email protected]> Signed-off-by: Liu Song <[email protected]> [bhelgaas: commit log, add Uwe's report] Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Randy Dunlap <[email protected]>
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26641b3f |
| 31-Aug-2023 |
Lizhi Hou <[email protected]> |
PCI: Fix CONFIG_PCI_DYNAMIC_OF_NODES kconfig dependencies
Generating interrupt-map property depends on of_irq_parse_raw() which is enabled by CONFIG_OF_IRQ. Change CONFIG_PCI_DYNAMIC_OF_NODES depend
PCI: Fix CONFIG_PCI_DYNAMIC_OF_NODES kconfig dependencies
Generating interrupt-map property depends on of_irq_parse_raw() which is enabled by CONFIG_OF_IRQ. Change CONFIG_PCI_DYNAMIC_OF_NODES dependency from CONFIG_OF to CONFIG_OF_IRQ.
Closes: https://lore.kernel.org/linux-devicetree/[email protected]/ Fixes: 407d1a51921e ("PCI: Create device tree node for bridge") Link: https://lore.kernel.org/r/[email protected] Reported-by: Guenter Roeck <[email protected]> Signed-off-by: Lizhi Hou <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
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407d1a51 |
| 15-Aug-2023 |
Lizhi Hou <[email protected]> |
PCI: Create device tree node for bridge
The PCI endpoint device such as Xilinx Alveo PCI card maps the register spaces from multiple hardware peripherals to its PCI BAR. Normally, the PCI core disco
PCI: Create device tree node for bridge
The PCI endpoint device such as Xilinx Alveo PCI card maps the register spaces from multiple hardware peripherals to its PCI BAR. Normally, the PCI core discovers devices and BARs using the PCI enumeration process. There is no infrastructure to discover the hardware peripherals that are present in a PCI device, and which can be accessed through the PCI BARs.
Apparently, the device tree framework requires a device tree node for the PCI device. Thus, it can generate the device tree nodes for hardware peripherals underneath. Because PCI is self discoverable bus, there might not be a device tree node created for PCI devices. Furthermore, if the PCI device is hot pluggable, when it is plugged in, the device tree nodes for its parent bridges are required. Add support to generate device tree node for PCI bridges.
Add an of_pci_make_dev_node() interface that can be used to create device tree node for PCI devices.
Add a PCI_DYNAMIC_OF_NODES config option. When the option is turned on, the kernel will generate device tree nodes for PCI bridges unconditionally.
Initially, add the basic properties for the dynamically generated device tree nodes which include #address-cells, #size-cells, device_type, compatible, ranges, reg.
Acked-by: Bjorn Helgaas <[email protected]> Signed-off-by: Lizhi Hou <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Herring <[email protected]>
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af2880ec |
| 12-Jun-2023 |
Robin Murphy <[email protected]> |
scatterlist: add dedicated config for DMA flags
The DMA flags field will be useful for users beyond PCI P2P, so upgrade to its own dedicated config option.
[[email protected]: use #ifdef CONF
scatterlist: add dedicated config for DMA flags
The DMA flags field will be useful for users beyond PCI P2P, so upgrade to its own dedicated config option.
[[email protected]: use #ifdef CONFIG_NEED_SG_DMA_FLAGS in scatterlist.h] [[email protected]: update PCI_P2PDMA dma_flags comment in scatterlist.h] Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Robin Murphy <[email protected]> Signed-off-by: Catalin Marinas <[email protected]> Reviewed-by: Christoph Hellwig <[email protected]> Tested-by: Isaac J. Manjarres <[email protected]> Cc: Alasdair Kergon <[email protected]> Cc: Ard Biesheuvel <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Herbert Xu <[email protected]> Cc: Jerry Snitselaar <[email protected]> Cc: Joerg Roedel <[email protected]> Cc: Jonathan Cameron <[email protected]> Cc: Jonathan Cameron <[email protected]> Cc: Lars-Peter Clausen <[email protected]> Cc: Logan Gunthorpe <[email protected]> Cc: Marc Zyngier <[email protected]> Cc: Mark Brown <[email protected]> Cc: Mike Snitzer <[email protected]> Cc: "Rafael J. Wysocki" <[email protected]> Cc: Saravana Kannan <[email protected]> Cc: Vlastimil Babka <[email protected]> Cc: Will Deacon <[email protected]> Signed-off-by: Andrew Morton <[email protected]>
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13e7accb |
| 11-Nov-2022 |
Thomas Gleixner <[email protected]> |
genirq: Get rid of GENERIC_MSI_IRQ_DOMAIN
Adjust to reality and remove another layer of pointless Kconfig indirection. CONFIG_GENERIC_MSI_IRQ is good enough to serve all purposes.
Signed-off-by: Th
genirq: Get rid of GENERIC_MSI_IRQ_DOMAIN
Adjust to reality and remove another layer of pointless Kconfig indirection. CONFIG_GENERIC_MSI_IRQ is good enough to serve all purposes.
Signed-off-by: Thomas Gleixner <[email protected]> Reviewed-by: Jason Gunthorpe <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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a474d3fb |
| 11-Nov-2022 |
Thomas Gleixner <[email protected]> |
PCI/MSI: Get rid of PCI_MSI_IRQ_DOMAIN
What a zoo:
PCI_MSI select GENERIC_MSI_IRQ
PCI_MSI_IRQ_DOMAIN def_bool y depends on PCI_MSI select GENERIC_MSI_IRQ_DOMAIN
Ergo PCI_MSI en
PCI/MSI: Get rid of PCI_MSI_IRQ_DOMAIN
What a zoo:
PCI_MSI select GENERIC_MSI_IRQ
PCI_MSI_IRQ_DOMAIN def_bool y depends on PCI_MSI select GENERIC_MSI_IRQ_DOMAIN
Ergo PCI_MSI enables PCI_MSI_IRQ_DOMAIN which in turn selects GENERIC_MSI_IRQ_DOMAIN. So all the dependencies on PCI_MSI_IRQ_DOMAIN are just an indirection to PCI_MSI.
Match the reality and just admit that PCI_MSI requires GENERIC_MSI_IRQ_DOMAIN.
Signed-off-by: Thomas Gleixner <[email protected]> Reviewed-by: Jason Gunthorpe <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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Revision tags: v5.19-rc7, v5.19-rc6 |
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42399301 |
| 08-Jul-2022 |
Logan Gunthorpe <[email protected]> |
lib/scatterlist: add flag for indicating P2PDMA segments in an SGL
Introduce a dma_flags field in struct scatterlist. These flags will be used by dma_[un]map_sg_p2pdma() to determine when a given SG
lib/scatterlist: add flag for indicating P2PDMA segments in an SGL
Introduce a dma_flags field in struct scatterlist. These flags will be used by dma_[un]map_sg_p2pdma() to determine when a given SGL segments dma_address points to a PCI bus address. dma_unmap_sg_p2pdma() will need to perform different cleanup when a segment is marked as a bus address.
The dma_flags field will fit in the existing padding on 64BIT systems (assuming CONFIG_NEED_SG_DMA_LENGTH is also set).
The new bit will only be used when CONFIG_PCI_P2PDMA is set; this means PCI P2PDMA will require CONFIG_64BIT. This should be acceptable as the majority of P2PDMA use cases are restricted to newer root complexes and roughly require the extra address space for memory BARs used in the transactions.
Signed-off-by: Logan Gunthorpe <[email protected]> Signed-off-by: Christoph Hellwig <[email protected]>
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9d24322e |
| 19-Jul-2022 |
Jonathan Cameron <[email protected]> |
PCI/DOE: Add DOE mailbox support functions
Introduced in a PCIe r6.0, sec 6.30, DOE provides a config space based mailbox with standard protocol discovery. Each mailbox is accessed through a DOE Ex
PCI/DOE: Add DOE mailbox support functions
Introduced in a PCIe r6.0, sec 6.30, DOE provides a config space based mailbox with standard protocol discovery. Each mailbox is accessed through a DOE Extended Capability.
Each DOE mailbox must support the DOE discovery protocol in addition to any number of additional protocols.
Define core PCIe functionality to manage a single PCIe DOE mailbox at a defined config space offset. Functionality includes iterating, creating, query of supported protocol, and task submission. Destruction of the mailboxes is device managed.
Cc: "Li, Ming" <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: Matthew Wilcox <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Signed-off-by: Jonathan Cameron <[email protected]> Co-developed-by: Ira Weiny <[email protected]> Signed-off-by: Ira Weiny <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dan Williams <[email protected]>
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Revision tags: v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6 |
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1d38fe6e |
| 24-Feb-2022 |
Bjorn Helgaas <[email protected]> |
PCI/VGA: Move vgaarb to drivers/pci
The VGA arbiter is really PCI-specific and doesn't depend on any GPU things. Move it to the PCI subsystem.
Note that misc_init() must be called before vga_arb_d
PCI/VGA: Move vgaarb to drivers/pci
The VGA arbiter is really PCI-specific and doesn't depend on any GPU things. Move it to the PCI subsystem.
Note that misc_init() must be called before vga_arb_device_init(). These are both subsys_initcalls, so this ordering depends on the link order, which is determined by drivers/Makefile:
obj-y += pci/ obj-y += char/ <-- misc_init() obj-y += gpu/ <-- vga_arb_device_init() (before this commit)
The drivers/pci/ subsys_initcalls are called *before* misc_init(), so convert vga_arb_device_init() to subsys_initcall_sync(), which is called after *all* subsys_initcalls.
Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Helgaas <[email protected]>
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Revision tags: v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16 |
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d9932b46 |
| 05-Jan-2022 |
Sunil Muthuswamy <[email protected]> |
PCI: hv: Add arm64 Hyper-V vPCI support
Add arm64 Hyper-V vPCI support by implementing the arch specific interfaces. Introduce an IRQ domain and chip specific to Hyper-v vPCI that is based on SPIs.
PCI: hv: Add arm64 Hyper-V vPCI support
Add arm64 Hyper-V vPCI support by implementing the arch specific interfaces. Introduce an IRQ domain and chip specific to Hyper-v vPCI that is based on SPIs. The IRQ domain parents itself to the arch GIC IRQ domain for basic vector management.
[bhelgaas: squash in fix from Yang Li <[email protected]>: https://lore.kernel.org/r/[email protected]] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Sunil Muthuswamy <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Marc Zyngier <[email protected]> Reviewed-by: Michael Kelley <[email protected]>
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Revision tags: v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2 |
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e243ae95 |
| 17-Sep-2021 |
Jan Beulich <[email protected]> |
PCI: only build xen-pcifront in PV-enabled environments
The driver's module init function, pcifront_init(), invokes xen_pv_domain() first thing. That construct produces constant "false" when !CONFIG
PCI: only build xen-pcifront in PV-enabled environments
The driver's module init function, pcifront_init(), invokes xen_pv_domain() first thing. That construct produces constant "false" when !CONFIG_XEN_PV. Hence there's no point building the driver in non-PV configurations.
Drop the (now implicit and generally wrong) X86 dependency: At present, XEN_PV can only be set when X86 is also enabled. In general an architecture supporting Xen PV (and PCI) would want to have this driver built.
Signed-off-by: Jan Beulich <[email protected]> Reviewed-by: Stefano Stabellini <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Juergen Gross <[email protected]>
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Revision tags: v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8 |
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b0e85c3c |
| 28-Sep-2020 |
Jim Quinlan <[email protected]> |
PCI: Add Kconfig options for MPS/MRRS strategy
Add Kconfig options for changing the default pcie_bus_config, i.e., the strategy for configuration MPS and MRRS, in the same manner as the CONFIG_PCIEA
PCI: Add Kconfig options for MPS/MRRS strategy
Add Kconfig options for changing the default pcie_bus_config, i.e., the strategy for configuration MPS and MRRS, in the same manner as the CONFIG_PCIEASPM_XXXX choice. The pci_bus_config setting may still be overridden by kernel command-line parameters, e.g., "pci=pcie_bus_tune_off".
[bhelgaas: depend on EXPERT, tweak help texts] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jim Quinlan <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
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Revision tags: v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3 |
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077ee78e |
| 26-Aug-2020 |
Thomas Gleixner <[email protected]> |
PCI/MSI: Make arch_.*_msi_irq[s] fallbacks selectable
The arch_.*_msi_irq[s] fallbacks are compiled in whether an architecture requires them or not. Architectures which are fully utilizing hierarchi
PCI/MSI: Make arch_.*_msi_irq[s] fallbacks selectable
The arch_.*_msi_irq[s] fallbacks are compiled in whether an architecture requires them or not. Architectures which are fully utilizing hierarchical irq domains should never call into that code.
It's not only architectures which depend on that by implementing one or more of the weak functions, there is also a bunch of drivers which relies on the weak functions which invoke msi_controller::setup_irq[s] and msi_controller::teardown_irq.
Make the architectures and drivers which rely on them select them in Kconfig and if not selected replace them by stub functions which emit a warning and fail the PCI/MSI interrupt allocation.
Signed-off-by: Thomas Gleixner <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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Revision tags: v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5 |
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191d6f91 |
| 25-Oct-2019 |
Palmer Dabbelt <[email protected]> |
PCI: Remove PCI_MSI_IRQ_DOMAIN architecture whitelist
The only apparent reason for the PCI_MSI_IRQ_DOMAIN architecture whitelist was that it requires msi.h. Now that msi.h is mandatory in asm-gener
PCI: Remove PCI_MSI_IRQ_DOMAIN architecture whitelist
The only apparent reason for the PCI_MSI_IRQ_DOMAIN architecture whitelist was that it requires msi.h. Now that msi.h is mandatory in asm-generic/Kbuild, every arch should have at least the default version, so remove the whitelist.
Built for all the architectures that play nice with make.cross, but not boot tested anywhere.
Link: https://lore.kernel.org/r/514e7b040be8ccd69088193aba260da1b89e919c.1571983829.git.michal.simek@xilinx.com Signed-off-by: Palmer Dabbelt <[email protected]> Signed-off-by: Michal Simek <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Waiman Long <[email protected]>
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36533f35 |
| 20-Nov-2019 |
Krzysztof Kozlowski <[email protected]> |
PCI: Fix indentation
Adjust indentation from spaces to tab (+optional two spaces) as in coding style with command like:
$ sed -e 's/^ /\t/' -i */Kconfig
[bhelgaas: do same in vmd.c] Link:
PCI: Fix indentation
Adjust indentation from spaces to tab (+optional two spaces) as in coding style with command like:
$ sed -e 's/^ /\t/' -i */Kconfig
[bhelgaas: do same in vmd.c] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
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Revision tags: v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3 |
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d1bbf38a |
| 30-Jul-2019 |
Bjorn Helgaas <[email protected]> |
PCI: Fix typos and whitespace errors
Fix typos in drivers/pci. Comment and whitespace changes only.
Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Wil
PCI: Fix typos and whitespace errors
Fix typos in drivers/pci. Comment and whitespace changes only.
Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Wilczynski <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Rob Herring <[email protected]> Acked-by: Thomas Petazzoni <[email protected]> # armada8k
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348dd93e |
| 22-Aug-2019 |
Haiyang Zhang <[email protected]> |
PCI: hv: Add a Hyper-V PCI interface driver for software backchannel interface
This interface driver is a helper driver allows other drivers to have a common interface with the Hyper-V PCI frontend
PCI: hv: Add a Hyper-V PCI interface driver for software backchannel interface
This interface driver is a helper driver allows other drivers to have a common interface with the Hyper-V PCI frontend driver.
Signed-off-by: Haiyang Zhang <[email protected]> Signed-off-by: Saeed Mahameed <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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Revision tags: v5.3-rc2, v5.3-rc1 |
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f58ba5e3 |
| 12-Jul-2019 |
Randy Dunlap <[email protected]> |
PCI: pci-hyperv: Fix build errors on non-SYSFS config
Fix build errors when building almost-allmodconfig but with SYSFS not set (not enabled). Fixes these build errors:
ERROR: "pci_destroy_slot" [d
PCI: pci-hyperv: Fix build errors on non-SYSFS config
Fix build errors when building almost-allmodconfig but with SYSFS not set (not enabled). Fixes these build errors:
ERROR: "pci_destroy_slot" [drivers/pci/controller/pci-hyperv.ko] undefined! ERROR: "pci_create_slot" [drivers/pci/controller/pci-hyperv.ko] undefined!
drivers/pci/slot.o is only built when SYSFS is enabled, so pci-hyperv.o has an implicit dependency on SYSFS. Make that explicit.
Also, depending on X86 && X86_64 is not needed, so just change that to depend on X86_64.
Fixes: a15f2c08c708 ("PCI: hv: support reporting serial number as slot information") Signed-off-by: Randy Dunlap <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Haiyang Zhang <[email protected]> Cc: Matthew Wilcox <[email protected]> Cc: Jake Oshins <[email protected]> Cc: "K. Y. Srinivasan" <[email protected]> Cc: Haiyang Zhang <[email protected]> Cc: Stephen Hemminger <[email protected]> Cc: Stephen Hemminger <[email protected]> Cc: Sasha Levin <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: [email protected] Cc: [email protected] Cc: Dexuan Cui <[email protected]>
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