treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

Based on 2 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of th

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

Based on 2 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Enrico Weigelt <[email protected]>
Reviewed-by: Kate Stewart <[email protected]>
Reviewed-by: Allison Randal <[email protected]>
Cc: [email protected]
Link: https://lkml.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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memory: ti-emif-sram: Add ti_emif_run_hw_leveling for DDR3 hardware leveling

In certain situations, such as when returning from low power modes, the
EMIF must re-run hardware leveling to properly re

memory: ti-emif-sram: Add ti_emif_run_hw_leveling for DDR3 hardware leveling

In certain situations, such as when returning from low power modes, the
EMIF must re-run hardware leveling to properly restore DDR3 access.

This is accomplished by introducing a new ti-emif-sram-pm call,
ti_emif_run_hw_leveling, to check if DDR3 is in use and if so, trigger
the full write and read leveling processes.

Suggested-by: Brad Griffis <[email protected]>
Signed-off-by: Dave Gerlach <[email protected]>
Acked-by: Santosh Shilimkar <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>

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memory: ti-emif-sram: introduce relocatable suspend/resume handlers

Certain SoCs like Texas Instruments AM335x and AM437x require parts
of the EMIF PM code to run late in the suspend sequence from S

memory: ti-emif-sram: introduce relocatable suspend/resume handlers

Certain SoCs like Texas Instruments AM335x and AM437x require parts
of the EMIF PM code to run late in the suspend sequence from SRAM,
such as saving and restoring the EMIF context and placing the memory
into self-refresh.

One requirement for these SoCs to suspend and enter its lowest power
mode, called DeepSleep0, is that the PER power domain must be shut off.
Because the EMIF (DDR Controller) resides within this power domain, it
will lose context during a suspend operation, so we must save it so we
can restore once we resume. However, we cannot execute this code from
external memory, as it is not available at this point, so the code must
be executed late in the suspend path from SRAM.

This patch introduces a ti-emif-sram driver that includes several
functions written in ARM ASM that are relocatable so the PM SRAM
code can use them. It also allocates a region of writable SRAM to
be used by the code running in the executable region of SRAM to save
and restore the EMIF context. It can export a table containing the
absolute addresses of the available PM functions so that other SRAM
code can branch to them. This code is required for suspend/resume on
AM335x and AM437x to work.

In addition to this, to be able to share data structures between C and
the ti-emif-sram-pm assembly code, we can automatically generate all of
the C struct member offsets and sizes as macros by processing
emif-asm-offsets.c into assembly code and then extracting the relevant
data as is done for the generated platform asm-offsets.h files.

Acked-by: Tony Lindgren <[email protected]>
Acked-by: Russell King <[email protected]>
Signed-off-by: Dave Gerlach <[email protected]>
Signed-off-by: Santosh Shilimkar <[email protected]>

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memory: emif: handle frequency and voltage change events

Change SDRAM timings and other settings as necessary
on voltage and frequency changes. We calculate these
register settings based on data fro

memory: emif: handle frequency and voltage change events

Change SDRAM timings and other settings as necessary
on voltage and frequency changes. We calculate these
register settings based on data from the device data
sheet and inputs such a frequency, voltage state(stable
or ramping), temperature level etc.

TODO: frequency and voltage change handling needs to
be integrated with clock framework and regulator
framework respectively. This is not done today
due to missing pieces in the kernel.

Signed-off-by: Aneesh V <[email protected]>
Reviewed-by: Santosh Shilimkar <[email protected]>
Reviewed-by: Benoit Cousson <[email protected]>
[[email protected]: Moved to drivers/memory from drivers/misc]
Signed-off-by: Santosh Shilimkar <[email protected]>
Tested-by: Lokesh Vutla <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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memory: emif: add basic infrastructure for EMIF driver

EMIF is an SDRAM controller used in various Texas Instruments
SoCs. EMIF supports, based on its revision, one or more of
LPDDR2/DDR2/DDR3 proto

memory: emif: add basic infrastructure for EMIF driver

EMIF is an SDRAM controller used in various Texas Instruments
SoCs. EMIF supports, based on its revision, one or more of
LPDDR2/DDR2/DDR3 protocols.

Add the basic infrastructure for EMIF driver that includes
driver registration, probe, parsing of platform data etc.

Signed-off-by: Aneesh V <[email protected]>
Reviewed-by: Santosh Shilimkar <[email protected]>
Reviewed-by: Benoit Cousson <[email protected]>
[[email protected]: Moved to drivers/memory from drivers/misc]
Signed-off-by: Santosh Shilimkar <[email protected]>
Tested-by: Lokesh Vutla <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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memory: emif: add register definitions for EMIF

Add register offsets and bit field definitions
for EMIF module in TI SoCs

Signed-off-by: Aneesh V <[email protected]>
Reviewed-by: Santosh Shilimkar <san

memory: emif: add register definitions for EMIF

Add register offsets and bit field definitions
for EMIF module in TI SoCs

Signed-off-by: Aneesh V <[email protected]>
Reviewed-by: Santosh Shilimkar <[email protected]>
Reviewed-by: Benoit Cousson <[email protected]>
[[email protected]: Moved to drivers/memory from drivers/misc]
Signed-off-by: Santosh Shilimkar <[email protected]>
Tested-by: Lokesh Vutla <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

show more ...