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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11 |
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| #
668d6808 |
| 12-Sep-2024 |
Robin Chen <[email protected]> |
drm/amd/display: Read Sink emission rate capability
[WHY] To get sink emission rate information for future supported refresh rate calculation.
Reviewed-by: ChunTao Tso <[email protected]> Signed-
drm/amd/display: Read Sink emission rate capability
[WHY] To get sink emission rate information for future supported refresh rate calculation.
Reviewed-by: ChunTao Tso <[email protected]> Signed-off-by: Robin Chen <[email protected]> Signed-off-by: Roman Li <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1 |
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e80f8f49 |
| 25-Jul-2024 |
Gabe Teeger <[email protected]> |
drm/amd/display: Revert Avoid overflow assignment
This reverts commit a15268787b79 ("drm/amd/display: Avoid overflow assignment in link_dp_cts") Due to regression causing DPMS hang.
Reviewed-by: Al
drm/amd/display: Revert Avoid overflow assignment
This reverts commit a15268787b79 ("drm/amd/display: Avoid overflow assignment in link_dp_cts") Due to regression causing DPMS hang.
Reviewed-by: Alex Hung <[email protected]> Signed-off-by: Gabe Teeger <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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a1526878 |
| 17-Jul-2024 |
Alex Hung <[email protected]> |
drm/amd/display: Avoid overflow assignment in link_dp_cts
sampling_rate is an uint8_t but is assigned an unsigned int, and thus it can overflow. As a result, sampling_rate is changed to uint32_t.
S
drm/amd/display: Avoid overflow assignment in link_dp_cts
sampling_rate is an uint8_t but is assigned an unsigned int, and thus it can overflow. As a result, sampling_rate is changed to uint32_t.
Similarly, LINK_QUAL_PATTERN_SET has a size of 2 bits, and it should only be assigned to a value less or equal than 4.
This fixes 2 INTEGER_OVERFLOW issues reported by Coverity.
Signed-off-by: Alex Hung <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4 |
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| #
d03415f6 |
| 28-Nov-2023 |
Michael Strauss <[email protected]> |
drm/amd/display: Send DP_TOTAL_LTTPR_CNT during detection if LTTPR is present
[WHY] New register field added in DP2.1 SCR, needed for auxless ALPM
[HOW] Echo value read from 0xF0007 back to sink
R
drm/amd/display: Send DP_TOTAL_LTTPR_CNT during detection if LTTPR is present
[WHY] New register field added in DP2.1 SCR, needed for auxless ALPM
[HOW] Echo value read from 0xF0007 back to sink
Reviewed-by: Wenjing Liu <[email protected]> Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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| #
2ec6c7f8 |
| 28-Nov-2023 |
Michael Strauss <[email protected]> |
drm/amd/display: Send DP_TOTAL_LTTPR_CNT during detection if LTTPR is present
[WHY] New register field added in DP2.1 SCR, needed for auxless ALPM
[HOW] Echo value read from 0xF0007 back to sink
R
drm/amd/display: Send DP_TOTAL_LTTPR_CNT during detection if LTTPR is present
[WHY] New register field added in DP2.1 SCR, needed for auxless ALPM
[HOW] Echo value read from 0xF0007 back to sink
Reviewed-by: Wenjing Liu <[email protected]> Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3 |
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| #
76bd3478 |
| 16-May-2023 |
Bhawanpreet Lakha <[email protected]> |
drm/amd/display: Read replay data from sink
Read DP_SINK_PR_PIXEL_DEVIATION_PER_LINE and DP_SINK_PR_MAX_NUMBER_OF_DEVIATION_LINE
Signed-off-by: Bhawanpreet Lakha <[email protected]> Review
drm/amd/display: Read replay data from sink
Read DP_SINK_PR_PIXEL_DEVIATION_PER_LINE and DP_SINK_PR_MAX_NUMBER_OF_DEVIATION_LINE
Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.4-rc2 |
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e0138644 |
| 12-May-2023 |
Bhawanpreet Lakha <[email protected]> |
drm/amd/display: Add structs for Freesync Panel Replay
In some instances, the GPU is transmitting repeated frame to the sink without any updates or changes in the content. These repeat transmission
drm/amd/display: Add structs for Freesync Panel Replay
In some instances, the GPU is transmitting repeated frame to the sink without any updates or changes in the content. These repeat transmission are wasteful, resulting in power draw in different aspects of the system
1. DCN is fetching the frame of data from DF/UMC/DRAM. This memory traffic prevents power down of parts of this HW path.
2. GPU is transmitting pixel data to the display through the main link of the DisplayPort interface. This prevents power down of both the Source transmitter (TX) and the Sink receiver (RX) The concepts of utilizing replay is similar to PSR, but there is a benefit of: Source and Sink remaining synchronized which allows for - lower latency when switching from replay to live frames - enable the possibility of more use cases - easy control of the sink's refresh rate during replay
Due to Source and Sink remaining timing synchronized, Replay can be activated in more UI scenarios.
Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7 |
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| #
345ce3fc |
| 22-Nov-2022 |
Wenjing Liu <[email protected]> |
drm/amd/display: add support for three new square pattern variants from DP2.1 specs
[why] DP2.1 specs has brought 3 new variants of sqaure patterns with different pre-shoot and de-emphasis equalizat
drm/amd/display: add support for three new square pattern variants from DP2.1 specs
[why] DP2.1 specs has brought 3 new variants of sqaure patterns with different pre-shoot and de-emphasis equalization requirements. The commit adds logic to identify these variants and apply corresponding eqaulization requirements into hardware lane settings.
Reviewed-by: George Shen <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4 |
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da68386d |
| 21-Apr-2022 |
Thomas Zimmermann <[email protected]> |
drm: Rename dp/ to display/
Rename dp/ to display/ to account for additional display-related helpers, such as HDMI. Update all related include statements. No functional changes.
Various drivers, su
drm: Rename dp/ to display/
Rename dp/ to display/ to account for additional display-related helpers, such as HDMI. Update all related include statements. No functional changes.
Various drivers, such as i915 and amdgpu, use similar naming scheme by putting code for video-output standards into a local display/ directory. The new directory's name is aligned with this convention.
v2: * update commit message (Javier)
Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Lyude Paul <[email protected]> Reviewed-by: Javier Martinez Canillas <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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Revision tags: v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1 |
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d9eb8fea |
| 19-Jan-2022 |
Wenjing Liu <[email protected]> |
drm/amd/display: Drop DCN for DP2.x logic
[Why & How] DCN guard is not necessary for DP2.x relevant logic. Drop them.
v2: squash in fix for misplaced #endif (Alex)
Tested-by: Daniel Wheeler <danie
drm/amd/display: Drop DCN for DP2.x logic
[Why & How] DCN guard is not necessary for DP2.x relevant logic. Drop them.
v2: squash in fix for misplaced #endif (Alex)
Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Reviewed-by: Jerry Zuo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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5b529e8d |
| 14-Jan-2022 |
Thomas Zimmermann <[email protected]> |
drm/dp: Move public DisplayPort headers into dp/
Move all public DisplayPort headers into dp/ and update users. No functional changes.
v3: * rebased onto latest drm-tip
Signed-off-by: Thomas Zimm
drm/dp: Move public DisplayPort headers into dp/
Move all public DisplayPort headers into dp/ and update users. No functional changes.
v3: * rebased onto latest drm-tip
Signed-off-by: Thomas Zimmermann <[email protected]> Acked-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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Revision tags: v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6 |
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3550d622 |
| 15-Aug-2021 |
Leo (Hanghong) Ma <[email protected]> |
drm/amd/display: Add DPCD writes at key points
This reverts commit "Revert "Add DPCD writes at key points" ". The following patch will fix the system hang issue.
v2: squash in indentation warning f
drm/amd/display: Add DPCD writes at key points
This reverts commit "Revert "Add DPCD writes at key points" ". The following patch will fix the system hang issue.
v2: squash in indentation warning fix
Signed-off-by: Leo (Hanghong) Ma <[email protected]> Acked-by: Mikita Lipski <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v5.14-rc5 |
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f01ee019 |
| 03-Aug-2021 |
Fangzhi Zuo <[email protected]> |
drm/amd/display: Add DP 2.0 SST DC Support
1. Retrieve 128/132b link cap. 2. 128/132b link training and payload allocation. 3. UHBR10 link rate support.
[squash in warning fixes - Alex]
Signed-off
drm/amd/display: Add DP 2.0 SST DC Support
1. Retrieve 128/132b link cap. 2. 128/132b link training and payload allocation. 3. UHBR10 link rate support.
[squash in warning fixes - Alex]
Signed-off-by: Fangzhi Zuo <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8 |
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9248681f |
| 01-Oct-2020 |
Ashley Thomas <[email protected]> |
drm/amd/display: Source minimum HBlank support
[Why] Some sink devices wish to have access to the minimum HBlank supported by the ASIC.
[How] Make the ASIC minimum HBlank available in Source Device
drm/amd/display: Source minimum HBlank support
[Why] Some sink devices wish to have access to the minimum HBlank supported by the ASIC.
[How] Make the ASIC minimum HBlank available in Source Device information address 0x340.
Signed-off-by: Ashley Thomas <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1 |
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8a683eb6 |
| 28-Jan-2020 |
Rodrigo Siqueira <[email protected]> |
drm/amd/display: Add AUX backlight register
Introduce vendor-specific registers for handling backlight via AUX.
Signed-off-by: Rodrigo Siqueira <[email protected]> Reviewed-by: Nicholas Kazl
drm/amd/display: Add AUX backlight register
Introduce vendor-specific registers for handling backlight via AUX.
Signed-off-by: Rodrigo Siqueira <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Harry Wentland <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1 |
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7a83645a |
| 10-Jul-2019 |
Dale Zhao <[email protected]> |
drm/amd/display: handle active dongle port type is DP++ or DP case
[Why]: Some active dongles have DP++ port and DP port at the same time. Current code doesn't cover DP++ case and processes as defau
drm/amd/display: handle active dongle port type is DP++ or DP case
[Why]: Some active dongles have DP++ port and DP port at the same time. Current code doesn't cover DP++ case and processes as default DVI case, in which audio is disabled. Because of dual mode, DP case is also treat as DVI case for the other port.
[How]: According DP 1.4 spec, add DP++ procedure similar with HDMI case. Also add None dongle type for DP case.
Signed-off-by: Dale Zhao <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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b7066693 |
| 10-Jul-2019 |
Dale Zhao <[email protected]> |
drm/amd/display: handle active dongle port type is DP++ or DP case
[Why]: Some active dongles have DP++ port and DP port at the same time. Current code doesn't cover DP++ case and processes as defau
drm/amd/display: handle active dongle port type is DP++ or DP case
[Why]: Some active dongles have DP++ port and DP port at the same time. Current code doesn't cover DP++ case and processes as default DVI case, in which audio is disabled. Because of dual mode, DP case is also treat as DVI case for the other port.
[How]: According DP 1.4 spec, add DP++ procedure similar with HDMI case. Also add None dongle type for DP case.
Signed-off-by: Dale Zhao <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3, v5.2-rc2, v5.2-rc1, v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5, v5.1-rc4, v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6, v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20, v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1, v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6, v4.19-rc5, v4.19-rc4, v4.19-rc3, v4.19-rc2, v4.19-rc1, v4.18, v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4, v4.18-rc3, v4.18-rc2 |
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| #
4b99affb |
| 19-Jun-2018 |
Alvin lee <[email protected]> |
drm/amd/display: read DP sink and DP branch hardware and firmware revision from DPCD
- define new dpcd address in drm - implement new members in dpcd_caps to store values read from new dpcd address
drm/amd/display: read DP sink and DP branch hardware and firmware revision from DPCD
- define new dpcd address in drm - implement new members in dpcd_caps to store values read from new dpcd address
Signed-off-by: Alvin lee <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v4.18-rc1, v4.17, v4.17-rc7, v4.17-rc6, v4.17-rc5, v4.17-rc4, v4.17-rc3, v4.17-rc2, v4.17-rc1, v4.16, v4.16-rc7, v4.16-rc6, v4.16-rc5, v4.16-rc4, v4.16-rc3, v4.16-rc2, v4.16-rc1, v4.15, v4.15-rc9, v4.15-rc8, v4.15-rc7, v4.15-rc6, v4.15-rc5, v4.15-rc4, v4.15-rc3, v4.15-rc2, v4.15-rc1, v4.14, v4.14-rc8, v4.14-rc7, v4.14-rc6, v4.14-rc5, v4.14-rc4, v4.14-rc3, v4.14-rc2, v4.14-rc1, v4.13, v4.13-rc7, v4.13-rc6, v4.13-rc5, v4.13-rc4, v4.13-rc3, v4.13-rc2, v4.13-rc1, v4.12, v4.12-rc7, v4.12-rc6, v4.12-rc5, v4.12-rc4, v4.12-rc3, v4.12-rc2, v4.12-rc1, v4.11, v4.11-rc8, v4.11-rc7, v4.11-rc6, v4.11-rc5, v4.11-rc4, v4.11-rc3 |
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| #
0e19401f |
| 14-Mar-2017 |
Tony Cheng <[email protected]> |
drm/amd/display: support PHY compliance automation for CP2520 pattern 1/2/3
Signed-off-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <
drm/amd/display: support PHY compliance automation for CP2520 pattern 1/2/3
Signed-off-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v4.11-rc2, v4.11-rc1, v4.10, v4.10-rc8, v4.10-rc7, v4.10-rc6, v4.10-rc5, v4.10-rc4, v4.10-rc3, v4.10-rc2, v4.10-rc1 |
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| #
b39474ef |
| 13-Dec-2016 |
Dave Airlie <[email protected]> |
drm/amd/display: assign correct enum for edp revision
There are 2 edp enum revisions, no idea why, drop one, and just assign 1.1 to the default value.
Signed-off-by: Dave Airlie <[email protected]
drm/amd/display: assign correct enum for edp revision
There are 2 edp enum revisions, no idea why, drop one, and just assign 1.1 to the default value.
Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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3a340294 |
| 13-Dec-2016 |
Dave Airlie <[email protected]> |
drm/amd/display: port to using drm dpcd defines
We only keep one list of these defines in the kernel, so we should use it.
Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Tony Cheng <T
drm/amd/display: port to using drm dpcd defines
We only keep one list of these defines in the kernel, so we should use it.
Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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eaca91ee |
| 19-Dec-2016 |
Harry Wentland <[email protected]> |
drm/amd/display: Move dpcd structs into dp_types header
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <Harry.Wentland@a
drm/amd/display: Move dpcd structs into dp_types header
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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| #
4562236b |
| 12-Sep-2017 |
Harry Wentland <[email protected]> |
drm/amd/dc: Add dc display driver (v2)
Supported DCE versions: 8.0, 10.0, 11.0, 11.2
v2: rebase against 4.11
Signed-off-by: Harry Wentland <[email protected]> Acked-by: Alex Deucher <alexande
drm/amd/dc: Add dc display driver (v2)
Supported DCE versions: 8.0, 10.0, 11.0, 11.2
v2: rebase against 4.11
Signed-off-by: Harry Wentland <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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