drm/amd/display: Expose 3 secondary planes for supported ASICs[why]For enabling 4-plane MPO, we need dc to expose 4 planes for DCN35 andbeyond, as well as DCN21[how]Set dc_caps.max_slave_*plan
drm/amd/display: Expose 3 secondary planes for supported ASICs[why]For enabling 4-plane MPO, we need dc to expose 4 planes for DCN35 andbeyond, as well as DCN21[how]Set dc_caps.max_slave_*planes to 3 for appropriate ASICsReviewed-by: Sun peng Li <[email protected]>Signed-off-by: Zaeem Mohamed <[email protected]>Signed-off-by: Aurabindo Pillai <[email protected]>Tested-by: Daniel Wheeler <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
show more ...
drm/amd/display: DML2.1 Post-Si Cleanup[Why]There are a few cleanup and refactoring tasks that need to be donewith the DML2.1 wrapper and DC interface to remove dependencies onlegacy structures
drm/amd/display: DML2.1 Post-Si Cleanup[Why]There are a few cleanup and refactoring tasks that need to be donewith the DML2.1 wrapper and DC interface to remove dependencies onlegacy structures and N-1 prototypes.[How]Implemented pipe_ctx->global_sync.Implemented new functions to use pipe_ctx->hubp_regs andpipe_ctx->global_sync:- hubp_setup2- hubp_setup_interdependent2- Several other new functions for DCN 4.01 to support newer structuresRemoved dml21_update_pipe_ctx_dchub_regsRemoved dml21_extract_legacy_watermark_setRemoved dml21_populate_pipe_ctx_dlg_paramRemoved outdated dcn references in DML2.1 wrapper.Reviewed-by: Austin Zheng <[email protected]>Reviewed-by: Dillon Varone <[email protected]>Signed-off-by: Rafal Ostrowski <[email protected]>Signed-off-by: Tom Chung <[email protected]>Tested-by: Daniel Wheeler <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
drm/amd/display: Remove last parts of timing_traceCommit c2c2ce1e9623 ("drm/amd/display: Optimize passive update planes.")removed the last caller of context_timing_trace.Remove it.With that gon
drm/amd/display: Remove last parts of timing_traceCommit c2c2ce1e9623 ("drm/amd/display: Optimize passive update planes.")removed the last caller of context_timing_trace.Remove it.With that gone, no one is now looking at the 'timing_trace' flag, removeit and all the places that set it.Signed-off-by: Dr. David Alan Gilbert <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
drm/amd/display: Fix out-of-bounds access in 'dcn21_link_encoder_create'An issue was identified in the dcn21_link_encoder_create function wherean out-of-bounds access could occur when the hpd_sour
drm/amd/display: Fix out-of-bounds access in 'dcn21_link_encoder_create'An issue was identified in the dcn21_link_encoder_create function wherean out-of-bounds access could occur when the hpd_source index was usedto reference the link_enc_hpd_regs array. This array has a fixed sizeand the index was not being checked against the array's bounds beforeaccessing it.This fix adds a conditional check to ensure that the hpd_source index iswithin the valid range of the link_enc_hpd_regs array. If the index isout of bounds, the function now returns NULL to prevent undefinedbehavior.References:[ 65.920507] ------------[ cut here ]------------[ 65.920510] UBSAN: array-index-out-of-bounds in drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn21/dcn21_resource.c:1312:29[ 65.920519] index 7 is out of range for type 'dcn10_link_enc_hpd_registers [5]'[ 65.920523] CPU: 3 PID: 1178 Comm: modprobe Tainted: G OE 6.8.0-cleanershaderfeatureresetasdntipmi200nv2132 #13[ 65.920525] Hardware name: AMD Majolica-RN/Majolica-RN, BIOS WMJ0429N_Weekly_20_04_2 04/29/2020[ 65.920527] Call Trace:[ 65.920529] <TASK>[ 65.920532] dump_stack_lvl+0x48/0x70[ 65.920541] dump_stack+0x10/0x20[ 65.920543] __ubsan_handle_out_of_bounds+0xa2/0xe0[ 65.920549] dcn21_link_encoder_create+0xd9/0x140 [amdgpu][ 65.921009] link_create+0x6d3/0xed0 [amdgpu][ 65.921355] create_links+0x18a/0x4e0 [amdgpu][ 65.921679] dc_create+0x360/0x720 [amdgpu][ 65.921999] ? dmi_matches+0xa0/0x220[ 65.922004] amdgpu_dm_init+0x2b6/0x2c90 [amdgpu][ 65.922342] ? console_unlock+0x77/0x120[ 65.922348] ? dev_printk_emit+0x86/0xb0[ 65.922354] dm_hw_init+0x15/0x40 [amdgpu][ 65.922686] amdgpu_device_init+0x26a8/0x33a0 [amdgpu][ 65.922921] amdgpu_driver_load_kms+0x1b/0xa0 [amdgpu][ 65.923087] amdgpu_pci_probe+0x1b7/0x630 [amdgpu][ 65.923087] local_pci_probe+0x4b/0xb0[ 65.923087] pci_device_probe+0xc8/0x280[ 65.923087] really_probe+0x187/0x300[ 65.923087] __driver_probe_device+0x85/0x130[ 65.923087] driver_probe_device+0x24/0x110[ 65.923087] __driver_attach+0xac/0x1d0[ 65.923087] ? __pfx___driver_attach+0x10/0x10[ 65.923087] bus_for_each_dev+0x7d/0xd0[ 65.923087] driver_attach+0x1e/0x30[ 65.923087] bus_add_driver+0xf2/0x200[ 65.923087] driver_register+0x64/0x130[ 65.923087] ? __pfx_amdgpu_init+0x10/0x10 [amdgpu][ 65.923087] __pci_register_driver+0x61/0x70[ 65.923087] amdgpu_init+0x7d/0xff0 [amdgpu][ 65.923087] do_one_initcall+0x49/0x310[ 65.923087] ? kmalloc_trace+0x136/0x360[ 65.923087] do_init_module+0x6a/0x270[ 65.923087] load_module+0x1fce/0x23a0[ 65.923087] init_module_from_file+0x9c/0xe0[ 65.923087] ? init_module_from_file+0x9c/0xe0[ 65.923087] idempotent_init_module+0x179/0x230[ 65.923087] __x64_sys_finit_module+0x5d/0xa0[ 65.923087] do_syscall_64+0x76/0x120[ 65.923087] entry_SYSCALL_64_after_hwframe+0x6e/0x76[ 65.923087] RIP: 0033:0x7f2d80f1e88d[ 65.923087] Code: 5b 41 5c c3 66 0f 1f 84 00 00 00 00 00 f3 0f 1e fa 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 73 b5 0f 00 f7 d8 64 89 01 48[ 65.923087] RSP: 002b:00007ffc7bc1aa78 EFLAGS: 00000246 ORIG_RAX: 0000000000000139[ 65.923087] RAX: ffffffffffffffda RBX: 0000564c9c1db130 RCX: 00007f2d80f1e88d[ 65.923087] RDX: 0000000000000000 RSI: 0000564c9c1e5480 RDI: 000000000000000f[ 65.923087] RBP: 0000000000040000 R08: 0000000000000000 R09: 0000000000000002[ 65.923087] R10: 000000000000000f R11: 0000000000000246 R12: 0000564c9c1e5480[ 65.923087] R13: 0000564c9c1db260 R14: 0000000000000000 R15: 0000564c9c1e54b0[ 65.923087] </TASK>[ 65.923927] ---[ end trace ]---Cc: Tom Chung <[email protected]>Cc: Rodrigo Siqueira <[email protected]>Cc: Roman Li <[email protected]>Cc: Alex Hung <[email protected]>Cc: Aurabindo Pillai <[email protected]>Cc: Harry Wentland <[email protected]>Cc: Hamza Mahfooz <[email protected]>Signed-off-by: Srinivasan Shanmugam <[email protected]>Reviewed-by: Roman Li <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
drm/amd/display: Pass non-null to dcn20_validate_apply_pipe_split_flags[WHAT & HOW]"dcn20_validate_apply_pipe_split_flags" dereferences merge, and thus itcannot be a null pointer. Let's pass a va
drm/amd/display: Pass non-null to dcn20_validate_apply_pipe_split_flags[WHAT & HOW]"dcn20_validate_apply_pipe_split_flags" dereferences merge, and thus itcannot be a null pointer. Let's pass a valid pointer to avoid nulldereference.This fixes 2 FORWARD_NULL issues reported by Coverity.Reviewed-by: Rodrigo Siqueira <[email protected]>Signed-off-by: Jerry Zuo <[email protected]>Signed-off-by: Alex Hung <[email protected]>Tested-by: Daniel Wheeler <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
drm/amd/display: Drop legacy codeThis commit removes code that are not used by display anymore.Acked-by: Hamza Mahfooz <[email protected]>Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@am
drm/amd/display: Drop legacy codeThis commit removes code that are not used by display anymore.Acked-by: Hamza Mahfooz <[email protected]>Signed-off-by: Rodrigo Siqueira <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
drm/amd/display: remove unnecessary braces to fix coding stylecheckpatch complains that:WARNING: braces {} are not necessary for single statement blocks+ if (pool->base.irqs != NU
drm/amd/display: remove unnecessary braces to fix coding stylecheckpatch complains that:WARNING: braces {} are not necessary for single statement blocks+ if (pool->base.irqs != NULL) {+ dal_irq_service_destroy(&pool->base.irqs);+ }Fixed it by removing unnecessary braces to fix the coding style issue.Signed-off-by: RutingZhang <[email protected]>Reviewed-by: Dongliang Mu <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
drm/amd/display: Refactor resource into component directory[WHY]Move all resource files to unique folder resource.[HOW]Created resource folder in dc, moved thedcnxx_resource.c and dcnxx_resour
drm/amd/display: Refactor resource into component directory[WHY]Move all resource files to unique folder resource.[HOW]Created resource folder in dc, moved thedcnxx_resource.c and dcnxx_resource.h files intocorresponding new folders inside the resource andmade appropriate changes for compilation in Makefiles.Reviewed-by: Martin Leung <[email protected]>Acked-by: Alex Hung <[email protected]>Signed-off-by: Mounika Adhuri <[email protected]>Tested-by: Daniel Wheeler <[email protected]>Signed-off-by: Alex Deucher <[email protected]>