drm/amd/display: Refactor DCN4x and related code[why & how]Refactor existing code related to DCN4x for better code sharing withother modules.Reviewed-by: Charlene Liu <[email protected]>Sig
drm/amd/display: Refactor DCN4x and related code[why & how]Refactor existing code related to DCN4x for better code sharing withother modules.Reviewed-by: Charlene Liu <[email protected]>Signed-off-by: Swapnil Patel <[email protected]>Signed-off-by: Zaeem Mohamed <[email protected]>Tested-by: Daniel Wheeler <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
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drm/amd/display: Allow reuse of of DCN4x codeRemove the static qualifier to make it available for code sharingwith other components.Reviewed-by: Charlene Liu <[email protected]>Signed-off-by
drm/amd/display: Allow reuse of of DCN4x codeRemove the static qualifier to make it available for code sharingwith other components.Reviewed-by: Charlene Liu <[email protected]>Signed-off-by: Dmytro <[email protected]>Signed-off-by: Charlene Liu <[email protected]>Signed-off-by: Alex Hung <[email protected]>Tested-by: Daniel Wheeler <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
drm/amd/display: Add some DCN401 reg name to macro definitionsUpdate macros to cover DCN 4.0.1.Signed-off-by: Aurabindo Pillai <[email protected]>Acked-by: Rodrigo Siqueira <rodrigo.sique
drm/amd/display: Add some DCN401 reg name to macro definitionsUpdate macros to cover DCN 4.0.1.Signed-off-by: Aurabindo Pillai <[email protected]>Acked-by: Rodrigo Siqueira <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
drm/amd/display: Enable DCN clock gating for DCN35[WHY & HOW]Enable DCN clock gating for DCN35.Disable DTBCLK gate before link trainingand re-enable afterwardsReviewed-by: Nicholas Kazlauskas
drm/amd/display: Enable DCN clock gating for DCN35[WHY & HOW]Enable DCN clock gating for DCN35.Disable DTBCLK gate before link trainingand re-enable afterwardsReviewed-by: Nicholas Kazlauskas <[email protected]>Acked-by: Alex Hung <[email protected]>Signed-off-by: Daniel Miess <[email protected]>Tested-by: Daniel Wheeler <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
drm/amd/display: Enable physymclk RCO[Why]Enable the last of the RCO options for dcn35[How]Breakout RCO from dccg35_set_physymclk so thatphysymclk RCO can be set in dccg_init withoutdisabling
drm/amd/display: Enable physymclk RCO[Why]Enable the last of the RCO options for dcn35[How]Breakout RCO from dccg35_set_physymclk so thatphysymclk RCO can be set in dccg_init withoutdisabling physymclkReviewed-by: Nicholas Kazlauskas <[email protected]>Reviewed-by: Jun Lei <[email protected]>Acked-by: Hersen Wu <[email protected]>Signed-off-by: Daniel Miess <[email protected]>Signed-off-by: Hersen Wu <[email protected]>Tested-by: Daniel Wheeler <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
drm/amd/display: Refactor HWSS into component folder[why]Rename hw_sequencer to hwseq.Move all hwseq files to uniquefolder hwss.[how]creating hwss repo in dc, and moved the dcnxx_hwseq.cand
drm/amd/display: Refactor HWSS into component folder[why]Rename hw_sequencer to hwseq.Move all hwseq files to uniquefolder hwss.[how]creating hwss repo in dc, and moved the dcnxx_hwseq.cand .h files into corresponding new folders inside the hwssand cleared the linkage errors by adding relative pathsin the Makefile.template.Reviewed-by: Martin Leung <[email protected]>Acked-by: Tom Chung <[email protected]>Signed-off-by: Mounika Adhuri <[email protected]>Tested-by: Daniel Wheeler <[email protected]>Signed-off-by: Alex Deucher <[email protected]>