drm/amd/display: Add HBlank reduction DPCD write to DPMS sequence

[Why]
Certain small HBlank timings may not have a large enough HBlank to
support audio when low bpp DSC is enabled. HBlank expansion

drm/amd/display: Add HBlank reduction DPCD write to DPMS sequence

[Why]
Certain small HBlank timings may not have a large enough HBlank to
support audio when low bpp DSC is enabled. HBlank expansion by the
source can solve this problem, but requires the branch/sink to support
HBlank reduction.

[How]
Update DPMS sequence to call DM to perform DPCD write to enable HBlank
reduction on the branch/sink. Add stub in dm_helpers to be implemented
later.

Reviewed-by: Michael Strauss <[email protected]>
Reviewed-by: Wenjing Liu <[email protected]>
Signed-off-by: George Shen <[email protected]>
Signed-off-by: Roman Li <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: quality improvements for EASF and ISHARP

[Why]
Update coefficients and LUT tables for scaler and sharpener
to improve quality and support different use cases (SDR/HDR)

[How]
Move

drm/amd/display: quality improvements for EASF and ISHARP

[Why]
Update coefficients and LUT tables for scaler and sharpener
to improve quality and support different use cases (SDR/HDR)

[How]
Move scaler coefficients to new file dc_spl_scl_easf_filters.c
Remove older coefficients file dc_sp_scl_filters_old.c
Update default taps for EASF support
Update LLS policy for DON'T CARE case
Update cositing offset from 0.5 to 0.25
Add support to adjust sharpness based on level, use case,
and scaling ratio ( using discrete levels )
Apply sharpness to all RGB surfaces and both NV12 and P010
video ( in fullscreen only ). Upscale and 1:1 ratios only
Enable scaler when sharpening 1:1 ratios
Add support for coefficients that are in S1.10 format
(convert to S1.12 format)

Reviewed-by: Jun Lei <[email protected]>
Signed-off-by: Jerry Zuo <[email protected]>
Signed-off-by: Samson Tam <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Code style adjustments

This commit address some small code style issues in DC.

Signed-off-by: Rodrigo Siqueira <[email protected]>
Acked-by: Aurabindo Pillai <aurabindo.pill

drm/amd/display: Code style adjustments

This commit address some small code style issues in DC.

Signed-off-by: Rodrigo Siqueira <[email protected]>
Acked-by: Aurabindo Pillai <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: adjust flow for deallocation mst payload

[Why]
MST relevant variables are maintained at drm side. As the result, we
still have to call drm_dp_remove_payload_part2() to update the re

drm/amd/display: adjust flow for deallocation mst payload

[Why]
MST relevant variables are maintained at drm side. As the result, we
still have to call drm_dp_remove_payload_part2() to update the relevant
values regardless the link is under mst mode or not. We used to have a
workaround patch to tackle this: commit 3d8fcc6740c9 ("drm/amd/display:
Extract temp drm mst deallocation wa into its own function")

Now it's time to remove the workaround and adjust the flow.

[How]
During deallocate_mst_payload(), source actually doesn't send out
ALLOCATE_PAYLOAD at the end as like the flow in allocate_mst_payload().
Call function dm_helpers_dp_mst_send_payload_allocation() at the end of
deallocate_mst_payload() is a bit confusing.

Separate dm_helpers_dp_mst_send_payload_allocation() into 2 functions.
Have a new function dm_helpers_dp_mst_update_mst_mgr_for_deallocation()
to replace dm_helpers_dp_mst_send_payload_allocation() for payload
deallocation.

Cc: Ville Syrjälä <[email protected]>
Reviewed-by: Wenjing Liu <[email protected]>
Acked-by: Hamza Mahfooz <[email protected]>
Signed-off-by: Wayne Lin <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Enable Freesync over PCon

[why]
Enable Freesync over PCon on Linux environment.

[how]
Adding Freesync over PCon support in amdgpu_dm
- Read DPCD for Freesync over PCon capabilitiy

drm/amd/display: Enable Freesync over PCon

[why]
Enable Freesync over PCon on Linux environment.

[how]
Adding Freesync over PCon support in amdgpu_dm
- Read DPCD for Freesync over PCon capabilitiy
- Add whitelist for compatible branch devices

Reviewed-by: Chao-kai Wang <[email protected]>
Acked-by: Alex Hung <[email protected]>
Signed-off-by: Sung Joon Kim <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: force connector state when bpc changes during compliance

[Why]
During DP DSC compliance tests, bpc requested would
change between sub-tests, which requires stream
to be recommited.

drm/amd/display: force connector state when bpc changes during compliance

[Why]
During DP DSC compliance tests, bpc requested would
change between sub-tests, which requires stream
to be recommited.

[How]
Force connector to disconnect and reconnect whenever
there is a bpc change in automated test.

Reviewed-by: Jerry Zuo <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Qingqing Zhuo <[email protected]>
Signed-off-by: hersen wu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Only update link settings after successful MST link train

[WHY]
Currently driver reduces verified link caps on DPIA devices if a link is
trained at a link rate below the max rate ve

drm/amd/display: Only update link settings after successful MST link train

[WHY]
Currently driver reduces verified link caps on DPIA devices if a link is
trained at a link rate below the max rate verified during link detection.
This blocks high bandwidth modes after setting a low bandwidth mode.

[HOW]
Only update link rate after a successful link train if link is MST.

Reviewed-by: Mustapha Ghaddar <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Michael Strauss <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Refactor edp panel power sequencer(PPS) codes

[Why & How]
Move extra panel power sequencer settings into panel_cofig struct.

Reviewed-by: Anthony Koo <[email protected]>
Acked-by

drm/amd/display: Refactor edp panel power sequencer(PPS) codes

[Why & How]
Move extra panel power sequencer settings into panel_cofig struct.

Reviewed-by: Anthony Koo <[email protected]>
Acked-by: Wayne Lin <[email protected]>
Signed-off-by: Ian Chen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Refactor edp dsc codes.

Refactor edp dsc codes.

We split out edp dsc config from "global" to "per-panel" config settings.

Reviewed-by: Mike Hsieh <[email protected]>
Acked-by: Br

drm/amd/display: Refactor edp dsc codes.

Refactor edp dsc codes.

We split out edp dsc config from "global" to "per-panel" config settings.

Reviewed-by: Mike Hsieh <[email protected]>
Acked-by: Brian Chang <[email protected]>
Signed-off-by: Ian Chen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu/dc/mst: Rename dp_mst_stream_allocation(_table)

Just to make this more clear to outside contributors that these are
DC-specific structs, as this also threw me into a loop a number of time

drm/amdgpu/dc/mst: Rename dp_mst_stream_allocation(_table)

Just to make this more clear to outside contributors that these are
DC-specific structs, as this also threw me into a loop a number of times
before I figured out the purpose of this.

Signed-off-by: Lyude Paul <[email protected]>
Cc: Wayne Lin <[email protected]>
Cc: Fangzhi Zuo <[email protected]>
Acked-by: Jani Nikula <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]

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drm/amd/display: remove redundant CONFIG_DRM_AMD_DC_DCN in dc

[Why & How]
CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC
code should be OS-agnostic.

This patch fixes it by r

drm/amd/display: remove redundant CONFIG_DRM_AMD_DC_DCN in dc

[Why & How]
CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC
code should be OS-agnostic.

This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN
in dc and dc/core directories.

Reviewed-by: Rodrigo Siqueira <[email protected]>
Acked-by: Stylon Wang <[email protected]>
Signed-off-by: Alex Hung <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: refine the EDID override

[Why]
We already get the SBIOS EDID via ACPI on KMD,
but after that, we just use the monitor EDID to set it HDR caps

[How]
Make the SBIOS EDID override to

drm/amd/display: refine the EDID override

[Why]
We already get the SBIOS EDID via ACPI on KMD,
but after that, we just use the monitor EDID to set it HDR caps

[How]
Make the SBIOS EDID override to read_edid()
That can change the read EDID caps from the right EDID

Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: jinzh <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Change return type of dm_helpers_dp_mst_stop_top_mgr

Prepare for future dm can have different implementation depends on the
return value.

Tested-by: Daniel Wheeler <daniel.wheeler@

drm/amd/display: Change return type of dm_helpers_dp_mst_stop_top_mgr

Prepare for future dm can have different implementation depends on the
return value.

Tested-by: Daniel Wheeler <[email protected]>
Reviewed-by: Wenjing Liu <[email protected]>
Acked-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Ian Chen <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: modify SMU_TIMEOUT macro.

[WHY]
If some SMU features are not enabled, SMU will return fail to that
message.

[HOW]
SMU_TIMEOUT macro will treat "return fail" as timeout also.
Correc

drm/amd/display: modify SMU_TIMEOUT macro.

[WHY]
If some SMU features are not enabled, SMU will return fail to that
message.

[HOW]
SMU_TIMEOUT macro will treat "return fail" as timeout also.
Correct the macro to only report timeout case.

Reviewed-by: Jun Lei <[email protected]>
Acked-by: Wayne Lin <[email protected]>
Signed-off-by: Ian Chen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: replace drm_detect_hdmi_monitor() with drm_display_info.is_hdmi

Once EDID is parsed, the monitor HDMI support information is available
through drm_display_info.is_hdmi. The amdgpu driver

drm/amdgpu: replace drm_detect_hdmi_monitor() with drm_display_info.is_hdmi

Once EDID is parsed, the monitor HDMI support information is available
through drm_display_info.is_hdmi. The amdgpu driver still calls
drm_detect_hdmi_monitor() to retrieve the same information, which
is less efficient. Change to drm_display_info.is_hdmi

This is a TODO task in Documentation/gpu/todo.rst

Reviewed-by: Harry Wentland <[email protected]>
Signed-off-by: Claudio Suarez <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Support for SET_CONFIG processing with DMUB

[Why]
To process SET_CONFIG transactions with DMUB using inbox1 and
outbox1 mail boxes.

[How]
1) Added inbox1 DPIA command subtype DMUB_

drm/amd/display: Support for SET_CONFIG processing with DMUB

[Why]
To process SET_CONFIG transactions with DMUB using inbox1 and
outbox1 mail boxes.

[How]
1) Added inbox1 DPIA command subtype DMUB_CMD__DPIA_SET_CONFIG_ACCESS to
issue SET_CONFIG command to DMUB in dc_process_dmub_set_config_async().
DMUB processes the command with DPIA sends reply back immediately or
in an outbox1 message triggering an outbox1 interrupt to driver.
2) DMUB posts SET_CONFIG reply as an Outbox1 message of type
DMUB_OUT_CMD__SET_CONFIG_REPLY.
3) The dmub async to sync mechanism for AUX is modified to accommodate
SET_CONFIG commands for both command issue and reply code paths.

Reviewed-by: Jun Lei <[email protected]>
Acked-by: Wayne Lin <[email protected]>
Acked-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Harry Wentland <[email protected]>
Signed-off-by: Meenakshikumar Somasundaram <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Add periodic detection when zstate is enabled

[Why]
When system is in Z10 HPD interrupts cannot fire, we may miss display
configuration changes.

[How]
When Zstate is enabled, if DM

drm/amd/display: Add periodic detection when zstate is enabled

[Why]
When system is in Z10 HPD interrupts cannot fire, we may miss display
configuration changes.

[How]
When Zstate is enabled, if DMUB indicate DCN has lost power, do a
complete detection periodically.

Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Mikita Lipski <[email protected]>
Signed-off-by: Eric Yang <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Add DP 2.0 SST DC Support

1. Retrieve 128/132b link cap.
2. 128/132b link training and payload allocation.
3. UHBR10 link rate support.

[squash in warning fixes - Alex]

Signed-off

drm/amd/display: Add DP 2.0 SST DC Support

1. Retrieve 128/132b link cap.
2. 128/132b link training and payload allocation.
3. UHBR10 link rate support.

[squash in warning fixes - Alex]

Signed-off-by: Fangzhi Zuo <[email protected]>
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Add DCN3.1 clock manager support

Adds support for clock requests for the various parts of the DCN3.1 IP
and the interfaces and definitions for sending messages to SMU/PMFW.

Include

drm/amd/display: Add DCN3.1 clock manager support

Adds support for clock requests for the various parts of the DCN3.1 IP
and the interfaces and definitions for sending messages to SMU/PMFW.

Includes new support for z9/10, detecting SMU timeout and p-state
support enablement.

Acked-by: Huang Rui <[email protected]>
Signed-off-by: Nicholas Kazlauskas <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Support for DMUB AUX

[WHY]
To process AUX transactions with DMUB using inbox1 and outbox1 mail boxes.

[How]
1) Added inbox1 command DMUB_CMD__DP_AUX_ACCESS to issue AUX commands

drm/amd/display: Support for DMUB AUX

[WHY]
To process AUX transactions with DMUB using inbox1 and outbox1 mail boxes.

[How]
1) Added inbox1 command DMUB_CMD__DP_AUX_ACCESS to issue AUX commands
to DMUB in dc_process_dmub_aux_transfer_async(). DMUB processes AUX cmd
with DCN and sends reply back in an outbox1 message triggering an
outbox1 interrupt to driver.
2) In existing driver implementation, AUX commands are processed
synchronously by configuring DCN reg. But in DMUB AUX, driver sends an
inbox1 message and waits for a conditional variable (CV) which will be
signaled by outbox1 ISR.
3) DM will retrieve Outbox1 message and send back reply to upper layer
and complete the AUX command

Signed-off-by: Jude Shih <[email protected]>
Reviewed-by: Hanghong Ma <[email protected]>
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Wayne Lin <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: add helper for enabling mst stream features

[Why]
Some MST devices uses different method to enable mst
specific stream features.

[How]
Add dm_helpers_mst_enable_stream features. Th

drm/amd/display: add helper for enabling mst stream features

[Why]
Some MST devices uses different method to enable mst
specific stream features.

[How]
Add dm_helpers_mst_enable_stream features. This can be
modified later when we are ready to implement those features.

Signed-off-by: Bing Guo <[email protected]>
Reviewed-by: Anthony Koo <[email protected]>
Acked-by: Aurabindo Pillai <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Fix typo for helpers function name

[why]
Word "helper" was misspelled as "helpes" in
dm_helpes_dmub_outbox0_interrupt_control function.

[how]
Fix the spelling.

Tested-by: Daniel W

drm/amd/display: Fix typo for helpers function name

[why]
Word "helper" was misspelled as "helpes" in
dm_helpes_dmub_outbox0_interrupt_control function.

[how]
Fix the spelling.

Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Leo (Hanghong) Ma <[email protected]>
Reviewed-by: Yongqiang Sun <[email protected]>
Acked-by: Solomon Chiu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Implement dmub trace event

[Why & How]
DMUB FW send trace event via outbox0 interrupt. Driver will handle it.

Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Yon

drm/amd/display: Implement dmub trace event

[Why & How]
DMUB FW send trace event via outbox0 interrupt. Driver will handle it.

Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Yongqiang Sun <[email protected]>
Reviewed-by: Tony Cheng <[email protected]>
Acked-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Clear dc remote sinks on MST disconnect

[Why&How]
Recent changes to upstream mst code remove the callback which
cleared the internal state for mst. Move the missing functionality
th

drm/amd/display: Clear dc remote sinks on MST disconnect

[Why&How]
Recent changes to upstream mst code remove the callback which
cleared the internal state for mst. Move the missing functionality
that was previously called through the destroy call back for mst connector
destroy

Signed-off-by: Aurabindo Pillai <[email protected]>
Signed-off-by: Eryk Brol <[email protected]>
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)

Avoids confusion in configurations.

v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled
v3: rebase on latest code

Reviewed

drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)

Avoids confusion in configurations.

v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled
v3: rebase on latest code

Reviewed-by: Luben Tuikov <[email protected]> (v1)
Signed-off-by: Alex Deucher <[email protected]>

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