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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1 |
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9a45ad15 |
| 22-Jul-2024 |
Wayne Lin <[email protected]> |
drm/amd/display: Adjust dm to use supported interfaces for setting multiple crc windows
[Why & How] We actually have the capability to calculate independent CRC for 2 crc window at the same time. Ex
drm/amd/display: Adjust dm to use supported interfaces for setting multiple crc windows
[Why & How] We actually have the capability to calculate independent CRC for 2 crc window at the same time. Extend dm with the capability by having array to configure/maintain multiple crc windows. Add the flexibility but use 1st CRC instance only for now. Can change to use the 2nd CRC instance if needed.
Reviewed-by: HaoPing Liu <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Signed-off-by: Roman Li <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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b8d9d5fe |
| 29-Oct-2024 |
Tom Chung <[email protected]> |
drm/amd/display: Change some variable name of psr
Panel Replay feature may also use the same variable with PSR. Change the variable name and make it not specify for PSR.
Reviewed-by: Leo Li <sunpen
drm/amd/display: Change some variable name of psr
Panel Replay feature may also use the same variable with PSR. Change the variable name and make it not specify for PSR.
Reviewed-by: Leo Li <[email protected]> Signed-off-by: Tom Chung <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit c7fafb7a46b38a11a19342d153f505749bf56f3e) Cc: [email protected] # 6.11+
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c7fafb7a |
| 29-Oct-2024 |
Tom Chung <[email protected]> |
drm/amd/display: Change some variable name of psr
Panel Replay feature may also use the same variable with PSR. Change the variable name and make it not specify for PSR.
Reviewed-by: Leo Li <sunpen
drm/amd/display: Change some variable name of psr
Panel Replay feature may also use the same variable with PSR. Change the variable name and make it not specify for PSR.
Reviewed-by: Leo Li <[email protected]> Signed-off-by: Tom Chung <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2 |
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c0459bdd |
| 20-Oct-2022 |
Alan Liu <[email protected]> |
drm/amd/display: Implement secure display on DCN21
[Why] Porting secure display feature from DCN10 to DCN21. Support single display for now and will extend to multiple displays.
[How] - use workque
drm/amd/display: Implement secure display on DCN21
[Why] Porting secure display feature from DCN10 to DCN21. Support single display for now and will extend to multiple displays.
[How] - use workqueue to offload works for dmub or dmcu firmware - after receiving ROI update from userspace, set skip_frame_cnt to 1 - refactor amdgpu_dm_crtc_handle_crc_window_irq() - disable PSR before activating secure_display on a crtc - check if secure_display is activated before enabling psr - only work for single display for now.
Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Wayne Lin <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alan Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5 |
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58aa1c50 |
| 03-Aug-2021 |
Nicholas Kazlauskas <[email protected]> |
drm/amd/display: Use vblank control events for PSR enable/disable
[Why] PSR can disable the HUBP along with the OTG when PSR is active.
We'll hit a pageflip timeout when the OTG is disable because
drm/amd/display: Use vblank control events for PSR enable/disable
[Why] PSR can disable the HUBP along with the OTG when PSR is active.
We'll hit a pageflip timeout when the OTG is disable because we're no longer updating the CRTC vblank counter and the pflip high IRQ will not fire on the flip.
In order to flip the page flip timeout occur we should modify the enter/exit conditions to match DRM requirements.
[How] Use our deferred handlers for DRM vblank control to notify DMCU(B) when it can enable or disable PSR based on whether vblank is disabled or enabled respectively.
We'll need to pass along the stream with the notification now because we want to access the CRTC state while the CRTC is locked to get the stream state prior to the commit.
Retain a reference to the stream so it remains safe to continue to access and release that reference once we're done with it.
Enable/disable logic follows what we were previously doing in update_planes.
The workqueue has to be flushed before programming streams or planes to ensure that we exit out of idle optimizations and PSR before these events occur if necessary.
To keep the skip count logic the same to avoid FBCON PSR enablement requires copying the allow condition onto the DM IRQ parameters - a field that we can actually access from the worker.
Reviewed-by: Roman Li <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2 |
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86bc2219 |
| 02-Mar-2021 |
Wayne Lin <[email protected]> |
drm/amd/display: Support crc on specific region
[Why] To support feature that calculates CRTC CRC value on specific region (crc window).
[How] 1. Use debugfs to specify crtc crc window 2. Use vline
drm/amd/display: Support crc on specific region
[Why] To support feature that calculates CRTC CRC value on specific region (crc window).
[How] 1. Use debugfs to specify crtc crc window 2. Use vline0 IRQ to write crtc crc window
Signed-off-by: Wayne Lin <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Eryk Brol <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v5.12-rc1, v5.12-rc1-dontuse, v5.11 |
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8e7b6fee |
| 09-Feb-2021 |
Wayne Lin <[email protected]> |
drm/amd/display: Fix crc_src is not thread safe
[Why & How] Find out that referring to crtc_state->crc_src is not thread safe. Move crc_src from dm_crtc_state to dm_irq_params to fix this.
Signed-o
drm/amd/display: Fix crc_src is not thread safe
[Why & How] Find out that referring to crtc_state->crc_src is not thread safe. Move crc_src from dm_crtc_state to dm_irq_params to fix this.
Signed-off-by: Wayne Lin <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Eryk Brol <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1 |
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585d450c |
| 12-Aug-2020 |
Aurabindo Pillai <[email protected]> |
drm/amd/display: Refactor to prevent crtc state access in DM IRQ handler
[Why&How] Currently commit_tail holds global locks and wait for dependencies which is against the DRM API contracts. Inorder
drm/amd/display: Refactor to prevent crtc state access in DM IRQ handler
[Why&How] Currently commit_tail holds global locks and wait for dependencies which is against the DRM API contracts. Inorder to fix this, IRQ handler should be able to run without having to access crtc state. Required parameters are copied over so that they can be directly accessed from the interrupt handler
Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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5d1c59c4 |
| 12-Aug-2020 |
Aurabindo Pillai <[email protected]> |
drm/amdgpu: Move existing pflip fields into separate struct
[Why&How] To refactor DM IRQ management, all fields used by IRQ is best moved to a separate struct so that main amdgpu_crtc struct need no
drm/amdgpu: Move existing pflip fields into separate struct
[Why&How] To refactor DM IRQ management, all fields used by IRQ is best moved to a separate struct so that main amdgpu_crtc struct need not be changed Location of the new struct shall be in DM
Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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