| 9f646ff2 | 26-Aug-2024 |
Mrinmay Sarkar <[email protected]> |
dmaengine: dw-edma: Do not enable watermark interrupts for HDMA
DW_HDMA_V0_LIE and DW_HDMA_V0_RIE are initialized as BIT(3) and BIT(4) respectively in dw_hdma_control enum. But as per HDMA register
dmaengine: dw-edma: Do not enable watermark interrupts for HDMA
DW_HDMA_V0_LIE and DW_HDMA_V0_RIE are initialized as BIT(3) and BIT(4) respectively in dw_hdma_control enum. But as per HDMA register these bits are corresponds to LWIE and RWIE bit i.e local watermark interrupt enable and remote watermarek interrupt enable. In linked list mode LWIE and RWIE bits only enable the local and remote watermark interrupt.
Since the watermark interrupts are not used but enabled, this leads to spurious interrupts getting generated. So remove the code that enables them to avoid generating spurious watermark interrupts.
And also rename DW_HDMA_V0_LIE to DW_HDMA_V0_LWIE and DW_HDMA_V0_RIE to DW_HDMA_V0_RWIE as there is no LIE and RIE bits in HDMA and those bits are corresponds to LWIE and RWIE bits.
Fixes: e74c39573d35 ("dmaengine: dw-edma: Add support for native HDMA") cc: [email protected] Signed-off-by: Mrinmay Sarkar <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Reviewed-by: Serge Semin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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| bbcc1c83 | 29-Jan-2024 |
Kory Maincent <[email protected]> |
dmaengine: dw-edma: eDMA: Add sync read before starting the DMA transfer in remote setup
The Linked list element and pointer are not stored in the same memory as the eDMA controller register. If the
dmaengine: dw-edma: eDMA: Add sync read before starting the DMA transfer in remote setup
The Linked list element and pointer are not stored in the same memory as the eDMA controller register. If the doorbell register is toggled before the full write of the linked list a race condition error will occur. In remote setup we can only use a readl to the memory to assure the full write has occurred.
Fixes: 7e4b8a4fbe2c ("dmaengine: Add Synopsys eDMA IP version 0 support") Reviewed-by: Serge Semin <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Kory Maincent <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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| 712a92a4 | 29-Jan-2024 |
Kory Maincent <[email protected]> |
dmaengine: dw-edma: HDMA: Add sync read before starting the DMA transfer in remote setup
The Linked list element and pointer are not stored in the same memory as the HDMA controller register. If the
dmaengine: dw-edma: HDMA: Add sync read before starting the DMA transfer in remote setup
The Linked list element and pointer are not stored in the same memory as the HDMA controller register. If the doorbell register is toggled before the full write of the linked list a race condition error will occur. In remote setup we can only use a readl to the memory to assure the full write has occurred.
Fixes: e74c39573d35 ("dmaengine: dw-edma: Add support for native HDMA") Reviewed-by: Serge Semin <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Kory Maincent <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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| e2f6a578 | 29-Jan-2024 |
Kory Maincent <[email protected]> |
dmaengine: dw-edma: Add HDMA remote interrupt configuration
Only the local interruption was configured, remote interrupt was left behind. This patch fix it by setting stop and abort remote interrupt
dmaengine: dw-edma: Add HDMA remote interrupt configuration
Only the local interruption was configured, remote interrupt was left behind. This patch fix it by setting stop and abort remote interrupts when the DW_EDMA_CHIP_LOCAL flag is not set.
Fixes: e74c39573d35 ("dmaengine: dw-edma: Add support for native HDMA") Signed-off-by: Kory Maincent <[email protected]> Reviewed-by: Serge Semin <[email protected]> Acked-by: Manivannan Sadhasivam <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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| 7b52ba86 | 29-Jan-2024 |
Kory Maincent <[email protected]> |
dmaengine: dw-edma: Fix wrong interrupt bit set for HDMA
Instead of setting HDMA_V0_LOCAL_ABORT_INT_EN bit, HDMA_V0_LOCAL_STOP_INT_EN bit got set twice, due to which the abort interrupt is not getti
dmaengine: dw-edma: Fix wrong interrupt bit set for HDMA
Instead of setting HDMA_V0_LOCAL_ABORT_INT_EN bit, HDMA_V0_LOCAL_STOP_INT_EN bit got set twice, due to which the abort interrupt is not getting generated for HDMA. Fix it by setting the correct interrupt enable bit.
Fixes: e74c39573d35 ("dmaengine: dw-edma: Add support for native HDMA") Reviewed-by: Serge Semin <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Kory Maincent <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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| e74c3957 | 20-May-2023 |
Cai Huoqing <[email protected]> |
dmaengine: dw-edma: Add support for native HDMA
Add support for HDMA NATIVE, as long the IP design has set the compatible register map parameter-HDMA_NATIVE, which allows compatibility for native HD
dmaengine: dw-edma: Add support for native HDMA
Add support for HDMA NATIVE, as long the IP design has set the compatible register map parameter-HDMA_NATIVE, which allows compatibility for native HDMA register configuration.
The HDMA Hyper-DMA IP is an enhancement of the eDMA embedded-DMA IP. And the native HDMA registers are different from eDMA, so this patch add support for HDMA NATIVE mode.
HDMA write and read channels operate independently to maximize the performance of the HDMA read and write data transfer over the link When you configure the HDMA with multiple read channels, then it uses a round robin (RR) arbitration scheme to select the next read channel to be serviced.The same applies when you have multiple write channels.
The native HDMA driver also supports a maximum of 16 independent channels (8 write + 8 read), which can run simultaneously. Both SAR (Source Address Register) and DAR (Destination Address Register) are aligned to byte.
Signed-off-by: Cai Huoqing <[email protected]> Reviewed-by: Serge Semin <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Tested-by: Serge Semin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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| 970b17df | 11-Apr-2023 |
Shunsuke Mie <[email protected]> |
dmaengine: dw-edma: Fix to enable to issue dma request on DMA processing
The issue_pending request is ignored while driver is processing a DMA request. Fix to issue the pending requests on any dma c
dmaengine: dw-edma: Fix to enable to issue dma request on DMA processing
The issue_pending request is ignored while driver is processing a DMA request. Fix to issue the pending requests on any dma channel status.
Fixes: e63d79d1ffcd ("dmaengine: Add Synopsys eDMA IP core driver") Signed-off-by: Shunsuke Mie <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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| acf99415 | 25-Jan-2023 |
Serge Semin <[email protected]> |
dmaengine: dw-edma: Depend on DW_EDMA instead of selecting it
Kconfig "select" is discouraged for visible symbols like DW_EDMA because it makes it possible to set DW_EDMA even if DW_EDMA depends on
dmaengine: dw-edma: Depend on DW_EDMA instead of selecting it
Kconfig "select" is discouraged for visible symbols like DW_EDMA because it makes it possible to set DW_EDMA even if DW_EDMA depends on things that are not set (see Documentation/kbuild/kconfig-language.txt).
Convert DW_EDMA_PCIE so it depends on DW_EDMA instead of selecting it.
There will likely be several future drivers that depend on DW_EDMA, so this uses "if DW_EDMA" to enclose them all rather than repeating "depends on DW_EDMA" for each.
[bhelgaas: split to separate patch, commit log] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Vinod Koul <[email protected]>
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| 16f8a086 | 13-Jan-2023 |
Serge Semin <[email protected]> |
dmaengine: dw-edma: Add mem-mapped LL-entries support
Currently the DW eDMA driver only supports the linked lists memory allocated locally with respect to the remote eDMA engine setup. It means the
dmaengine: dw-edma: Add mem-mapped LL-entries support
Currently the DW eDMA driver only supports the linked lists memory allocated locally with respect to the remote eDMA engine setup. It means the linked lists will be accessible by the CPU via the MMIO space only. If eDMA is embedded into the DW PCIe Root Ports or local Endpoints (which support will be added in subsequent commits) the linked lists are supposed to be allocated in the CPU memory. In that case the LL-entries can be directly accessed, while the former case implies using the MMIO accessors for that.
In order to have both cases supported by the driver, the dw_edma_region descriptor should be fixed to contain the MMIO-backed and just memory-based virtual addresses. The linked lists initialization procedure will use one of them depending on the eDMA device nature. If the eDMA engine is embedded into the local DW PCIe Root Port/Endpoint controllers, the list entries will be directly accessed by referencing the corresponding structure fields. Otherwise the MMIO accessors usage will be preserved.
Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Vinod Koul <[email protected]>
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| 4ac16621 | 13-Jan-2023 |
Serge Semin <[email protected]> |
dmaengine: dw-edma: Skip cleanup procedure if no private data found
DW eDMA driver private data is preserved in the passed DW eDMA chip info structure. If the probe fails or for some reason the pass
dmaengine: dw-edma: Skip cleanup procedure if no private data found
DW eDMA driver private data is preserved in the passed DW eDMA chip info structure. If the probe fails or for some reason the passed info object doesn't have the private data pointer initialized, halt the DMA device cleanup procedure to prevent system crashes.
Link: https://lore.kernel.org/r/[email protected] Tested-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Acked-by: Vinod Koul <[email protected]>
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| 53c0e2f9 | 13-Jan-2023 |
Serge Semin <[email protected]> |
dmaengine: dw-edma: Replace chip ID number with device name
Using an abstract number as the DW eDMA chip identifier isn't practical because there can be more than one DW eDMA controller on the platf
dmaengine: dw-edma: Replace chip ID number with device name
Using an abstract number as the DW eDMA chip identifier isn't practical because there can be more than one DW eDMA controller on the platform. Some may be detected as the PCIe Endpoints, and others may be embedded in DW PCIe Root Port/Endpoint controllers. An abstract number in, for instance, the IRQ handlers list, doesn't give a notion regarding their reference to the particular DMA controller.
To preserve the code simplicity and support multi-eDMA platforms, use the parental device name to create the DW eDMA controller name.
Link: https://lore.kernel.org/r/[email protected] Tested-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Acked-by: Vinod Koul <[email protected]>
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| 7119685c | 13-Jan-2023 |
Serge Semin <[email protected]> |
dmaengine: dw-edma: Drop DT-region allocation
There is no point in allocating additional memory for the data target regions passed to the client drivers. Use the already available structures defined
dmaengine: dw-edma: Drop DT-region allocation
There is no point in allocating additional memory for the data target regions passed to the client drivers. Use the already available structures defined in the dw_edma_chip instance.
Note: these regions are unused in normal circumstances since they are specific to the case of eDMA being embedded into the DW PCIe Endpoint and having its CSRs accessible via an Endpoint BAR. This case is only known to be implemented as a part of the Synopsys PCIe Endpoint IP prototype kit.
Link: https://lore.kernel.org/r/[email protected] Tested-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Acked-by: Vinod Koul <[email protected]>
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| b73bdc50 | 01-Feb-2022 |
Serge Semin <[email protected]> |
dmaengine: dw-edma: Use non-atomic io-64 methods
Instead of splitting 64-bits IOs up into two 32-bits ones, use the existing non-atomic readq()/writeq() functions. By doing so we can discard CONFIG_
dmaengine: dw-edma: Use non-atomic io-64 methods
Instead of splitting 64-bits IOs up into two 32-bits ones, use the existing non-atomic readq()/writeq() functions. By doing so we can discard CONFIG_64BIT #ifdefs from the code.
Tested-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Acked-by: Vinod Koul <[email protected]>
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| 5fdca4a9 | 25-Jan-2023 |
Serge Semin <[email protected]> |
dmaengine: dw-edma: Fix readq_ch() return value truncation
Previously, readq_ch() did a 64-bit readq(), but truncated the result by storing it in the u32 "value". Change "value" to u64 to avoid the
dmaengine: dw-edma: Fix readq_ch() return value truncation
Previously, readq_ch() did a 64-bit readq(), but truncated the result by storing it in the u32 "value". Change "value" to u64 to avoid the truncation.
Note: the method is currently unused, so the bug hasn't caused any problem so far.
Fixes: 04e0a39fc10f ("dmaengine: dw-edma: Add writeq() and readq() for 64 bits architectures") Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
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| 6cb6e9c6 | 13-Jan-2023 |
Serge Semin <[email protected]> |
dmaengine: dw-edma: Use DMA engine device debugfs subdirectory
Since all DW eDMA read and write channels are now installed in a framework of a single DMA engine device, move all the DW eDMA-specific
dmaengine: dw-edma: Use DMA engine device debugfs subdirectory
Since all DW eDMA read and write channels are now installed in a framework of a single DMA engine device, move all the DW eDMA-specific debugfs nodes into a ready-to-use DMA-engine debugfs subdirectory. It's created during the DMA-device registration and can be found in the dma_device.dbg_dev_root field.
Link: https://lore.kernel.org/r/[email protected] Tested-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Acked-by: Vinod Koul <[email protected]>
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