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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18 |
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| #
cd81775a |
| 21-May-2022 |
Julia Lawall <[email protected]> |
crypto: ccp - fix typo in comment
Spelling mistake (triple letters) in comment. Detected with the help of Coccinelle.
Signed-off-by: Julia Lawall <[email protected]> Signed-off-by: Herbert Xu <
crypto: ccp - fix typo in comment
Spelling mistake (triple letters) in comment. Detected with the help of Coccinelle.
Signed-off-by: Julia Lawall <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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Revision tags: v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4 |
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| #
d9dd5ef3 |
| 03-Jul-2020 |
Herbert Xu <[email protected]> |
crypto: ccp - Fix sparse warnings
This patch fixes a number of endianness marking issues in the ccp driver.
Signed-off-by: Herbert Xu <[email protected]> Acked-by: John Allen <john.allen@
crypto: ccp - Fix sparse warnings
This patch fixes a number of endianness marking issues in the ccp driver.
Signed-off-by: Herbert Xu <[email protected]> Acked-by: John Allen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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Revision tags: v5.8-rc3 |
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| #
8a302808 |
| 22-Jun-2020 |
John Allen <[email protected]> |
crypto: ccp - Fix use of merged scatterlists
Running the crypto manager self tests with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS may result in several types of errors when using the ccp-crypto driver:
alg
crypto: ccp - Fix use of merged scatterlists
Running the crypto manager self tests with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS may result in several types of errors when using the ccp-crypto driver:
alg: skcipher: cbc-des3-ccp encryption failed on test vector 0; expected_error=0, actual_error=-5 ...
alg: skcipher: ctr-aes-ccp decryption overran dst buffer on test vector 0 ...
alg: ahash: sha224-ccp test failed (wrong result) on test vector ...
These errors are the result of improper processing of scatterlists mapped for DMA.
Given a scatterlist in which entries are merged as part of mapping the scatterlist for DMA, the DMA length of a merged entry will reflect the combined length of the entries that were merged. The subsequent scatterlist entry will contain DMA information for the scatterlist entry after the last merged entry, but the non-DMA information will be that of the first merged entry.
The ccp driver does not take this scatterlist merging into account. To address this, add a second scatterlist pointer to track the current position in the DMA mapped representation of the scatterlist. Both the DMA representation and the original representation of the scatterlist must be tracked as while most of the driver can use just the DMA representation, scatterlist_map_and_copy() must use the original representation and expects the scatterlist pointer to be accurate to the original representation.
In order to properly walk the original scatterlist, the scatterlist must be walked until the combined lengths of the entries seen is equal to the DMA length of the current entry being processed in the DMA mapped representation.
Fixes: 63b945091a070 ("crypto: ccp - CCP device driver and interface support") Signed-off-by: John Allen <[email protected]> Cc: [email protected] Acked-by: Tom Lendacky <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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Revision tags: v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3 |
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| #
3a646b6e |
| 02-Aug-2019 |
Bjorn Helgaas <[email protected]> |
crypto: ccp - Remove unnecessary linux/pci.h include
Remove unused includes of linux/pci.h.
Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Gary R Hook <[email protected]> Signed-off-b
crypto: ccp - Remove unnecessary linux/pci.h include
Remove unused includes of linux/pci.h.
Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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| #
f6b0b78a |
| 02-Aug-2019 |
Bjorn Helgaas <[email protected]> |
crypto: ccp - Include DMA declarations explicitly
ccp-dev.h uses dma_direction, which is defined in linux/dma-direction.h. Include that explicitly instead of relying on it being included via linux/p
crypto: ccp - Include DMA declarations explicitly
ccp-dev.h uses dma_direction, which is defined in linux/dma-direction.h. Include that explicitly instead of relying on it being included via linux/pci.h, since ccp-dev.h requires nothing else from linux/pci.h.
Similarly, ccp-dmaengine.c uses dma_get_mask(), which is defined in linux/dma-mapping.h, so include that explicitly since it requires nothing else from linux/pci.h.
A future patch will remove the includes of linux/pci.h where it is not needed.
Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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Revision tags: v5.3-rc2, v5.3-rc1 |
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| #
c4a89279 |
| 09-Jul-2019 |
Hook, Gary <[email protected]> |
crypto: ccp - Add a module parameter to specify a queue count
Add a module parameter to limit the number of queues per CCP. The default value (nqueues=0) is to set up every available queue on each d
crypto: ccp - Add a module parameter to specify a queue count
Add a module parameter to limit the number of queues per CCP. The default value (nqueues=0) is to set up every available queue on each device.
The count of queues starts from the first one found on the device (which varies based on the device ID).
Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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Revision tags: v5.2, v5.2-rc7 |
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| #
600bac00 |
| 27-Jun-2019 |
Hook, Gary <[email protected]> |
crypto: ccp - Switch to SPDX license identifiers
Add an SPDX identifier and remove any specific statements.
Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <herbert@gondor.
crypto: ccp - Switch to SPDX license identifiers
Add an SPDX identifier and remove any specific statements.
Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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| #
52393d61 |
| 27-Jun-2019 |
Hook, Gary <[email protected]> |
crypto: ccp - Validate the the error value used to index error messages
The error code read from the queue status register is only 6 bits wide, but we need to verify its value is within range before
crypto: ccp - Validate the the error value used to index error messages
The error code read from the queue status register is only 6 bits wide, but we need to verify its value is within range before indexing the error messages.
Fixes: 81422badb3907 ("crypto: ccp - Make syslog errors human-readable") Cc: <[email protected]> Reported-by: Cfir Cohen <[email protected]> Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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Revision tags: v5.2-rc6, v5.2-rc5, v5.2-rc4 |
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| #
d2912cb1 |
| 04-Jun-2019 |
Thomas Gleixner <[email protected]> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Based on 2 normalized pattern(s):
this program is free software you can redistribute it and or modify it under the terms of th
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Based on 2 normalized pattern(s):
this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation
this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation #
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4122 file(s).
Signed-off-by: Thomas Gleixner <[email protected]> Reviewed-by: Enrico Weigelt <[email protected]> Reviewed-by: Kate Stewart <[email protected]> Reviewed-by: Allison Randal <[email protected]> Cc: [email protected] Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v5.2-rc3, v5.2-rc2, v5.2-rc1, v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5, v5.1-rc4, v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6, v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20, v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1, v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6, v4.19-rc5, v4.19-rc4, v4.19-rc3, v4.19-rc2, v4.19-rc1, v4.18, v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4, v4.18-rc3, v4.18-rc2, v4.18-rc1, v4.17, v4.17-rc7, v4.17-rc6, v4.17-rc5, v4.17-rc4, v4.17-rc3, v4.17-rc2, v4.17-rc1, v4.16, v4.16-rc7, v4.16-rc6, v4.16-rc5, v4.16-rc4, v4.16-rc3, v4.16-rc2, v4.16-rc1, v4.15, v4.15-rc9, v4.15-rc8, v4.15-rc7, v4.15-rc6, v4.15-rc5, v4.15-rc4, v4.15-rc3, v4.15-rc2, v4.15-rc1, v4.14, v4.14-rc8, v4.14-rc7, v4.14-rc6, v4.14-rc5, v4.14-rc4, v4.14-rc3, v4.14-rc2, v4.14-rc1, v4.13, v4.13-rc7, v4.13-rc6, v4.13-rc5, v4.13-rc4, v4.13-rc3 |
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| #
e652399e |
| 25-Jul-2017 |
Gary R Hook <[email protected]> |
crypto: ccp - Fix XTS-AES-128 support on v5 CCPs
Version 5 CCPs have some new requirements for XTS-AES: the type field must be specified, and the key requires 512 bits, with each part occupying 256
crypto: ccp - Fix XTS-AES-128 support on v5 CCPs
Version 5 CCPs have some new requirements for XTS-AES: the type field must be specified, and the key requires 512 bits, with each part occupying 256 bits and padded with zeroes.
cc: <[email protected]> # 4.9.x+
Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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Revision tags: v4.13-rc2 |
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| #
e28c190d |
| 17-Jul-2017 |
Gary R Hook <[email protected]> |
csrypto: ccp - Expand RSA support for a v5 ccp
A version 5 CCP can handle an RSA modulus up to 16k bits.
Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]
csrypto: ccp - Expand RSA support for a v5 ccp
A version 5 CCP can handle an RSA modulus up to 16k bits.
Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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| #
68cc652f |
| 17-Jul-2017 |
Gary R Hook <[email protected]> |
crypto: ccp - Update copyright dates for 2017.
Some updates this year have not had copyright dates changed in modified files. Correct this for 2017.
Signed-off-by: Gary R Hook <[email protected]> S
crypto: ccp - Update copyright dates for 2017.
Some updates this year have not had copyright dates changed in modified files. Correct this for 2017.
Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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Revision tags: v4.13-rc1 |
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| #
d0ebbc0c |
| 06-Jul-2017 |
Brijesh Singh <[email protected]> |
crypto: ccp - rename ccp driver initialize files as sp device
CCP device initializes is now integerated into higher level SP device, to avoid the confusion lets rename the ccp driver initialization
crypto: ccp - rename ccp driver initialize files as sp device
CCP device initializes is now integerated into higher level SP device, to avoid the confusion lets rename the ccp driver initialization files (ccp-platform.c->sp-platform.c, ccp-pci.c->sp-pci.c). The patch does not make any functional changes other than renaming file and structures
Signed-off-by: Brijesh Singh <[email protected]> Acked-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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| #
f4d18d65 |
| 06-Jul-2017 |
Brijesh Singh <[email protected]> |
crypto: ccp - Abstract interrupt registeration
The CCP and PSP devices part of AMD Secure Procesor may share the same interrupt. Hence we expand the SP device to register a common interrupt handler
crypto: ccp - Abstract interrupt registeration
The CCP and PSP devices part of AMD Secure Procesor may share the same interrupt. Hence we expand the SP device to register a common interrupt handler and provide functions to CCP and PSP devices to register their interrupt callback which will be invoked upon interrupt.
Signed-off-by: Brijesh Singh <[email protected]> Acked-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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| #
720419f0 |
| 06-Jul-2017 |
Brijesh Singh <[email protected]> |
crypto: ccp - Introduce the AMD Secure Processor device
The CCP device is part of the AMD Secure Processor. In order to expand the usage of the AMD Secure Processor, create a framework that allows f
crypto: ccp - Introduce the AMD Secure Processor device
The CCP device is part of the AMD Secure Processor. In order to expand the usage of the AMD Secure Processor, create a framework that allows functional components of the AMD Secure Processor to be initialized and handled appropriately.
Signed-off-by: Brijesh Singh <[email protected]> Acked-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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| #
970e8303 |
| 06-Jul-2017 |
Brijesh Singh <[email protected]> |
crypto: ccp - Use devres interface to allocate PCI/iomap and cleanup
Update pci and platform files to use devres interface to allocate the PCI and iomap resources. Also add helper functions to conso
crypto: ccp - Use devres interface to allocate PCI/iomap and cleanup
Update pci and platform files to use devres interface to allocate the PCI and iomap resources. Also add helper functions to consolicate module init, exit and power mangagement code duplication.
Signed-off-by: Brijesh Singh <[email protected]> Acked-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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Revision tags: v4.12, v4.12-rc7, v4.12-rc6, v4.12-rc5, v4.12-rc4, v4.12-rc3, v4.12-rc2, v4.12-rc1 |
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| #
3cdbe346 |
| 02-May-2017 |
Gary R Hook <[email protected]> |
crypto: ccp - Add debugfs entries for CCP information
Expose some data about the configuration and operation of the CCP through debugfs entries: device name, capabilities, configuration, statistics.
crypto: ccp - Add debugfs entries for CCP information
Expose some data about the configuration and operation of the CCP through debugfs entries: device name, capabilities, configuration, statistics.
Allow the user to reset the counters to zero by writing (any value) to the 'stats' file. This can be done per queue or per device.
Changes from V1: - Correct polarity of test when destroying devices at module unload
Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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Revision tags: v4.11, v4.11-rc8 |
|
| #
7b537b24 |
| 21-Apr-2017 |
Gary R Hook <[email protected]> |
crypto: ccp - Change ISR handler method for a v3 CCP
The CCP has the ability to perform several operations simultaneously, but only one interrupt. When implemented as a PCI device and using MSI-X/M
crypto: ccp - Change ISR handler method for a v3 CCP
The CCP has the ability to perform several operations simultaneously, but only one interrupt. When implemented as a PCI device and using MSI-X/MSI interrupts, use a tasklet model to service interrupts. By disabling and enabling interrupts from the CCP, coupled with the queuing that tasklets provide, we can ensure that all events (occurring on the device) are recognized and serviced.
This change fixes a problem wherein 2 or more busy queues can cause notification bits to change state while a (CCP) interrupt is being serviced, but after the queue state has been evaluated. This results in the event being 'lost' and the queue hanging, waiting to be serviced. Since the status bits are never fully de-asserted, the CCP never generates another interrupt (all bits zero -> one or more bits one), and no further CCP operations will be executed.
Cc: <[email protected]> # 4.9.x+
Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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| #
56467cb1 |
| 20-Apr-2017 |
Gary R Hook <[email protected]> |
crypto: ccp - Use only the relevant interrupt bits
Each CCP queue can product interrupts for 4 conditions: operation complete, queue empty, error, and queue stopped. This driver only works with comp
crypto: ccp - Use only the relevant interrupt bits
Each CCP queue can product interrupts for 4 conditions: operation complete, queue empty, error, and queue stopped. This driver only works with completion and error events.
Cc: <[email protected]> # 4.9.x+
Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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Revision tags: v4.11-rc7, v4.11-rc6, v4.11-rc5 |
|
| #
2d158391 |
| 28-Mar-2017 |
Gary R Hook <[email protected]> |
crypto: ccp - Rearrange structure members to minimize size
The AES GCM function (in ccp-ops) requires a fair amount of stack space, which elicits a complaint when KASAN is enabled. Rearranging and p
crypto: ccp - Rearrange structure members to minimize size
The AES GCM function (in ccp-ops) requires a fair amount of stack space, which elicits a complaint when KASAN is enabled. Rearranging and packing a few structures eliminates the warning.
Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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Revision tags: v4.11-rc4, v4.11-rc3 |
|
| #
990672d4 |
| 15-Mar-2017 |
Gary R Hook <[email protected]> |
crypto: ccp - Enable 3DES function on v5 CCPs
Wire up support for Triple DES in ECB mode.
Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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| #
efc989fc |
| 23-Mar-2017 |
Gary R Hook <[email protected]> |
crypto: ccp - Make some CCP DMA channels private
The CCP registers its queues as channels capable of handling general DMA operations. The NTB driver will use DMA if directed, but as public channels
crypto: ccp - Make some CCP DMA channels private
The CCP registers its queues as channels capable of handling general DMA operations. The NTB driver will use DMA if directed, but as public channels can be reserved for use in asynchronous operations some channels should be held back as private. Since the public/private determination is handled at a device level, reserve the "other" (secondary) CCP channels as private.
Add a module parameter that allows for override, to be applied to all channels on all devices.
CC: <[email protected]> # 4.10.x- Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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Revision tags: v4.11-rc2, v4.11-rc1, v4.10, v4.10-rc8 |
|
| #
f7cc02b3 |
| 08-Feb-2017 |
Gary R Hook <[email protected]> |
crypto: ccp - Set the AES size field for all modes
Ensure that the size field is correctly populated for all AES modes.
Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <her
crypto: ccp - Set the AES size field for all modes
Ensure that the size field is correctly populated for all AES modes.
Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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Revision tags: v4.10-rc7, v4.10-rc6 |
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| #
e5da5c56 |
| 27-Jan-2017 |
Gary R Hook <[email protected]> |
crypto: ccp - Fix double add when creating new DMA command
Eliminate a double-add by creating a new list to manage command descriptors when created; move the descriptor to the pending list when the
crypto: ccp - Fix double add when creating new DMA command
Eliminate a double-add by creating a new list to manage command descriptors when created; move the descriptor to the pending list when the command is submitted.
Cc: <[email protected]> Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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Revision tags: v4.10-rc5, v4.10-rc4, v4.10-rc3, v4.10-rc2, v4.10-rc1, v4.9, v4.9-rc8, v4.9-rc7, v4.9-rc6, v4.9-rc5, v4.9-rc4, v4.9-rc3, v4.9-rc2 |
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| #
ec9b70df |
| 18-Oct-2016 |
Gary R Hook <[email protected]> |
crypto: ccp - remove unneeded code
Clean up patch for an unneeded structure member.
Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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