History log of /linux-6.15/drivers/clocksource/timer-mediatek.c (Results 1 – 10 of 10)
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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2
# 49d576ea 09-Mar-2023 AngeloGioacchino Del Regno <[email protected]>

clocksource/drivers/timer-mediatek: Split out CPUXGPT timers

On MediaTek platforms, CPUXGPT is the source for the AArch64 System
Timer, read through CNTVCT_EL0.

The handling for starting this timer

clocksource/drivers/timer-mediatek: Split out CPUXGPT timers

On MediaTek platforms, CPUXGPT is the source for the AArch64 System
Timer, read through CNTVCT_EL0.

The handling for starting this timer ASAP was introduced in commit
327e93cf9a59 ("clocksource/drivers/timer-mediatek: Implement CPUXGPT timers")
which description also contains an important full explanation of the
reasons why this driver is necessary and cannot be a module.

In preparation for an eventual conversion of timer-mediatek to a
platform_driver that would be possibly built as a module, split out
the CPUXGPT timers driver to a new timer-mediatek-cpux.c driver.

This commit brings no functional changes.

Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
Reviewed-by: Walter Chang <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
Link: https://lore.kernel.org/r/[email protected]

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Revision tags: v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3
# 327e93cf 13-Jun-2022 AngeloGioacchino Del Regno <[email protected]>

clocksource/drivers/timer-mediatek: Implement CPUXGPT timers

Some MediaTek platforms with a buggy TrustZone ATF firmware will not
initialize the AArch64 System Timer correctly: in these cases, the
S

clocksource/drivers/timer-mediatek: Implement CPUXGPT timers

Some MediaTek platforms with a buggy TrustZone ATF firmware will not
initialize the AArch64 System Timer correctly: in these cases, the
System Timer address is correctly programmed, as well as the CNTFRQ_EL0
register (reading 13MHz, as it should be), but the assigned hardware
timers are never started before (or after) booting Linux.

In this condition, any call to function get_cycles() will be returning
zero, as CNTVCT_EL0 will always read zero.

One common critical symptom of that is trying to use the udelay()
function (calling __delay()), which executes the following loop:

start = get_cycles();
while ((get_cycles() - start) < cycles)
cpu_relax();

which, when CNTVCT_EL0 always reads zero, translates to:

while((0 - 0) < 0) ==> while(0 < 0)

... generating an infinite loop, even though zero is never less
than zero, but always equal to it (this has to be researched,
but it's out of the scope of this commit).

To fix this issue on the affected MediaTek platforms, the solution
is to simply start the timers that are designed to be System Timer(s).
These timers, downstream, are called "CPUXGPT" and there is one
timer per CPU core; luckily, it is not necessary to set a start bit
on each CPUX General Purpose Timer, but it's conveniently enough to:
- Set the clock divider (input = 26MHz, divider = 2, output = 13MHz);
- Set the ENABLE bit on a global register (starts all CPUX timers).

The only small hurdle with this setup is that it's all done through
the MCUSYS wrapper, where it is needed, for each read or write, to
select a register address (by writing it to an index register) and
then to perform any R/W on a "CON" register.

For example, writing "0x1" to the CPUXGPT register offset 0x4:
- Write 0x4 to mcusys INDEX register
- Write 0x1 to mcusys CON register

Reading from CPUXGPT register offset 0x4:
- Write 0x4 to mcusys INDEX register
- Read mcusys CON register.

Finally, starting this timer makes platforms affected by this issue
to work correctly.

Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Daniel Lezcano <[email protected]>

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Revision tags: v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7
# ce957065 09-Apr-2021 Fengquan Chen <[email protected]>

clocksource/drivers/mediatek: Optimize systimer irq clear flow on shutdown

mtk_syst_clkevt_shutdown is called after irq disabled in suspend flow,
clear any pending systimer irq when shutdown to avoi

clocksource/drivers/mediatek: Optimize systimer irq clear flow on shutdown

mtk_syst_clkevt_shutdown is called after irq disabled in suspend flow,
clear any pending systimer irq when shutdown to avoid suspend aborted
due to timer irq pending

Also as for systimer in mediatek socs, there must be firstly enable
timer before clear systimer irq

Fixes: e3af677607d9("clocksource/drivers/timer-mediatek: Add support for system timer")
Signed-off-by: Fengquan Chen <[email protected]>
Tested-by: Hsin-Yi Wang <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
Link: https://lore.kernel.org/r/[email protected]

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# 75ac5cc2 12-May-2021 Evan Benn <[email protected]>

clocksource/drivers/mediatek: Ack and disable interrupts on suspend

Interrupts are disabled during suspend before this driver disables its
timers. ARM trusted firmware will abort suspend if the time

clocksource/drivers/mediatek: Ack and disable interrupts on suspend

Interrupts are disabled during suspend before this driver disables its
timers. ARM trusted firmware will abort suspend if the timer irq is
pending, so ack and disable the timer interrupt during suspend.

Signed-off-by: Evan Benn <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
Link: https://lore.kernel.org/r/20210512122528.v4.1.I1d9917047de06715da16e1620759f703fcfdcbcb@changeid

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Revision tags: v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1
# 41d49e79 19-Sep-2019 Fabien Parent <[email protected]>

clocksource/drivers/mediatek: Fix error handling

When timer_of_init fails, it cleans up after itself by undoing
everything it did during the initialization function.

mtk_syst_init and mtk_gpt_init

clocksource/drivers/mediatek: Fix error handling

When timer_of_init fails, it cleans up after itself by undoing
everything it did during the initialization function.

mtk_syst_init and mtk_gpt_init both call timer_of_cleanup if
timer_of_init fails. timer_of_cleanup try to release the resource
taken. Since these resources have already been cleaned up by
timer_of_init, we end up getting a few warnings printed:

[ 0.001935] WARNING: CPU: 0 PID: 0 at __clk_put+0xe8/0x128
[ 0.002650] Modules linked in:
[ 0.003058] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.19.67+ #1
[ 0.003852] Hardware name: MediaTek MT8183 (DT)
[ 0.004446] pstate: 20400085 (nzCv daIf +PAN -UAO)
[ 0.005073] pc : __clk_put+0xe8/0x128
[ 0.005555] lr : clk_put+0xc/0x14
[ 0.005988] sp : ffffff80090b3ea0
[ 0.006422] x29: ffffff80090b3ea0 x28: 0000000040e20018
[ 0.007121] x27: ffffffc07bfff780 x26: 0000000000000001
[ 0.007819] x25: ffffff80090bda80 x24: ffffff8008ec5828
[ 0.008517] x23: ffffff80090bd000 x22: ffffff8008d8b2e8
[ 0.009216] x21: 0000000000000001 x20: fffffffffffffdfb
[ 0.009914] x19: ffffff8009166180 x18: 00000000002bffa8
[ 0.010612] x17: ffffffc012996980 x16: 0000000000000000
[ 0.011311] x15: ffffffbf004a6800 x14: 3536343038393334
[ 0.012009] x13: 2079726576652073 x12: 7eb9c62c5c38f100
[ 0.012707] x11: ffffff80090b3ba0 x10: ffffff80090b3ba0
[ 0.013405] x9 : 0000000000000004 x8 : 0000000000000040
[ 0.014103] x7 : ffffffc079400270 x6 : 0000000000000000
[ 0.014801] x5 : ffffffc079400248 x4 : 0000000000000000
[ 0.015499] x3 : 0000000000000000 x2 : 0000000000000000
[ 0.016197] x1 : ffffff80091661c0 x0 : fffffffffffffdfb
[ 0.016896] Call trace:
[ 0.017218] __clk_put+0xe8/0x128
[ 0.017654] clk_put+0xc/0x14
[ 0.018048] timer_of_cleanup+0x60/0x7c
[ 0.018551] mtk_syst_init+0x8c/0x9c
[ 0.019020] timer_probe+0x6c/0xe0
[ 0.019469] time_init+0x14/0x44
[ 0.019893] start_kernel+0x2d0/0x46c
[ 0.020378] ---[ end trace 8c1efabea1267649 ]---
[ 0.020982] ------------[ cut here ]------------
[ 0.021586] Trying to vfree() nonexistent vm area ((____ptrval____))
[ 0.022427] WARNING: CPU: 0 PID: 0 at __vunmap+0xd0/0xd8
[ 0.023119] Modules linked in:
[ 0.023524] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 4.19.67+ #1
[ 0.024498] Hardware name: MediaTek MT8183 (DT)
[ 0.025091] pstate: 60400085 (nZCv daIf +PAN -UAO)
[ 0.025718] pc : __vunmap+0xd0/0xd8
[ 0.026176] lr : __vunmap+0xd0/0xd8
[ 0.026632] sp : ffffff80090b3e90
[ 0.027066] x29: ffffff80090b3e90 x28: 0000000040e20018
[ 0.027764] x27: ffffffc07bfff780 x26: 0000000000000001
[ 0.028462] x25: ffffff80090bda80 x24: ffffff8008ec5828
[ 0.029160] x23: ffffff80090bd000 x22: ffffff8008d8b2e8
[ 0.029858] x21: 0000000000000000 x20: 0000000000000000
[ 0.030556] x19: ffffff800800d000 x18: 00000000002bffa8
[ 0.031254] x17: 0000000000000000 x16: 0000000000000000
[ 0.031952] x15: ffffffbf004a6800 x14: 3536343038393334
[ 0.032651] x13: 2079726576652073 x12: 7eb9c62c5c38f100
[ 0.033349] x11: ffffff80090b3b40 x10: ffffff80090b3b40
[ 0.034047] x9 : 0000000000000005 x8 : 5f5f6c6176727470
[ 0.034745] x7 : 5f5f5f5f28282061 x6 : ffffff80091c86ef
[ 0.035443] x5 : ffffff800852b690 x4 : 0000000000000000
[ 0.036141] x3 : 0000000000000002 x2 : 0000000000000002
[ 0.036839] x1 : 7eb9c62c5c38f100 x0 : 7eb9c62c5c38f100
[ 0.037536] Call trace:
[ 0.037859] __vunmap+0xd0/0xd8
[ 0.038271] vunmap+0x24/0x30
[ 0.038664] __iounmap+0x2c/0x34
[ 0.039088] timer_of_cleanup+0x70/0x7c
[ 0.039591] mtk_syst_init+0x8c/0x9c
[ 0.040060] timer_probe+0x6c/0xe0
[ 0.040507] time_init+0x14/0x44
[ 0.040932] start_kernel+0x2d0/0x46c

This commit remove the calls to timer_of_cleanup when timer_of_init
fails since it is unnecessary and actually cause warnings to be printed.

Fixes: a0858f937960 ("mediatek: Convert the driver to timer-of")
Signed-off-by: Fabien Parent <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
Link: https://lore.kernel.org/linux-arm-kernel/[email protected]/

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Revision tags: v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3
# c942fddf 27-May-2019 Thomas Gleixner <[email protected]>

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

Based on 3 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of th

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

Based on 3 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version this program is distributed in the
hope that it will be useful but without any warranty without even
the implied warranty of merchantability or fitness for a particular
purpose see the gnu general public license for more details

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version [author] [kishon] [vijay] [abraham]
[i] [kishon]@[ti] [com] this program is distributed in the hope that
it will be useful but without any warranty without even the implied
warranty of merchantability or fitness for a particular purpose see
the gnu general public license for more details

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version [author] [graeme] [gregory]
[gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i]
[kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema]
[hk] [hemahk]@[ti] [com] this program is distributed in the hope
that it will be useful but without any warranty without even the
implied warranty of merchantability or fitness for a particular
purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 1105 file(s).

Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Allison Randal <[email protected]>
Reviewed-by: Richard Fontana <[email protected]>
Reviewed-by: Kate Stewart <[email protected]>
Cc: [email protected]
Link: https://lkml.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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Revision tags: v5.2-rc2, v5.2-rc1, v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5, v5.1-rc4, v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6, v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20, v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1, v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6, v4.19-rc5, v4.19-rc4, v4.19-rc3, v4.19-rc2, v4.19-rc1, v4.18, v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4
# e3af6776 05-Jul-2018 Stanley Chu <[email protected]>

clocksource/drivers/timer-mediatek: Add support for system timer

This patch adds a new "System Timer" on the Mediatek SoCs.

The System Timer is introduced as an always-on timer being
clockevent dev

clocksource/drivers/timer-mediatek: Add support for system timer

This patch adds a new "System Timer" on the Mediatek SoCs.

The System Timer is introduced as an always-on timer being
clockevent device for tick-broadcasting.

For clock, it is driven by 13 MHz system clock.
The implementation uses the system clock with no clock
source divider.

For interrupt, the clock event timer can be used by all cores.

Signed-off-by: Stanley Chu <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>

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# a0858f93 05-Jul-2018 Stanley Chu <[email protected]>

clocksource/drivers/timer-mediatek: Convert the driver to timer-of

Convert the driver to use the timer_of helpers.
This allows to remove custom proprietary structure,
factors out and simplifies the

clocksource/drivers/timer-mediatek: Convert the driver to timer-of

Convert the driver to use the timer_of helpers.
This allows to remove custom proprietary structure,
factors out and simplifies the code.

Signed-off-by: Stanley Chu <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>

show more ...


# 56d52d3f 05-Jul-2018 Stanley Chu <[email protected]>

clocksource/drivers/timer-mediatek: Use specific prefix for GPT

Use specific prefix to specify the name of supported
timer hardware: "General Purpose Timer (GPT)".

Signed-off-by: Stanley Chu <stanl

clocksource/drivers/timer-mediatek: Use specific prefix for GPT

Use specific prefix to specify the name of supported
timer hardware: "General Purpose Timer (GPT)".

Signed-off-by: Stanley Chu <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>

show more ...


# 7ec58e52 05-Jul-2018 Stanley Chu <[email protected]>

clocksource/drivers/timer-mediatek: Rename mtk_timer to timer-mediatek

Rename mtk_timer to timer-mediatek to apply new naming convention
in clocksource folder.

Signed-off-by: Stanley Chu <stanley.c

clocksource/drivers/timer-mediatek: Rename mtk_timer to timer-mediatek

Rename mtk_timer to timer-mediatek to apply new naming convention
in clocksource folder.

Signed-off-by: Stanley Chu <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>

show more ...