clocksource: mips-gic-timer: Enable counter when CPUs start

In multi-cluster MIPS I6500 systems there is a GIC in each cluster,
each with its own counter. When a cluster powers up the counter will
b

clocksource: mips-gic-timer: Enable counter when CPUs start

In multi-cluster MIPS I6500 systems there is a GIC in each cluster,
each with its own counter. When a cluster powers up the counter will
be stopped, with the COUNTSTOP bit set in the GIC_CONFIG register.

In single cluster systems, it has been fine to clear COUNTSTOP once
in gic_clocksource_of_init() to start the counter. In multi-cluster
systems, this will only have started the counter in the boot cluster,
and any CPUs in other clusters will find their counter stopped which
will break the GIC clock_event_device.

Resolve this by having CPUs clear the COUNTSTOP bit when they come
online, using the existing gic_starting_cpu() CPU hotplug callback. This
will allow CPUs in secondary clusters to ensure that the cluster's GIC
counter is running as expected.

Signed-off-by: Paul Burton <[email protected]>
Signed-off-by: Chao-ying Fu <[email protected]>
Signed-off-by: Dragan Mladjenovic <[email protected]>
Signed-off-by: Aleksandar Rikalo <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Tested-by: Serge Semin <[email protected]>
Tested-by: Gregory CLEMENT <[email protected]>
Acked-by: Daniel Lezcano <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>

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clocksource/drivers/mips-gic-timer: Always use cluster 0 counter as clocksource

In a multi-cluster MIPS system, there are multiple GICs - one in each
cluster - each of which has its independent coun

clocksource/drivers/mips-gic-timer: Always use cluster 0 counter as clocksource

In a multi-cluster MIPS system, there are multiple GICs - one in each
cluster - each of which has its independent counter. The counters in
each GIC are not synchronized in any way, so they can drift relative
to one another through the lifetime of the system. This is problematic
for a clock source which ought to be global.

Avoid problems by always accessing cluster 0's counter, using
cross-cluster register access. This adds overhead so it is applied only
on multi-cluster systems.

Signed-off-by: Paul Burton <[email protected]>
Signed-off-by: Chao-ying Fu <[email protected]>
Signed-off-by: Dragan Mladjenovic <[email protected]>
Signed-off-by: Aleksandar Rikalo <[email protected]>
Tested-by: Serge Semin <[email protected]>
Acked-by: Thomas Bogendoerfer <[email protected]>
Tested-by: Gregory CLEMENT <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Daniel Lezcano <[email protected]>

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clocksource/drivers/mips-gic-timer: Correct sched_clock width

Counter width of GIC is configurable and can be read from a
register.

Use width value from the register for sched_clock.

Reviewed-by:

clocksource/drivers/mips-gic-timer: Correct sched_clock width

Counter width of GIC is configurable and can be read from a
register.

Use width value from the register for sched_clock.

Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Jiaxun Yang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Daniel Lezcano <[email protected]>

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clocksource/drivers/mips-gic-timer: Refine rating computation

It is a good clocksource which usually go as fast as CPU core
and have a low access latency, so raise the base of rating
from Good to de

clocksource/drivers/mips-gic-timer: Refine rating computation

It is a good clocksource which usually go as fast as CPU core
and have a low access latency, so raise the base of rating
from Good to desired when we know that it has a stable frequency.

Increase frequency addend dividend to 10000000 (10MHz) to
reasonably accommodate multi GHz level clock, also cap rating
within current level.

Signed-off-by: Jiaxun Yang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Daniel Lezcano <[email protected]>

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clocksource/drivers/mips-gic-timer: Convert to SPDX identifier

The licensing text references explicitely the COPYING file in the kernel
base directory, which is clearly GPL version 2 only.

Signed-o

clocksource/drivers/mips-gic-timer: Convert to SPDX identifier

The licensing text references explicitely the COPYING file in the kernel
base directory, which is clearly GPL version 2 only.

Signed-off-by: Thomas Gleixner <[email protected]>
Cc: Thomas Bogendoerfer <[email protected]>
Cc: Serge Semin <[email protected]>
Cc: Daniel Lezcano <[email protected]>
Cc: [email protected]
Acked-by: Serge Semin <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Daniel Lezcano <[email protected]>

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clocksource: mips-gic-timer: Mark GIC timer as unstable if ref clock changes

Currently clocksource framework doesn't support the clocks with variable
frequency. Since MIPS GIC timer ticks rate might

clocksource: mips-gic-timer: Mark GIC timer as unstable if ref clock changes

Currently clocksource framework doesn't support the clocks with variable
frequency. Since MIPS GIC timer ticks rate might be unstable on some
platforms, we must make sure that it justifies the clocksource
requirements. MIPS GIC timer is incremented with the CPU cluster reference
clocks rate. So in case if CPU frequency changes, the MIPS GIC tick rate
changes synchronously. Due to this the clocksource subsystem can't rely on
the timer to measure system clocks anymore. This commit marks the MIPS GIC
based clocksource as unstable if reference clock (normally it's a CPU
reference clocks) rate changes. The clocksource will execute a watchdog
thread, which lowers the MIPS GIC timer rating to zero and fallbacks to a
new stable one.

Note we don't need to set the CLOCK_SOURCE_MUST_VERIFY flag to the MIPS
GIC clocksource since normally the timer is stable. The only reason why
it gets unstable is due to the ref clock rate change, which event we
detect here in the driver by means of the clocks event notifier.

Signed-off-by: Serge Semin <[email protected]>
Cc: Alexey Malahov <[email protected]>
Cc: Thomas Bogendoerfer <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: Alessandro Zummo <[email protected]>
Cc: Alexandre Belloni <[email protected]>
Cc: Arnd Bergmann <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Daniel Lezcano <[email protected]>
Link: https://lore.kernel.org/r/[email protected]

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clocksource: mips-gic-timer: Register as sched_clock

The MIPS GIC timer is well suited for use as sched_clock, so register it
as such.

Whilst the existing gic_read_count() function matches the prot

clocksource: mips-gic-timer: Register as sched_clock

The MIPS GIC timer is well suited for use as sched_clock, so register it
as such.

Whilst the existing gic_read_count() function matches the prototype
needed by sched_clock_register() already, we split it into 2 functions
in order to remove the need to evaluate the mips_cm_is64 condition
within each call since sched_clock should be as fast as possible.

Note the sched clock framework needs the clock source being stable in
order to rely on it. So we register the MIPS GIC timer as schedule clocks
only if it's, if either the system doesn't have CPU-frequency enabled or
the CPU frequency is changed by means of the CPC core clock divider
available on the platforms with CM3 or newer.

Signed-off-by: Paul Burton <[email protected]>
Co-developed-by: Serge Semin <[email protected]>
[[email protected]: Register sched-clock if CM3 or !CPU-freq]
Signed-off-by: Serge Semin <[email protected]>
Cc: Alexey Malahov <[email protected]>
Cc: Thomas Bogendoerfer <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: Alessandro Zummo <[email protected]>
Cc: Alexandre Belloni <[email protected]>
Cc: Arnd Bergmann <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Daniel Lezcano <[email protected]>
Link: https://lore.kernel.org/r/[email protected]

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mips: vdso: Use generic VDSO clock mode storage

Switch to the generic VDSO clock mode storage.

Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Vincenzo Frascino <vincenzo.frascino@

mips: vdso: Use generic VDSO clock mode storage

Switch to the generic VDSO clock mode storage.

Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Vincenzo Frascino <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]

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clocksource/drivers/mips-gic-timer: Make gic_compare_irqaction static

Fix sparse warning:

drivers/clocksource/mips-gic-timer.c:70:18: warning:
symbol 'gic_compare_irqaction' was not declared. Shou

clocksource/drivers/mips-gic-timer: Make gic_compare_irqaction static

Fix sparse warning:

drivers/clocksource/mips-gic-timer.c:70:18: warning:
symbol 'gic_compare_irqaction' was not declared. Should it be static?

Signed-off-by: YueHaibing <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Cc: <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]

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clocksource/drivers/mips-gic-timer: Add pr_fmt and reword pr_* messages

Several messages from the MIPS GIC driver include the text "GIC", "GIC
timer", etc, but the format is not standard. Add a pr_f

clocksource/drivers/mips-gic-timer: Add pr_fmt and reword pr_* messages

Several messages from the MIPS GIC driver include the text "GIC", "GIC
timer", etc, but the format is not standard. Add a pr_fmt of
"mips-gic-timer: " and reword the messages now that they will be
prefixed with the driver name.

Signed-off-by: Matt Redfearn <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>

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clocksource/drivers/mips-gic-timer: Use correct shift count to extract data

__gic_clocksource_init() extracts the GIC_CONFIG_COUNTBITS field from
read_gic_config() by right shifting the register val

clocksource/drivers/mips-gic-timer: Use correct shift count to extract data

__gic_clocksource_init() extracts the GIC_CONFIG_COUNTBITS field from
read_gic_config() by right shifting the register value. The shift count is
determined by the most significant bit (__fls) of the bitmask which is
wrong as it shifts out the complete bitfield.

Use the least significant bit (__ffs) instead to shift the bitfield down to
bit 0.

Fixes: e07127a077c7 ("clocksource: mips-gic-timer: Use new GIC accessor functions")
Signed-off-by: Felix Fietkau <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Cc: [email protected]
Cc: [email protected]
Link: https://lkml.kernel.org/r/[email protected]

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treewide/trivial: Remove ';;$' typo noise

On lkml suggestions were made to split up such trivial typo fixes into per subsystem
patches:

--- a/arch/x86/boot/compressed/eboot.c
+++ b/arch/x86/boo

treewide/trivial: Remove ';;$' typo noise

On lkml suggestions were made to split up such trivial typo fixes into per subsystem
patches:

--- a/arch/x86/boot/compressed/eboot.c
+++ b/arch/x86/boot/compressed/eboot.c
@@ -439,7 +439,7 @@ setup_uga32(void **uga_handle, unsigned long size, u32 *width, u32 *height)
struct efi_uga_draw_protocol *uga = NULL, *first_uga;
efi_guid_t uga_proto = EFI_UGA_PROTOCOL_GUID;
unsigned long nr_ugas;
- u32 *handles = (u32 *)uga_handle;;
+ u32 *handles = (u32 *)uga_handle;
efi_status_t status = EFI_INVALID_PARAMETER;
int i;

This patch is the result of the following script:

$ sed -i 's/;;$/;/g' $(git grep -E ';;$' | grep "\.[ch]:" | grep -vwE 'for|ia64' | cut -d: -f1 | sort | uniq)

... followed by manual review to make sure it's all good.

Splitting this up is just crazy talk, let's get over with this and just do it.

Reported-by: Pavel Machek <[email protected]>
Cc: Linus Torvalds <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: [email protected]
Signed-off-by: Ingo Molnar <[email protected]>

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clocksource/drivers/mips-gic-timer: Add fastpath for local timer updates

Always accessing the compare register via the CM redirect region is
(relatively) slow. If the timer being updated is the curr

clocksource/drivers/mips-gic-timer: Add fastpath for local timer updates

Always accessing the compare register via the CM redirect region is
(relatively) slow. If the timer being updated is the current CPUs
then this can be shortcutted by writing to the CM VP local region.

Signed-off-by: Matt Redfearn <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>

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clocksource/drivers/mips-gic-timer: Remove pointless irq_save,restore

The function gic_next_event is always called with interrupts disabled, so
the local_irq_save / local_irq_restore are pointless -

clocksource/drivers/mips-gic-timer: Remove pointless irq_save,restore

The function gic_next_event is always called with interrupts disabled, so
the local_irq_save / local_irq_restore are pointless - remove them.

[Daniel Lezcano: Fixed warning by removing unused variable 'flags']

Signed-off-by: Matt Redfearn <[email protected]>
Suggested-by: Daniel Lezcano <[email protected]>
Reported-by: Thomas Gleixner <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>

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clocksource: mips-gic-timer: Use new GIC accessor functions

Switch from calling functions exported by the GIC interrupt controller
to using new accessors provided by asm/mips-gic.h. This will allow

clocksource: mips-gic-timer: Use new GIC accessor functions

Switch from calling functions exported by the GIC interrupt controller
to using new accessors provided by asm/mips-gic.h. This will allow the
counter-handling functionality to be removed from the interrupt
controller driver, where it doesn't really belong, and also allow for
inlining of the accesses to the GIC.

Signed-off-by: Paul Burton <[email protected]>
Acked-by: Thomas Gleixner <[email protected]>
Cc: Daniel Lezcano <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Marc Zyngier <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/17021/
Signed-off-by: Ralf Baechle <[email protected]>

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clocksource/drivers/mips-gic-timer: Fix an error code in 'gic_clocksource_of_init()'

'clk' is a valid pointer at this point. So calling PTR_ERR on it is
pointess.

Return the error code from 'clk_pr

clocksource/drivers/mips-gic-timer: Fix an error code in 'gic_clocksource_of_init()'

'clk' is a valid pointer at this point. So calling PTR_ERR on it is
pointess.

Return the error code from 'clk_prepare_enable()' if it fails instead.

Signed-off-by: Christophe JAILLET <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>

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clocksource/drivers: Rename CLOCKSOURCE_OF_DECLARE to TIMER_OF_DECLARE

The CLOCKSOURCE_OF_DECLARE macro is used widely for the timers to declare the
clocksource at early stage. However, this macro i

clocksource/drivers: Rename CLOCKSOURCE_OF_DECLARE to TIMER_OF_DECLARE

The CLOCKSOURCE_OF_DECLARE macro is used widely for the timers to declare the
clocksource at early stage. However, this macro is also used to initialize
the clockevent if any, or the clockevent only.

It was originally suggested to declare another macro to initialize a
clockevent, so in order to separate the two entities even they belong to the
same IP. This was not accepted because of the impact on the DT where splitting
a clocksource/clockevent definition does not make sense as it is a Linux
concept not a hardware description.

On the other side, the clocksource has not interrupt declared while the
clockevent has, so it is easy from the driver to know if the description is
for a clockevent or a clocksource, IOW it could be implemented at the driver
level.

So instead of dealing with a named clocksource macro, let's use a more generic
one: TIMER_OF_DECLARE.

The patch has not functional changes.

Signed-off-by: Daniel Lezcano <[email protected]>
Acked-by: Heiko Stuebner <[email protected]>
Acked-by: Neil Armstrong <[email protected]>
Acked-by: Arnd Bergmann <[email protected]>
Acked-by: Matthias Brugger <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>

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Clocksource/mips-gic: Remove redundant non devicetree init

Malta was the only platform probing this driver from platform code
without using device tree. With that code removed, gic_clocksource_init

Clocksource/mips-gic: Remove redundant non devicetree init

Malta was the only platform probing this driver from platform code
without using device tree. With that code removed, gic_clocksource_init
is redundant so remove it.

Signed-off-by: Matt Redfearn <[email protected]>
Cc: [email protected]
Cc: Jason Cooper <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: Daniel Lezcano <[email protected]>
Cc: Ralf Baechle <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Thomas Gleixner <[email protected]>

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clocksource: Add missing line break to error messages

Printing with pr_* functions requires adding line break manually.

Signed-off-by: Rafał Miłecki <[email protected]>
Acked-by: Thierry Reding <tre

clocksource: Add missing line break to error messages

Printing with pr_* functions requires adding line break manually.

Signed-off-by: Rafał Miłecki <[email protected]>
Acked-by: Thierry Reding <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>

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clocksource: Use a plain u64 instead of cycle_t

There is no point in having an extra type for extra confusion. u64 is
unambiguous.

Conversion was done with the following coccinelle script:

@rem@
@

clocksource: Use a plain u64 instead of cycle_t

There is no point in having an extra type for extra confusion. u64 is
unambiguous.

Conversion was done with the following coccinelle script:

@rem@
@@
-typedef u64 cycle_t;

@fix@
typedef cycle_t;
@@
-cycle_t
+u64

Signed-off-by: Thomas Gleixner <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: John Stultz <[email protected]>

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cpu/hotplug: Cleanup state names

When the state names got added a script was used to add the extra argument
to the calls. The script basically converted the state constant to a
string, but the clean

cpu/hotplug: Cleanup state names

When the state names got added a script was used to add the extra argument
to the calls. The script basically converted the state constant to a
string, but the cleanup to convert these strings into meaningful ones did
not happen.

Replace all the useless strings with 'subsys/xxx/yyy:state' strings which
are used in all the other places already.

Signed-off-by: Thomas Gleixner <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Sebastian Siewior <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Thomas Gleixner <[email protected]>

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clocksource/mips-gic-timer: Stop checking cpu_has_counter

The cpu_has_counter macro indicates whether the current CPU has a
working coprocessor 0 count & compare registers, and has no bearing on
the

clocksource/mips-gic-timer: Stop checking cpu_has_counter

The cpu_has_counter macro indicates whether the current CPU has a
working coprocessor 0 count & compare registers, and has no bearing on
the GIC. Stop checking it.

Signed-off-by: Paul Burton <[email protected]>
Cc: [email protected]
Cc: Daniel Lezcano <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Thomas Gleixner <[email protected]>

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clocksource/mips-gic-timer: Print an error if IRQ setup fails

We've checked for errors from setup_irq_percpu since commit f95ac8558b88
("CLOCKSOURCE: mips-gic: Add missing error returns checks") but

clocksource/mips-gic-timer: Print an error if IRQ setup fails

We've checked for errors from setup_irq_percpu since commit f95ac8558b88
("CLOCKSOURCE: mips-gic: Add missing error returns checks") but didn't
print an error message in the failure case. This makes it very easy to
overlook the GIC timer clock event driver not being registered, since
we'll generally just use a different clock event driver if that happens.

Print an error if IRQ setup fails in order to make such problems harder
to miss (ie. not completely silent).

Signed-off-by: Paul Burton <[email protected]>
Cc: [email protected]
Cc: Daniel Lezcano <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Thomas Gleixner <[email protected]>

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clocksource/drivers/mips-gic-timer: Make gic_clocksource_of_init() return int

In commit:

d8152bf85d2c0 ("clocksource/drivers/mips-gic-timer: Convert init function to return error")

several retur

clocksource/drivers/mips-gic-timer: Make gic_clocksource_of_init() return int

In commit:

d8152bf85d2c0 ("clocksource/drivers/mips-gic-timer: Convert init function to return error")

several return values were added to a void function resulting in the following warnings:

clocksource/mips-gic-timer.c: In function 'gic_clocksource_of_init':
clocksource/mips-gic-timer.c:175:3: warning: 'return' with a value, in function returning void [enabled by default]
clocksource/mips-gic-timer.c:183:4: warning: 'return' with a value, in function returning void [enabled by default]
clocksource/mips-gic-timer.c:190:3: warning: 'return' with a value, in function returning void [enabled by default]
clocksource/mips-gic-timer.c:195:3: warning: 'return' with a value, in function returning void [enabled by default]
clocksource/mips-gic-timer.c:200:3: warning: 'return' with a value, in function returning void [enabled by default]
clocksource/mips-gic-timer.c:211:2: warning: 'return' with a value, in function returning void [enabled by default]
clocksource/mips-gic-timer.c: At top level:
clocksource/mips-gic-timer.c:213:1: warning: comparison of distinct pointer types lacks a cast [enabled by default]
clocksource/mips-gic-timer.c: In function 'gic_clocksource_of_init':
clocksource/mips-gic-timer.c:183:18: warning: ignoring return value of 'PTR_ERR', declared with attribute warn_unused_result [-Wunused-result]

Given that the addition of the return values was intentional, it seems
that the conversion of the containing function from void to int was
simply overlooked.

Signed-off-by: Paul Gortmaker <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
Cc: Linus Torvalds <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: [email protected]
Fixes: d8152bf85d2c ("clocksource/drivers/mips-gic-timer: Convert init function to return error")
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Ingo Molnar <[email protected]>

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clocksource/mips-gic: Convert to hotplug state machine

Install the callbacks via the state machine and let the core invoke
the callbacks on the already online CPUs.

Signed-off-by: Richard Cochran <

clocksource/mips-gic: Convert to hotplug state machine

Install the callbacks via the state machine and let the core invoke
the callbacks on the already online CPUs.

Signed-off-by: Richard Cochran <[email protected]>
Signed-off-by: Anna-Maria Gleixner <[email protected]>
Reviewed-by: Sebastian Andrzej Siewior <[email protected]>
Cc: Daniel Lezcano <[email protected]>
Cc: Linus Torvalds <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: [email protected]
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Ingo Molnar <[email protected]>

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