| 9d222574 | 20-Jul-2018 |
Masahiro Yamada <[email protected]> |
clk: uniphier: add more USB3 PHY clocks
Add USB3 PHY clocks where missing. Use fixed-factor clocks for those without gating.
For clarification, prefix clock names with 'ss' or 'hs'.
Signed-off-by
clk: uniphier: add more USB3 PHY clocks
Add USB3 PHY clocks where missing. Use fixed-factor clocks for those without gating.
For clarification, prefix clock names with 'ss' or 'hs'.
Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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| 6f1aa4ef | 30-Mar-2018 |
Kunihiko Hayashi <[email protected]> |
clk: uniphier: add additional ethernet clock lines for Pro4
Pro4 SoC has clock lines for Giga-bit feature and ethernet phy, and these are mandatory to activate the ethernet controller. This adds sup
clk: uniphier: add additional ethernet clock lines for Pro4
Pro4 SoC has clock lines for Giga-bit feature and ethernet phy, and these are mandatory to activate the ethernet controller. This adds support for the clock lines.
Signed-off-by: Kunihiko Hayashi <[email protected]> Acked-by: Masahiro Yamada <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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| 54e1f7ee | 30-Mar-2018 |
Kunihiko Hayashi <[email protected]> |
clk: uniphier: add SATA clock control support
Add clock control for SATA controller on UniPhier SoCs. This adds support for PXs2, LD20 and PXs3.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@so
clk: uniphier: add SATA clock control support
Add clock control for SATA controller on UniPhier SoCs. This adds support for PXs2, LD20 and PXs3.
Signed-off-by: Kunihiko Hayashi <[email protected]> Acked-by: Masahiro Yamada <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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| 2e277efb | 30-Mar-2018 |
Kunihiko Hayashi <[email protected]> |
clk: uniphier: add PCIe clock control support
Add clock control for PCIe controller on UniPhier SoCs. This adds support for Pro5, LD20 and PXs3.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@so
clk: uniphier: add PCIe clock control support
Add clock control for PCIe controller on UniPhier SoCs. This adds support for Pro5, LD20 and PXs3.
Signed-off-by: Kunihiko Hayashi <[email protected]> Acked-by: Masahiro Yamada <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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