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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2 |
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dae5448a |
| 13-Jul-2023 |
Xingyu Wu <[email protected]> |
clk: starfive: Add StarFive JH7110 Video-Output clock driver
Add driver for the StarFive JH7110 Video-Output clock controller.
And these clock controllers should power on and enable the clocks from
clk: starfive: Add StarFive JH7110 Video-Output clock driver
Add driver for the StarFive JH7110 Video-Output clock controller.
And these clock controllers should power on and enable the clocks from
SYSCRG first before registering.
Acked-by: Palmer Dabbelt <[email protected]>
Reviewed-by: Emil Renner Berthing <[email protected]>
Reviewed-by: Hal Feng <[email protected]>
Signed-off-by: Xingyu Wu <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
show more ...
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| #
81279f5d |
| 13-Jul-2023 |
Xingyu Wu <[email protected]> |
clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver
Add driver for the StarFive JH7110 Image-Signal-Process clock controller.
And these clock controllers should power on and enable
clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver
Add driver for the StarFive JH7110 Image-Signal-Process clock controller.
And these clock controllers should power on and enable the clocks from
SYSCRG before registering.
Acked-by: Palmer Dabbelt <[email protected]>
Reviewed-by: Emil Renner Berthing <[email protected]>
Reviewed-by: Hal Feng <[email protected]>
Signed-off-by: Xingyu Wu <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
show more ...
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| #
7c53b44b |
| 13-Jul-2023 |
Emil Renner Berthing <[email protected]> |
clk: starfive: Add StarFive JH7110 System-Top-Group clock driver
Add driver for the StarFive JH7110 System-Top-Group clock controller.
Acked-by: Palmer Dabbelt <[email protected]>
Reviewed-by: Ha
clk: starfive: Add StarFive JH7110 System-Top-Group clock driver
Add driver for the StarFive JH7110 System-Top-Group clock controller.
Acked-by: Palmer Dabbelt <[email protected]>
Reviewed-by: Hal Feng <[email protected]>
Co-developed-by: Xingyu Wu <[email protected]>
Signed-off-by: Xingyu Wu <[email protected]>
Signed-off-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
show more ...
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| #
616bc1de |
| 17-Jul-2023 |
Xingyu Wu <[email protected]> |
clk: starfive: Add StarFive JH7110 PLL clock driver
Add driver for the StarFive JH7110 PLL clock controller
and they work by reading and setting syscon registers.
Co-developed-by: Emil Renner Berth
clk: starfive: Add StarFive JH7110 PLL clock driver
Add driver for the StarFive JH7110 PLL clock controller
and they work by reading and setting syscon registers.
Co-developed-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Xingyu Wu <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
show more ...
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Revision tags: v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5 |
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| #
b2ab3c94 |
| 01-Apr-2023 |
Emil Renner Berthing <[email protected]> |
clk: starfive: Add StarFive JH7110 always-on clock driver
Add driver for the StarFive JH7110 always-on clock controller
and register an auxiliary device for always-on reset controller
which is named
clk: starfive: Add StarFive JH7110 always-on clock driver
Add driver for the StarFive JH7110 always-on clock controller
and register an auxiliary device for always-on reset controller
which is named as "rst-aon".
Tested-by: Tommaso Merciai <[email protected]>
Reviewed-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Emil Renner Berthing <[email protected]>
Co-developed-by: Hal Feng <[email protected]>
Signed-off-by: Hal Feng <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
show more ...
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| #
edab7204 |
| 01-Apr-2023 |
Emil Renner Berthing <[email protected]> |
clk: starfive: Add StarFive JH7110 system clock driver
Add driver for the StarFive JH7110 system clock controller and
register an auxiliary device for system reset controller which
is named as "rst-
clk: starfive: Add StarFive JH7110 system clock driver
Add driver for the StarFive JH7110 system clock controller and
register an auxiliary device for system reset controller which
is named as "rst-sys".
Tested-by: Tommaso Merciai <[email protected]>
Reviewed-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Emil Renner Berthing <[email protected]>
Co-developed-by: Hal Feng <[email protected]>
Signed-off-by: Hal Feng <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
show more ...
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| #
00f1cb17 |
| 01-Apr-2023 |
Emil Renner Berthing <[email protected]> |
clk: starfive: Factor out common JH7100 and JH7110 code
The clock control registers on the StarFive JH7100 and JH7110 work
identically, so factor out the code then drivers for the two SoCs
can share
clk: starfive: Factor out common JH7100 and JH7110 code
The clock control registers on the StarFive JH7100 and JH7110 work
identically, so factor out the code then drivers for the two SoCs
can share it without depending on each other. No functional change.
Tested-by: Tommaso Merciai <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Reviewed-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Hal Feng <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
show more ...
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Revision tags: v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2 |
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| #
3028181e |
| 26-Jan-2022 |
Emil Renner Berthing <[email protected]> |
clk: starfive: Add JH7100 audio clock driver
Add a driver for the audio clocks on the Starfive JH7100 RISC-V SoC.
Signed-off-by: Emil Renner Berthing <[email protected]>
Link: https://lore.kernel.org
clk: starfive: Add JH7100 audio clock driver
Add a driver for the audio clocks on the Starfive JH7100 RISC-V SoC.
Signed-off-by: Emil Renner Berthing <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
show more ...
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Revision tags: v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5 |
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| #
4210be66 |
| 01-Jun-2021 |
Geert Uytterhoeven <[email protected]> |
clk: starfive: Add JH7100 clock generator driver
Add a driver for the StarFive JH7100 clock generator.
Reviewed-by: Andy Shevchenko <[email protected]>
Acked-by: Stephen Boyd <sboyd@kernel.
clk: starfive: Add JH7100 clock generator driver
Add a driver for the StarFive JH7100 clock generator.
Reviewed-by: Andy Shevchenko <[email protected]>
Acked-by: Stephen Boyd <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
Co-developed-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Emil Renner Berthing <[email protected]>
show more ...
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