| 00c7ded6 | 10-Jul-2024 |
Nathan Chancellor <[email protected]> |
clk: sophgo: Avoid -Wsometimes-uninitialized in sg2042_clk_pll_set_rate()
Clang warns (or errors with CONFIG_WERROR=y):
drivers/clk/sophgo/clk-sg2042-pll.c:396:6: error: variable 'ret' is used un
clk: sophgo: Avoid -Wsometimes-uninitialized in sg2042_clk_pll_set_rate()
Clang warns (or errors with CONFIG_WERROR=y):
drivers/clk/sophgo/clk-sg2042-pll.c:396:6: error: variable 'ret' is used uninitialized whenever 'if' condition is true [-Werror,-Wsometimes-uninitialized]
396 | if (sg2042_pll_enable(pll, 0)) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/clk/sophgo/clk-sg2042-pll.c:418:9: note: uninitialized use occurs here
418 | return ret;
| ^~~
drivers/clk/sophgo/clk-sg2042-pll.c:396:2: note: remove the 'if' if its condition is always false
396 | if (sg2042_pll_enable(pll, 0)) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
397 | pr_warn("Can't disable pll(%s), status error\n", pll->hw.init->name);
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
398 | goto out;
| ~~~~~~~~~
399 | }
| ~
drivers/clk/sophgo/clk-sg2042-pll.c:393:9: note: initialize the variable 'ret' to silence this warning
393 | int ret;
| ^
| = 0
1 error generated.
sg2042_pll_enable() only ever returns zero, so this situation cannot
happen, but clang does not perform interprocedural analysis, so it
cannot know this to avoid the warning. Make it clearer to the compiler
by making sg2042_pll_enable() void and eliminate the error handling in
sg2042_clk_pll_set_rate(), which clears up the warning, as ret will
always be initialized.
Fixes: 48cf7e01386e ("clk: sophgo: Add SG2042 clock driver")
Signed-off-by: Nathan Chancellor <[email protected]>
Link: https://lore.kernel.org/r/20240710-clk-sg2042-fix-sometimes-uninitialized-pll_set_rate-v1-1-538fa82dd539@kernel.org
Signed-off-by: Stephen Boyd <[email protected]>
show more ...
|
| 1f7a04a0 | 09-Jul-2024 |
Li Qiang <[email protected]> |
clk/sophgo: Using BUG() instead of unreachable() in mmux_get_parent_id()
In general it's a good idea to avoid using bare unreachable() because it
introduces undefined behavior in compiled code. but
clk/sophgo: Using BUG() instead of unreachable() in mmux_get_parent_id()
In general it's a good idea to avoid using bare unreachable() because it
introduces undefined behavior in compiled code. but it caused a compilation warning,
Using BUG() instead of unreachable() to resolve compilation warnings.
Fixes the following warnings:
drivers/clk/sophgo/clk-cv18xx-ip.o: warning: objtool: mmux_round_rate() falls through to next function bypass_div_round_rate()
Fixes: 80fd61ec46124 ("clk: sophgo: Add clock support for CV1800 SoC")
Signed-off-by: Li Qiang <[email protected]>
Link: https://lore.kernel.org/r/c8e66d51f880127549e2a3e623be6787f62b310d.1720506143.git.liqiang01@kylinos.cn
Signed-off-by: Stephen Boyd <[email protected]>
show more ...
|
| 0a7c2fda | 15-Apr-2024 |
Arnd Bergmann <[email protected]> |
clk: sophgo: avoid open-coded 64-bit division
On 32-bit architectures, the 64-bit division leads to a link failure:
arm-linux-gnueabi-ld: drivers/clk/sophgo/clk-cv18xx-pll.o: in function `fpll_calc
clk: sophgo: avoid open-coded 64-bit division
On 32-bit architectures, the 64-bit division leads to a link failure:
arm-linux-gnueabi-ld: drivers/clk/sophgo/clk-cv18xx-pll.o: in function `fpll_calc_rate':
clk-cv18xx-pll.c:(.text.fpll_calc_rate+0x26): undefined reference to `__aeabi_uldivmod'
This one is not called in a fast path, and there is already another div_u64()
variant used in the same function, so convert it to div64_u64_rem().
Fixes: 80fd61ec4612 ("clk: sophgo: Add clock support for CV1800 SoC")
Signed-off-by: Arnd Bergmann <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Reported-by: kernel test robot <[email protected]>
Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/
Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/
Reviewed-by: Inochi Amaoto <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
show more ...
|
| a12069a3 | 11-Apr-2024 |
Inochi Amaoto <[email protected]> |
clk: sophgo: Make synthesizer struct static
Let all synthesizer structs are static to make the compiler happy.
Fixes: 80fd61ec4612 ("clk: sophgo: Add clock support for CV1800 SoC")
Signed-off-by: I
clk: sophgo: Make synthesizer struct static
Let all synthesizer structs are static to make the compiler happy.
Fixes: 80fd61ec4612 ("clk: sophgo: Add clock support for CV1800 SoC")
Signed-off-by: Inochi Amaoto <[email protected]>
Link: https://lore.kernel.org/r/IA1PR20MB49531E437735A71A163694AEBB052@IA1PR20MB4953.namprd20.prod.outlook.com
Reported-by: kernel test robot <[email protected]>
Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/
Signed-off-by: Stephen Boyd <[email protected]>
show more ...
|
| 1cce3e61 | 09-Mar-2024 |
Inochi Amaoto <[email protected]> |
clk: sophgo: Add clock support for SG2000 SoC
Add init code for SG2000 SoC.
Signed-off-by: Inochi Amaoto <[email protected]>
Link: https://github.com/sophgo/sophgo-doc/releases/tag/sg2000-datas
clk: sophgo: Add clock support for SG2000 SoC
Add init code for SG2000 SoC.
Signed-off-by: Inochi Amaoto <[email protected]>
Link: https://github.com/sophgo/sophgo-doc/releases/tag/sg2000-datasheet-v1.0-alpha
Link: https://lore.kernel.org/r/IA1PR20MB49537156E71B64483F15C0F2BB262@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Stephen Boyd <[email protected]>
show more ...
|
| 3b8d2042 | 09-Mar-2024 |
Inochi Amaoto <[email protected]> |
clk: sophgo: Add clock support for CV1810 SoC
Add clock definition and init code for CV1810 SoC.
Signed-off-by: Inochi Amaoto <[email protected]>
Link: https://github.com/milkv-duo/duo-files/bl
clk: sophgo: Add clock support for CV1810 SoC
Add clock definition and init code for CV1810 SoC.
Signed-off-by: Inochi Amaoto <[email protected]>
Link: https://github.com/milkv-duo/duo-files/blob/6f4e9b8ecb459e017cca1a8df248a19ca70837a3/duo/datasheet/CV180X-Clock-v1.xlsx
Link: https://lore.kernel.org/r/IA1PR20MB495357FB5EEA1623DAB08C94BB262@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Stephen Boyd <[email protected]>
show more ...
|