clk: bcm: Add BCM63268 timer clock and reset driver

Add driver for BCM63268 timer clock and reset controller.

Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Link: https://lore.kernel.org

clk: bcm: Add BCM63268 timer clock and reset driver

Add driver for BCM63268 timer clock and reset controller.

Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[[email protected]: Mark reset ops const, fixup includes]
Signed-off-by: Stephen Boyd <[email protected]>

show more ...

clk: bcm: bcmbca: Replace ARCH_BCM_63XX with ARCH_BCMBCA

Prepare for the BCM63138 ARCH_BCM_63XX migration to ARCH_BCMBCA. Make
CLK_BCM_63XX depending and setting default on ARCH_BCMBCA.

Signed-off-

clk: bcm: bcmbca: Replace ARCH_BCM_63XX with ARCH_BCMBCA

Prepare for the BCM63138 ARCH_BCM_63XX migration to ARCH_BCMBCA. Make
CLK_BCM_63XX depending and setting default on ARCH_BCMBCA.

Signed-off-by: William Zhang <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>

show more ...

clk: bcm: dvp: Select the reset framework

The DVP driver depends both on the RESET_SIMPLE driver but also on the
reset framework itself. Let's make sure we have it enabled.

Fixes: 1bc95972715a ("cl

clk: bcm: dvp: Select the reset framework

The DVP driver depends both on the RESET_SIMPLE driver but also on the
reset framework itself. Let's make sure we have it enabled.

Fixes: 1bc95972715a ("clk: bcm: Add BCM2711 DVP driver")
Signed-off-by: Maxime Ripard <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Acked-by: Nicolas Saenz Julienne <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>

show more ...

clk: bcm: Add BCM2711 DVP driver

The HDMI block has a block that controls clocks and reset signals to the
HDMI0 and HDMI1 controllers.

Let's expose that through a clock driver implementing a clock

clk: bcm: Add BCM2711 DVP driver

The HDMI block has a block that controls clocks and reset signals to the
HDMI0 and HDMI1 controllers.

Let's expose that through a clock driver implementing a clock and reset
provider.

Cc: Michael Turquette <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Cc: [email protected]
Reviewed-by: Stephen Boyd <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
Link: https://lore.kernel.org/r/bb60d97fc76b61c2eabef5a02ebd664c0f57ede0.1591867332.git-series.maxime@cerno.tech
Acked-by: Stefan Wahren <[email protected]>
Reviewed-by: Nicolas Saenz Julienne <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>

show more ...

clk: add BCM63XX gated clock controller driver

Add a driver for the gated clock controller found on MIPS based BCM63XX
SoCs.

Signed-off-by: Jonas Gorski <[email protected]>
Reviewed-by: Floria

clk: add BCM63XX gated clock controller driver

Add a driver for the gated clock controller found on MIPS based BCM63XX
SoCs.

Signed-off-by: Jonas Gorski <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
[[email protected]: Remove module.h include and associated things for a
non-modular driver, add static on data tables, drop of_match_ptr()
usage, fix spdx tag to be a C++ style comment]
Signed-off-by: Stephen Boyd <[email protected]>

show more ...

clk: bcm283x: add driver interfacing with Raspberry Pi's firmware

Raspberry Pi's firmware offers an interface though which update it's
clock's frequencies. This is specially useful in order to chang

clk: bcm283x: add driver interfacing with Raspberry Pi's firmware

Raspberry Pi's firmware offers an interface though which update it's
clock's frequencies. This is specially useful in order to change the CPU
clock (pllb_arm) which is 'owned' by the firmware and we're unable to
scale using the register interface provided by clk-bcm2835.

Signed-off-by: Nicolas Saenz Julienne <[email protected]>
Acked-by: Eric Anholt <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>

show more ...

clk: bcm: Allow CLK_BCM2835 for ARCH_BRCMSTB

ARCH_BRCMSTB needs to use the BCM2835 clock driver for chips like
BCM7211 which adopted that clock controller, make that possible and the
driver default

clk: bcm: Allow CLK_BCM2835 for ARCH_BRCMSTB

ARCH_BRCMSTB needs to use the BCM2835 clock driver for chips like
BCM7211 which adopted that clock controller, make that possible and the
driver default to be enabled for ARCH_BRCMSTB.

Signed-off-by: Florian Fainelli <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>

show more ...

clk: bcm: Make BCM2835 clock drivers selectable

Make the BCM2835 clock driver selectable by other
architectures/platforms. ARCH_BRCMSTB will be selecting that driver in
the next commit since new chi

clk: bcm: Make BCM2835 clock drivers selectable

Make the BCM2835 clock driver selectable by other
architectures/platforms. ARCH_BRCMSTB will be selecting that driver in
the next commit since new chips like 7211 use the same CPRMAN clock
controller that this driver supports.

Signed-off-by: Florian Fainelli <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>

show more ...

treewide: Add SPDX license identifier - Makefile/Kconfig

Add SPDX license identifiers to all Make/Kconfig files which:

- Have no license information of any form

These files fall under the project

treewide: Add SPDX license identifier - Makefile/Kconfig

Add SPDX license identifiers to all Make/Kconfig files which:

- Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

GPL-2.0-only

Signed-off-by: Thomas Gleixner <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

show more ...

clk: bcm: Add Broadcom Hurricane 2 clock support

Add support for the Broadcom Hurricane 2 SoC clock controller. We can
re-use the existing iProc clock library since the SoC's architecture is
largely

clk: bcm: Add Broadcom Hurricane 2 clock support

Add support for the Broadcom Hurricane 2 SoC clock controller. We can
re-use the existing iProc clock library since the SoC's architecture is
largely the same as its predecessors. For now, we just initialize the
iProc ARM PLL.

Acked-by: Jon Mason <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
Acked-by: Stephen Boyd <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>

show more ...

clk: bcm: Add clocks for Stingray SOC

This patch adds support for Stingray clocks in iproc
ccf. The Stingray SOC has various plls based on iproc
pll architecture.

Signed-off-by: Sandeep Tripathy <s

clk: bcm: Add clocks for Stingray SOC

This patch adds support for Stingray clocks in iproc
ccf. The Stingray SOC has various plls based on iproc
pll architecture.

Signed-off-by: Sandeep Tripathy <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Ray Jui <[email protected]>
Reviewed-by: Scott Branden <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>

show more ...

clk: bcm: Make COMMON_CLK_IPROC into a library

The broadcom clk driver Kconfig file selects and depends on the
COMMON_CLK_IPROC config for different SoC specific drivers. Let's
simplify this by alwa

clk: bcm: Make COMMON_CLK_IPROC into a library

The broadcom clk driver Kconfig file selects and depends on the
COMMON_CLK_IPROC config for different SoC specific drivers. Let's
simplify this by always selecting the COMMON_CLK_IPROC config,
turning it into a set of library code. We still want to retain
the SoC specific options, so we leave those in place. Since we're
here we also drop COMMON_CLK dependency because that's implicitly
handled by including this file in drivers/clk/Kconfig in the
right place and also make CLK_BCM_KONA default to y on the
architecture it exists for instead of plain default y.

Cc: Florian Fainelli <[email protected]>
Cc: Ray Jui <[email protected]>
Cc: Jon Mason <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>

show more ...

clk: bcm: Fix unmet Kconfig dependencies for CLK_BCM_63XX

With commit f4e871509959 ("clk: iproc: Make clocks visible options"),
COMMON_CLK_IPROC gained a dependency on ARCH_BCM_IPROC, yet CLK_BCM_63

clk: bcm: Fix unmet Kconfig dependencies for CLK_BCM_63XX

With commit f4e871509959 ("clk: iproc: Make clocks visible options"),
COMMON_CLK_IPROC gained a dependency on ARCH_BCM_IPROC, yet CLK_BCM_63XX
also selects that option, this causes the following Kconfig warning:

warning: (CLK_BCM_63XX) selects COMMON_CLK_IPROC which has unmet direct
dependencies ((ARCH_BCM_IPROC || COMPILE_TEST) && COMMON_CLK)

Fix this by adding proper depends for COMMON_CLK_IPROC

Fixes: f4e871509959 ("clk: iproc: Make clocks visible options")
Signed-off-by: Florian Fainelli <[email protected]>
Reviewed-by: Ray Jui <[email protected]>
[[email protected]: Drop default part as it's redundant]
Signed-off-by: Stephen Boyd <[email protected]>

show more ...

clk: iproc: Make clocks visible options

Make the clocks visible options that can be selected by anyone. This
avoids the problems of:
1) Select is a reverse dependency and is hard for people to und

clk: iproc: Make clocks visible options

Make the clocks visible options that can be selected by anyone. This
avoids the problems of:
1) Select is a reverse dependency and is hard for people to understand
and can sometimes be a pain to track down
2) Build coverage goes down because configs are hidden
3) Code bloat

Patch suggested by Stephen Boyd

Signed-off-by: Jon Mason <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>

show more ...

clk: bcm: Add BCM63138 clock support

BCM63138 has a simple clocking domain which is primarily the ARMPLL
clocking complex, from which the ARM (CPU), APB and AXI clocks would be
derived from.

Since

clk: bcm: Add BCM63138 clock support

BCM63138 has a simple clocking domain which is primarily the ARMPLL
clocking complex, from which the ARM (CPU), APB and AXI clocks would be
derived from.

Since the ARMPLL controller is entirely compatible with the iProc ARM
PLL, we just initialize it without additional parameters.

Signed-off-by: Florian Fainelli <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>

show more ...

clk: bcm: Add BCM63138 clock support

BCM63138 has a simple clocking domain which is primarily the ARMPLL
clocking complex, from which the ARM (CPU), APB and AXI clocks would be
derived from.

Since

clk: bcm: Add BCM63138 clock support

BCM63138 has a simple clocking domain which is primarily the ARMPLL
clocking complex, from which the ARM (CPU), APB and AXI clocks would be
derived from.

Since the ARMPLL controller is entirely compatible with the iProc ARM
PLL, we just initialize it without additional parameters.

Signed-off-by: Florian Fainelli <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>

show more ...

ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabled

When CONFIG_CYGNUS is set but CONFIG_COMMON_CLK_IPROC is disabled, the
following link failures are caused:

drivers/built-in.o

ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabled

When CONFIG_CYGNUS is set but CONFIG_COMMON_CLK_IPROC is disabled, the
following link failures are caused:

drivers/built-in.o: In function `cygnus_armpll_init':
:(.init.text+0x1d290): undefined reference to `iproc_armpll_setup'
drivers/built-in.o: In function `cygnus_genpll_clk_init':
:(.init.text+0x1d2c4): undefined reference to `iproc_pll_clk_setup'
drivers/built-in.o: In function `cygnus_lcpll0_clk_init':
:(.init.text+0x1d304): undefined reference to `iproc_pll_clk_setup'
drivers/built-in.o: In function `cygnus_mipipll_clk_init':
:(.init.text+0x1d344): undefined reference to `iproc_pll_clk_setup'
drivers/built-in.o: In function `cygnus_asiu_init':
:(.init.text+0x1d370): undefined reference to `iproc_asiu_setup'

It is fixed it by always selecting COMMON_CLK_IPROC from
ARCH_BCM_IPROC, and making COMMON_CLK_IPROC a silent option (thus
preventing it from being erroneously disabled by a user).

Signed-off-by: Arnd Bergmann <[email protected]>
Signed-off-by: Jon Mason <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>

show more ...

clk: Allow drivers to build if COMPILE_TEST is enabled

These drivers only have runtime but no build time dependencies so can be
built for testing purposes if the Kconfig COMPILE_TEST option is enabl

clk: Allow drivers to build if COMPILE_TEST is enabled

These drivers only have runtime but no build time dependencies so can be
built for testing purposes if the Kconfig COMPILE_TEST option is enabled.

This is useful to have more build coverage and make sure that drivers are
not affected by changes that could cause build regressions.

Signed-off-by: Javier Martinez Canillas <[email protected]>
Acked-by: Scott Branden <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>

show more ...

clk: iproc: add initial common clock support

This adds basic and generic support for various iProc PLLs and clocks
including the ARMPLL, GENPLL, LCPLL, MIPIPLL, and ASIU clocks.

SoCs under the iPro

clk: iproc: add initial common clock support

This adds basic and generic support for various iProc PLLs and clocks
including the ARMPLL, GENPLL, LCPLL, MIPIPLL, and ASIU clocks.

SoCs under the iProc architecture can define their specific register
offsets and clock parameters for their PLL and clock controllers. These
parameters can be passed as arugments into the generic iProc PLL and
clock setup functions

Derived from code originally provided by Jonathan Richardson
<[email protected]>

Signed-off-by: Ray Jui <[email protected]>
Reviewed-by: Scott Branden <[email protected]>
Signed-off-by: Michael Turquette <[email protected]>

show more ...

clk: bcm21664: use common clock framework

Define the set of CCUs and provided clocks sufficient to satisfy the
needs of all the existing clock references for BCM21664. Replace
the "fake" fixed-rate

clk: bcm21664: use common clock framework

Define the set of CCUs and provided clocks sufficient to satisfy the
needs of all the existing clock references for BCM21664. Replace
the "fake" fixed-rate clocks used previously with "real" ones.

Note that only the minimal set of these clocks and CCUs is defined
here. More clock definitions will need to be added as required by
the addition of additional drivers.

Signed-off-by: Alex Elder <[email protected]>
Signed-off-by: Mike Turquette <[email protected]>

show more ...

clk: bcm281xx: add initial clock framework support

Add code for device tree support of clocks in the BCM281xx family of
SoCs. Machines in this family use peripheral clocks implemented by
"Kona" clo

clk: bcm281xx: add initial clock framework support

Add code for device tree support of clocks in the BCM281xx family of
SoCs. Machines in this family use peripheral clocks implemented by
"Kona" clock control units (CCUs). (Other Broadcom SoC families use
Kona style CCUs as well, but support for them is not yet upstream.)

A BCM281xx SoC has multiple CCUs, each of which manages a set of
clocks on the SoC. A Kona peripheral clock is composite clock that
may include a gate, a parent clock multiplexor, and zero, one
or two dividers. There is a variety of gate types, and many gates
implement hardware-managed gating (often called "auto-gating").
Most dividers divide their input clock signal by an integer value
(one or more). There are also "fractional" dividers which allow
division by non-integer values. To accomodate such dividers,
clock rates and dividers are generally maintained by the code in
"scaled" form, which allows integer and fractional dividers to
be handled in a uniform way.

If present, the gate for a Kona peripheral clock must be enabled
when a change is made to its multiplexor or one of its dividers.
Additionally, dividers and multiplexors have trigger registers which
must be used whenever the divider value or selected parent clock is
changed. The same trigger is often used for a divider and
multiplexor, and a BCM281xx peripheral clock occasionally has two
triggers.

The gate, dividers, and parent clock selector are treated in this
code as "components" of a peripheral clock. Their functionality is
implemented directly--e.g. the common clock framework gate
implementation is not used for a Kona peripheral clock gate. (This
has being considered though, and the intention is to evolve this
code to leverage common code as much as possible.)

The source code is divided into three general portions:

drivers/clk/bcm/clk-kona.h
drivers/clk/bcm/clk-kona.c
These implement the basic Kona clock functionality,
including the clk_ops methods and various routines to
manipulate registers and interpret their values. This
includes some functions used to set clocks to a desired
initial state (though this feature is only partially
implemented here).

drivers/clk/bcm/clk-kona-setup.c
This contains generic run-time initialization code for
data structures representing Kona CCUs and clocks. This
encapsulates the clock structure initialization that can't
be done statically. Note that there is a great deal of
validity-checking code here, making explicit certain
assumptions in the code. This is mostly useful for adding
new clock definitions and could possibly be disabled for
production use.

drivers/clk/bcm/clk-bcm281xx.c
This file defines the specific CCUs used by BCM281XX family
SoCs, as well as the specific clocks implemented by each.
It declares a device tree clock match entry for each CCU
defined.

include/dt-bindings/clock/bcm281xx.h
This file defines the selector (index) values used to
identify a particular clock provided by a CCU. It consists
entirely of C preprocessor constants, to be used by both the
C source and device tree source files.

Signed-off-by: Alex Elder <[email protected]>
Reviewed-by: Tim Kryger <[email protected]>
Reviewed-by: Matt Porter <[email protected]>
Acked-by: Mike Turquette <[email protected]>
Signed-off-by: Matt Porter <[email protected]>

show more ...