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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1 |
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| #
03ce34cf |
| 01-Feb-2020 |
Max Filippov <[email protected]> |
xtensa: add XIP-aware MTD support
Add Kconfig symbol, asm/mtd-xip.h header and define related macros: xip_cpu_idle, xip_irqpending, xip_currtime and xip_elapsed_since. Append .xiptext to the vectors
xtensa: add XIP-aware MTD support
Add Kconfig symbol, asm/mtd-xip.h header and define related macros: xip_cpu_idle, xip_irqpending, xip_currtime and xip_elapsed_since. Append .xiptext to the vectors when separate vectors are configured because otherwise they are appended to the data and data may not even be executable in XIP configuration.
Signed-off-by: Max Filippov <[email protected]>
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| #
2b5a0e42 |
| 12-Jan-2023 |
Peter Zijlstra <[email protected]> |
objtool/idle: Validate __cpuidle code as noinstr
Idle code is very like entry code in that RCU isn't available. As such, add a little validation.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infra
objtool/idle: Validate __cpuidle code as noinstr
Idle code is very like entry code in that RCU isn't available. As such, add a little validation.
Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Signed-off-by: Ingo Molnar <[email protected]> Tested-by: Tony Lindgren <[email protected]> Tested-by: Ulf Hansson <[email protected]> Acked-by: Geert Uytterhoeven <[email protected]> Acked-by: Rafael J. Wysocki <[email protected]> Acked-by: Frederic Weisbecker <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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| #
89b184f9 |
| 28-Dec-2021 |
Max Filippov <[email protected]> |
xtensa: make secondary reset vector support conditional
Whether xtensa cores start from primary or secondary reset vector is configurable and may be chosen by board designer or controlled at runtime
xtensa: make secondary reset vector support conditional
Whether xtensa cores start from primary or secondary reset vector is configurable and may be chosen by board designer or controlled at runtime. When secondary reset vector is unused its location in memory may not be writable. Make secondary reset vector support conditional and don't build and load secondary reset vector code when it is disabled.
Signed-off-by: Max Filippov <[email protected]>
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| #
da0a4e5c |
| 26-Jul-2021 |
Max Filippov <[email protected]> |
xtensa: only build windowed register support code when needed
There's no need in window overflow/underflow/alloca exception handlers or window spill code when neither kernel nor userspace support wi
xtensa: only build windowed register support code when needed
There's no need in window overflow/underflow/alloca exception handlers or window spill code when neither kernel nor userspace support windowed registers. Don't build or link it.
Signed-off-by: Max Filippov <[email protected]>
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| #
5e4417f9 |
| 01-Feb-2020 |
Max Filippov <[email protected]> |
xtensa: reorganize vectors placement
Allow vectors to be either merged into the kernel .text or put at a fixed virtual address independently of XIP option. Drop option that puts vectors at a fixed o
xtensa: reorganize vectors placement
Allow vectors to be either merged into the kernel .text or put at a fixed virtual address independently of XIP option. Drop option that puts vectors at a fixed offset from the kernel text. Add choice to Kconfig. Vectors at fixed virtual address may be useful for XIP-aware MTD support and for noMMU configurations with available IRAM. Configurations without VECBASE register must put their vectors at specific locations regardless of the selected option. All other configurations should happily use merged vectors.
Signed-off-by: Max Filippov <[email protected]>
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| #
4f17664a |
| 01-Feb-2020 |
Max Filippov <[email protected]> |
xtensa: separate SMP and XIP support
There's no real dependency between SMP and XIP, allow them to be selected together. Always define 2- and 4-argument SECTION_VECTOR macros, always use 4-argument
xtensa: separate SMP and XIP support
There's no real dependency between SMP and XIP, allow them to be selected together. Always define 2- and 4-argument SECTION_VECTOR macros, always use 4-argument macro for the secondary reset vector and always define relocation entry for it.
Signed-off-by: Max Filippov <[email protected]>
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| #
50722f0b |
| 01-Feb-2020 |
Max Filippov <[email protected]> |
xtensa: move fast exception handlers close to vectors
On XIP kernels it makes sense to have exception vectors and fast exception handlers together (in a fast memory). In addition, with MTD XIP suppo
xtensa: move fast exception handlers close to vectors
On XIP kernels it makes sense to have exception vectors and fast exception handlers together (in a fast memory). In addition, with MTD XIP support both vectors and fast exception handlers must be outside of the FLASH.
Add section .exception.text and move fast exception handlers to it. Put it together with vectors when vectors are outside of the .text.
Signed-off-by: Max Filippov <[email protected]>
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Revision tags: v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4 |
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| #
f5fae679 |
| 14-Oct-2019 |
Max Filippov <[email protected]> |
xtensa: merge .fixup with .text
Section .fixup contains pieces of code, merge it with the rest of the .text section.
Signed-off-by: Max Filippov <[email protected]>
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Revision tags: v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3, v5.2-rc2, v5.2-rc1, v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5, v5.1-rc4, v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6, v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20, v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1, v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6, v4.19-rc5, v4.19-rc4, v4.19-rc3, v4.19-rc2, v4.19-rc1, v4.18, v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4, v4.18-rc3, v4.18-rc2, v4.18-rc1, v4.17, v4.17-rc7, v4.17-rc6, v4.17-rc5, v4.17-rc4, v4.17-rc3, v4.17-rc2, v4.17-rc1, v4.16, v4.16-rc7, v4.16-rc6, v4.16-rc5, v4.16-rc4, v4.16-rc3, v4.16-rc2, v4.16-rc1, v4.15, v4.15-rc9, v4.15-rc8, v4.15-rc7, v4.15-rc6, v4.15-rc5, v4.15-rc4, v4.15-rc3, v4.15-rc2, v4.15-rc1, v4.14, v4.14-rc8, v4.14-rc7, v4.14-rc6, v4.14-rc5, v4.14-rc4, v4.14-rc3, v4.14-rc2, v4.14-rc1, v4.13, v4.13-rc7, v4.13-rc6, v4.13-rc5, v4.13-rc4, v4.13-rc3, v4.13-rc2, v4.13-rc1, v4.12, v4.12-rc7, v4.12-rc6, v4.12-rc5, v4.12-rc4, v4.12-rc3, v4.12-rc2, v4.12-rc1, v4.11, v4.11-rc8, v4.11-rc7, v4.11-rc6, v4.11-rc5, v4.11-rc4, v4.11-rc3, v4.11-rc2, v4.11-rc1, v4.10, v4.10-rc8, v4.10-rc7, v4.10-rc6, v4.10-rc5, v4.10-rc4, v4.10-rc3 |
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| #
7af710d9 |
| 04-Jan-2017 |
Max Filippov <[email protected]> |
xtensa: add XIP kernel support
XIP (eXecute In Place) kernel image is the image that can be run directly from ROM, using RAM only for writable data.
XIP xtensa kernel differs from regular xtensa ke
xtensa: add XIP kernel support
XIP (eXecute In Place) kernel image is the image that can be run directly from ROM, using RAM only for writable data.
XIP xtensa kernel differs from regular xtensa kernel in the following ways: - it has exception/IRQ vectors merged into text section. No vectors relocation takes place at kernel startup. - .data/.bss location must be specified in the kernel configuration, its content is copied there in the _startup function. - .init.text is merged with the rest of text and is executed from ROM. - when MMU is used the virtual address where the kernel will be mapped must be specified in the kernel configuration. It may be in the KSEG or in the KIO, __pa macro is adjusted to be able to handle both.
Signed-off-by: Max Filippov <[email protected]>
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| #
94174c9b |
| 29-Oct-2019 |
Kees Cook <[email protected]> |
xtensa: Move EXCEPTION_TABLE to RO_DATA segment
Since the EXCEPTION_TABLE is read-only, collapse it into RO_DATA.
Signed-off-by: Kees Cook <[email protected]> Signed-off-by: Borislav Petkov <bp
xtensa: Move EXCEPTION_TABLE to RO_DATA segment
Since the EXCEPTION_TABLE is read-only, collapse it into RO_DATA.
Signed-off-by: Kees Cook <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Acked-by: Max Filippov <[email protected]> Cc: Andy Lutomirski <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Chris Zankel <[email protected]> Cc: Dave Hansen <[email protected]> Cc: Geert Uytterhoeven <[email protected]> Cc: Heiko Carstens <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: Michael Ellerman <[email protected]> Cc: Michal Simek <[email protected]> Cc: Rick Edgecombe <[email protected]> Cc: Segher Boessenkool <[email protected]> Cc: Will Deacon <[email protected]> Cc: x86-ml <[email protected]> Cc: Yoshinori Sato <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
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| #
c9174047 |
| 29-Oct-2019 |
Kees Cook <[email protected]> |
vmlinux.lds.h: Replace RW_DATA_SECTION with RW_DATA
Rename RW_DATA_SECTION to RW_DATA. (Calling this a "section" is a lie, since it's multiple sections and section flags cannot be applied to the mac
vmlinux.lds.h: Replace RW_DATA_SECTION with RW_DATA
Rename RW_DATA_SECTION to RW_DATA. (Calling this a "section" is a lie, since it's multiple sections and section flags cannot be applied to the macro.)
Signed-off-by: Kees Cook <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Acked-by: Heiko Carstens <[email protected]> # s390 Acked-by: Geert Uytterhoeven <[email protected]> # m68k Cc: Andy Lutomirski <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Dave Hansen <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: Michael Ellerman <[email protected]> Cc: Michal Simek <[email protected]> Cc: Rick Edgecombe <[email protected]> Cc: Segher Boessenkool <[email protected]> Cc: Will Deacon <[email protected]> Cc: x86-ml <[email protected]> Cc: Yoshinori Sato <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
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| #
c8231825 |
| 29-Oct-2019 |
Kees Cook <[email protected]> |
vmlinux.lds.h: Replace RODATA with RO_DATA
There's no reason to keep the RODATA macro: replace the callers with the expected RO_DATA macro.
Signed-off-by: Kees Cook <[email protected]> Signed-o
vmlinux.lds.h: Replace RODATA with RO_DATA
There's no reason to keep the RODATA macro: replace the callers with the expected RO_DATA macro.
Signed-off-by: Kees Cook <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Cc: Andy Lutomirski <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Dave Hansen <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: Michael Ellerman <[email protected]> Cc: Michal Simek <[email protected]> Cc: Rick Edgecombe <[email protected]> Cc: Segher Boessenkool <[email protected]> Cc: Will Deacon <[email protected]> Cc: x86-ml <[email protected]> Cc: Yoshinori Sato <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
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| #
eaf93707 |
| 29-Oct-2019 |
Kees Cook <[email protected]> |
vmlinux.lds.h: Move NOTES into RO_DATA
The .notes section should be non-executable read-only data. As such, move it to the RO_DATA macro instead of being per-architecture defined.
Signed-off-by: Ke
vmlinux.lds.h: Move NOTES into RO_DATA
The .notes section should be non-executable read-only data. As such, move it to the RO_DATA macro instead of being per-architecture defined.
Signed-off-by: Kees Cook <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Acked-by: Heiko Carstens <[email protected]> # s390 Cc: Andy Lutomirski <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Dave Hansen <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: Michael Ellerman <[email protected]> Cc: Michal Simek <[email protected]> Cc: Rick Edgecombe <[email protected]> Cc: Segher Boessenkool <[email protected]> Cc: Will Deacon <[email protected]> Cc: x86-ml <[email protected]> Cc: Yoshinori Sato <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
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| #
8f8d5745 |
| 02-Jan-2019 |
Max Filippov <[email protected]> |
xtensa: replace variant/core.h with asm/core.h
Introduce the header arch/xtensa/include/asm/core.h that provides definitions for XCHAL macros missing in older xtensa releases. Use this header instea
xtensa: replace variant/core.h with asm/core.h
Introduce the header arch/xtensa/include/asm/core.h that provides definitions for XCHAL macros missing in older xtensa releases. Use this header instead of variant/core.h
Signed-off-by: Max Filippov <[email protected]>
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960b82c3 |
| 30-Oct-2018 |
Max Filippov <[email protected]> |
xtensa: clean up xtensa-specific property sections
xtensa-specific property sections may be section-specific. They should be collected in the order of appearance. .gnu.linkonce.prop.* input sections
xtensa: clean up xtensa-specific property sections
xtensa-specific property sections may be section-specific. They should be collected in the order of appearance. .gnu.linkonce.prop.* input sections should be collected into the .xt.prop output section.
Signed-off-by: Max Filippov <[email protected]>
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| #
1026ded6 |
| 30-Oct-2018 |
Max Filippov <[email protected]> |
xtensa: use DWARF_DEBUG in the vmlinux.lds.S
Xtensa doesn't have anything custom in its debug sections list. Use macro DWARF_DEBUG instead of opencoding it.
Signed-off-by: Max Filippov <jcmvbkbc@gm
xtensa: use DWARF_DEBUG in the vmlinux.lds.S
Xtensa doesn't have anything custom in its debug sections list. Use macro DWARF_DEBUG instead of opencoding it.
Signed-off-by: Max Filippov <[email protected]>
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| #
4119ba21 |
| 30-Oct-2018 |
Max Filippov <[email protected]> |
xtensa: add NOTES section to the linker script
This section collects all source .note.* sections together in the vmlinux image. Without it .note.Linux section may be placed at address 0, while the r
xtensa: add NOTES section to the linker script
This section collects all source .note.* sections together in the vmlinux image. Without it .note.Linux section may be placed at address 0, while the rest of the kernel is at its normal address, resulting in a huge vmlinux.bin image that may not be linked into the xtensa Image.elf.
Cc: [email protected] Signed-off-by: Max Filippov <[email protected]>
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| #
3ac946d1 |
| 11-Oct-2018 |
Kees Cook <[email protected]> |
vmlinux.lds.h: Move LSM_TABLE into INIT_DATA
Since the struct lsm_info table is not an initcall, we can just move it into INIT_DATA like all the other tables.
Signed-off-by: Kees Cook <keescook@chr
vmlinux.lds.h: Move LSM_TABLE into INIT_DATA
Since the struct lsm_info table is not an initcall, we can just move it into INIT_DATA like all the other tables.
Signed-off-by: Kees Cook <[email protected]> Reviewed-by: Casey Schaufler <[email protected]> Reviewed-by: John Johansen <[email protected]> Reviewed-by: James Morris <[email protected]> Signed-off-by: James Morris <[email protected]>
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| #
fc862ee9 |
| 14-Aug-2018 |
Max Filippov <[email protected]> |
xtensa: drop unneeded platform/hardware.h headers
platform/hardware.h no longer supply any information for processor.h, vectors.h, setup.c or vmlinux.lds.S, don't include it. This header is now empt
xtensa: drop unneeded platform/hardware.h headers
platform/hardware.h no longer supply any information for processor.h, vectors.h, setup.c or vmlinux.lds.S, don't include it. This header is now empty in the platforms/iss, so remove it altogether.
Signed-off-by: Max Filippov <[email protected]>
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| #
f8f02ca7 |
| 04-Dec-2017 |
Max Filippov <[email protected]> |
xtensa: build kernel with text-section-literals
vmlinux.lds.S doesn't do anything special with literals, so instead of keeping them separate put them into the corresponding text sections. Drop expli
xtensa: build kernel with text-section-literals
vmlinux.lds.S doesn't do anything special with literals, so instead of keeping them separate put them into the corresponding text sections. Drop explicit .literal sections from the vmlinux.lds.S, use standard section macros. Mark literal pool locations in the assembly sources. Unfortunately assembler doesn't put literals into .init sections and external libgcc may still have .literal sections, so sed transformation to the linker script is still needed.
Signed-off-by: Max Filippov <[email protected]>
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| #
6bf28969 |
| 05-Jun-2017 |
Max Filippov <[email protected]> |
xtensa: reduce double exception literal reservation
Double exception vector only needs 20 bytes of space for 5 literals, not 48. Reduce the reservation for double exception vector literals according
xtensa: reduce double exception literal reservation
Double exception vector only needs 20 bytes of space for 5 literals, not 48. Reduce the reservation for double exception vector literals accordingly. This fixes build for configurations with small user exception vector size.
Signed-off-by: Max Filippov <[email protected]>
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| #
b46dcfa3 |
| 04-Jan-2017 |
Max Filippov <[email protected]> |
xtensa: allow merging vectors into .text section
Currently code for exception/IRQ vectors is stored in kernel image as initialization data and is copied to its working addresses during startup. It d
xtensa: allow merging vectors into .text section
Currently code for exception/IRQ vectors is stored in kernel image as initialization data and is copied to its working addresses during startup. It doesn't always make sense. In many cases vectors location can be automatically decided at kernel link time and code can be placed right there. This is especially useful for XIP kernel.
Signed-off-by: Max Filippov <[email protected]>
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Revision tags: v4.10-rc2, v4.10-rc1, v4.9, v4.9-rc8, v4.9-rc7, v4.9-rc6, v4.9-rc5, v4.9-rc4, v4.9-rc3, v4.9-rc2, v4.9-rc1 |
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6727ad9e |
| 08-Oct-2016 |
Chris Metcalf <[email protected]> |
nmi_backtrace: generate one-line reports for idle cpus
When doing an nmi backtrace of many cores, most of which are idle, the output is a little overwhelming and very uninformative. Suppress messag
nmi_backtrace: generate one-line reports for idle cpus
When doing an nmi backtrace of many cores, most of which are idle, the output is a little overwhelming and very uninformative. Suppress messages for cpus that are idling when they are interrupted and just emit one line, "NMI backtrace for N skipped: idling at pc 0xNNN".
We do this by grouping all the cpuidle code together into a new .cpuidle.text section, and then checking the address of the interrupted PC to see if it lies within that section.
This commit suitably tags x86 and tile idle routines, and only adds in the minimal framework for other architectures.
Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Chris Metcalf <[email protected]> Acked-by: Peter Zijlstra (Intel) <[email protected]> Tested-by: Peter Zijlstra (Intel) <[email protected]> Tested-by: Daniel Thompson <[email protected]> [arm] Tested-by: Petr Mladek <[email protected]> Cc: Aaron Tomlin <[email protected]> Cc: Peter Zijlstra (Intel) <[email protected]> Cc: "Rafael J. Wysocki" <[email protected]> Cc: Russell King <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Ingo Molnar <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
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Revision tags: v4.8, v4.8-rc8, v4.8-rc7, v4.8-rc6, v4.8-rc5, v4.8-rc4, v4.8-rc3, v4.8-rc2, v4.8-rc1, v4.7, v4.7-rc7, v4.7-rc6, v4.7-rc5, v4.7-rc4, v4.7-rc3, v4.7-rc2, v4.7-rc1, v4.6, v4.6-rc7, v4.6-rc6, v4.6-rc5, v4.6-rc4 |
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a9f2fc62 |
| 13-Apr-2016 |
Max Filippov <[email protected]> |
xtensa: cleanup MMU setup and kernel layout macros
Make kernel load address explicit, independent of the selected MMU configuration and configurable from Kconfig. Do not restrict it to the first 512
xtensa: cleanup MMU setup and kernel layout macros
Make kernel load address explicit, independent of the selected MMU configuration and configurable from Kconfig. Do not restrict it to the first 512MB of the physical address space.
Cleanup kernel memory layout macros:
- rename VECBASE_RESET_VADDR to VECBASE_VADDR, XC_VADDR to VECTOR_VADDR; - drop VIRTUAL_MEMORY_ADDRESS and LOAD_MEMORY_ADDRESS; - introduce PHYS_OFFSET and use it in __va and __pa definitions; - synchronize MMU/noMMU vectors, drop unused NMI vector; - replace hardcoded vectors offset of 0x3000 with Kconfig symbol.
Signed-off-by: Max Filippov <[email protected]>
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Revision tags: v4.6-rc3, v4.6-rc2, v4.6-rc1, v4.5, v4.5-rc7, v4.5-rc6, v4.5-rc5, v4.5-rc4, v4.5-rc3, v4.5-rc2, v4.5-rc1, v4.4, v4.4-rc8, v4.4-rc7, v4.4-rc6, v4.4-rc5, v4.4-rc4, v4.4-rc3, v4.4-rc2, v4.4-rc1, v4.3, v4.3-rc7, v4.3-rc6 |
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0d848afe |
| 16-Oct-2015 |
Max Filippov <[email protected]> |
xtensa: drop unused sections and remapped reset handlers
There are no .bootstrap or .ResetVector.text sections linked to the vmlinux image, drop these sections from vmlinux.ld.S. Drop RESET_VECTOR_V
xtensa: drop unused sections and remapped reset handlers
There are no .bootstrap or .ResetVector.text sections linked to the vmlinux image, drop these sections from vmlinux.ld.S. Drop RESET_VECTOR_VADDR definition only used for .ResetVector.text.
Drop remapped copies of primary and secondary reset vectors, as modern gdb don't have problems stepping through instructions at arbitrary locations. Drop corresponding sections from the corresponding linker scripts.
Signed-off-by: Max Filippov <[email protected]>
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