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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1 |
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99e487db |
| 18-Sep-2024 |
Masahiro Yamada <[email protected]> |
xtensa: annotate dtb_start variable as static __initdata
The 'dtb_start' variable is only used within arch/xtensa/kernel/setup.c. Mark it as 'static'.
It is only used by parse_tag_fdt() and init_ar
xtensa: annotate dtb_start variable as static __initdata
The 'dtb_start' variable is only used within arch/xtensa/kernel/setup.c. Mark it as 'static'.
It is only used by parse_tag_fdt() and init_arch(), both of which are annotated as __init. Therefore, dtb_start can be annotated as __initdata, so it will discarded after boot.
Signed-off-by: Masahiro Yamada <[email protected]> Message-Id: <[email protected]> Signed-off-by: Max Filippov <[email protected]>
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b2473a35 |
| 23-Oct-2024 |
Usama Arif <[email protected]> |
of/fdt: add dt_phys arg to early_init_dt_scan and early_init_dt_verify
__pa() is only intended to be used for linear map addresses and using it for initial_boot_params which is in fixmap for arm64
of/fdt: add dt_phys arg to early_init_dt_scan and early_init_dt_verify
__pa() is only intended to be used for linear map addresses and using it for initial_boot_params which is in fixmap for arm64 will give an incorrect value. Hence save the physical address when it is known at boot time when calling early_init_dt_scan for arm64 and use it at kexec time instead of converting the virtual address using __pa().
Note that arm64 doesn't need the FDT region reserved in the DT as the kernel explicitly reserves the passed in FDT. Therefore, only a debug warning is fixed with this change.
Reported-by: Breno Leitao <[email protected]> Suggested-by: Mark Rutland <[email protected]> Signed-off-by: Usama Arif <[email protected]> Fixes: ac10be5cdbfa ("arm64: Use common of_kexec_alloc_and_setup_fdt()") Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Herring (Arm) <[email protected]>
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Revision tags: v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6 |
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fd90410e |
| 09-Oct-2023 |
Arnd Bergmann <[email protected]> |
vgacon, arch/*: remove unused screen_info definitions
A number of architectures either kept the screen_info definition for historical purposes as it used to be required by the generic VT code, or th
vgacon, arch/*: remove unused screen_info definitions
A number of architectures either kept the screen_info definition for historical purposes as it used to be required by the generic VT code, or they copied it from another architecture in order to build the VGA console driver in an allmodconfig build. The mips definition is used by some platforms, but the initialization on jazz is not needed.
Now that vgacon no longer builds on these architectures, remove the stale definitions and initializations.
Reviewed-by: Javier Martinez Canillas <[email protected]> Reviewed-by: Thomas Zimmermann <[email protected]> Reviewed-by: Philippe Mathieu-Daudé <[email protected]> Acked-by: Dinh Nguyen <[email protected]> Acked-by: Max Filippov <[email protected]> Acked-by: Palmer Dabbelt <[email protected]> Acked-by: Guo Ren <[email protected]> Acked-by: Helge Deller <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1 |
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03ce34cf |
| 01-Feb-2020 |
Max Filippov <[email protected]> |
xtensa: add XIP-aware MTD support
Add Kconfig symbol, asm/mtd-xip.h header and define related macros: xip_cpu_idle, xip_irqpending, xip_currtime and xip_elapsed_since. Append .xiptext to the vectors
xtensa: add XIP-aware MTD support
Add Kconfig symbol, asm/mtd-xip.h header and define related macros: xip_cpu_idle, xip_irqpending, xip_currtime and xip_elapsed_since. Append .xiptext to the vectors when separate vectors are configured because otherwise they are appended to the data and data may not even be executable in XIP configuration.
Signed-off-by: Max Filippov <[email protected]>
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f29cf776 |
| 13-Jun-2023 |
Max Filippov <[email protected]> |
xtensa: add load/store exception handler
Memory attached to instruction bus of the xtensa CPU is only accessible for a limited subset of opcodes. Other opcodes generate an exception with the load/st
xtensa: add load/store exception handler
Memory attached to instruction bus of the xtensa CPU is only accessible for a limited subset of opcodes. Other opcodes generate an exception with the load/store error cause code. This property complicates use of such systems. Provide a handler that recognizes and transparently fixes such exceptions. The following opcodes are recognized when used outside of FLIX bundles: l32i, l32i.n, l16ui, l16si, l8ui.
Signed-off-by: Max Filippov <[email protected]>
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67e88622 |
| 14-Jun-2023 |
Max Filippov <[email protected]> |
xtensa: move early_trap_init from kasan_early_init to init_arch
There may be other users for the early traps besides KASAN. Move call to the early_trap_init from kasan_early_init. Protect init_exc_t
xtensa: move early_trap_init from kasan_early_init to init_arch
There may be other users for the early traps besides KASAN. Move call to the early_trap_init from kasan_early_init. Protect init_exc_table initializer with ifdef to make sure it builds on noMMU configurations.
Signed-off-by: Max Filippov <[email protected]>
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e6807b44 |
| 21-May-2023 |
Max Filippov <[email protected]> |
xtensa: report trax and perf counters in cpuinfo
Add 'trax' to the list of CPU features when xtensa core is configured with TRAX. Add 'perf' to the list of CPU features when xtensa core is configure
xtensa: report trax and perf counters in cpuinfo
Add 'trax' to the list of CPU features when xtensa core is configured with TRAX. Add 'perf' to the list of CPU features when xtensa core is configured with perf counters and show the number of configured perf counters.
Signed-off-by: Max Filippov <[email protected]>
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7561dfbf |
| 07-Jun-2023 |
Max Filippov <[email protected]> |
xtensa: drop platform_halt and platform_power_off
Instead of using xtensa-specific platform_halt and platform_power_off callbacks use do_kernel_power_off in the machine_halt and machine_power_off an
xtensa: drop platform_halt and platform_power_off
Instead of using xtensa-specific platform_halt and platform_power_off callbacks use do_kernel_power_off in the machine_halt and machine_power_off and reimplement existing platform_halt and platform_power_off users with register_sys_off_handler.
Drop platform_halt and platform_power_off declarations and default implementations.
Signed-off-by: Max Filippov <[email protected]>
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11976fe2 |
| 07-Jun-2023 |
Max Filippov <[email protected]> |
xtensa: drop platform_restart
Instead of using xtensa-specific platform_restart callback use do_kernel_restart in the machine_restart implementation and reimplement existing platform_restart users w
xtensa: drop platform_restart
Instead of using xtensa-specific platform_restart callback use do_kernel_restart in the machine_restart implementation and reimplement existing platform_restart users with register_restart_handler. Drop platform_restart declaration and default implementation.
Signed-off-by: Max Filippov <[email protected]>
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89b184f9 |
| 28-Dec-2021 |
Max Filippov <[email protected]> |
xtensa: make secondary reset vector support conditional
Whether xtensa cores start from primary or secondary reset vector is configurable and may be chosen by board designer or controlled at runtime
xtensa: make secondary reset vector support conditional
Whether xtensa cores start from primary or secondary reset vector is configurable and may be chosen by board designer or controlled at runtime. When secondary reset vector is unused its location in memory may not be writable. Make secondary reset vector support conditional and don't build and load secondary reset vector code when it is disabled.
Signed-off-by: Max Filippov <[email protected]>
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9ddef266 |
| 20-Dec-2021 |
Jason Wang <[email protected]> |
xtensa: use strscpy to copy strings
The strlcpy should not be used because it doesn't limit the source length. So that it will lead some potential bugs.
But the strscpy doesn't require reading memo
xtensa: use strscpy to copy strings
The strlcpy should not be used because it doesn't limit the source length. So that it will lead some potential bugs.
But the strscpy doesn't require reading memory from the src string beyond the specified "count" bytes, and since the return value is easier to error-check than strlcpy()'s. In addition, the implementation is robust to the string changing out from underneath it, unlike the current strlcpy() implementation.
Thus, replace strlcpy with strscpy.
Signed-off-by: Jason Wang <[email protected]> Message-Id: <[email protected]> Signed-off-by: Max Filippov <[email protected]>
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bd47cdb7 |
| 29-Aug-2021 |
Max Filippov <[email protected]> |
xtensa: move section symbols to asm/sections.h
Introduce asm/sections.h and move section declarations to this header from setup.c. Assign section symbols char array type uniformly and drop address o
xtensa: move section symbols to asm/sections.h
Introduce asm/sections.h and move section declarations to this header from setup.c. Assign section symbols char array type uniformly and drop address operator from section symbol references in code. Sort headers in setup.c while at it.
Signed-off-by: Max Filippov <[email protected]>
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da0a4e5c |
| 26-Jul-2021 |
Max Filippov <[email protected]> |
xtensa: only build windowed register support code when needed
There's no need in window overflow/underflow/alloca exception handlers or window spill code when neither kernel nor userspace support wi
xtensa: only build windowed register support code when needed
There's no need in window overflow/underflow/alloca exception handlers or window spill code when neither kernel nor userspace support windowed registers. Don't build or link it.
Signed-off-by: Max Filippov <[email protected]>
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d67ed251 |
| 25-Sep-2021 |
Randy Dunlap <[email protected]> |
xtensa: use CONFIG_USE_OF instead of CONFIG_OF
CONFIG_OF can be set by a randconfig or by a user -- without setting the early flattree option (OF_EARLY_FLATTREE). This causes build errors. However,
xtensa: use CONFIG_USE_OF instead of CONFIG_OF
CONFIG_OF can be set by a randconfig or by a user -- without setting the early flattree option (OF_EARLY_FLATTREE). This causes build errors. However, if randconfig or a user sets USE_OF in the Xtensa config, the right kconfig symbols are set to fix the build.
Fixes these build errors:
../arch/xtensa/kernel/setup.c:67:19: error: ‘__dtb_start’ undeclared here (not in a function); did you mean ‘dtb_start’? 67 | void *dtb_start = __dtb_start; | ^~~~~~~~~~~ ../arch/xtensa/kernel/setup.c: In function 'xtensa_dt_io_area': ../arch/xtensa/kernel/setup.c:201:14: error: implicit declaration of function 'of_flat_dt_is_compatible'; did you mean 'of_machine_is_compatible'? [-Werror=implicit-function-declaration] 201 | if (!of_flat_dt_is_compatible(node, "simple-bus")) ../arch/xtensa/kernel/setup.c:204:18: error: implicit declaration of function 'of_get_flat_dt_prop' [-Werror=implicit-function-declaration] 204 | ranges = of_get_flat_dt_prop(node, "ranges", &len); ../arch/xtensa/kernel/setup.c:204:16: error: assignment to 'const __be32 *' {aka 'const unsigned int *'} from 'int' makes pointer from integer without a cast [-Werror=int-conversion] 204 | ranges = of_get_flat_dt_prop(node, "ranges", &len); | ^ ../arch/xtensa/kernel/setup.c: In function 'early_init_devtree': ../arch/xtensa/kernel/setup.c:228:9: error: implicit declaration of function 'early_init_dt_scan'; did you mean 'early_init_devtree'? [-Werror=implicit-function-declaration] 228 | early_init_dt_scan(params); ../arch/xtensa/kernel/setup.c:229:9: error: implicit declaration of function 'of_scan_flat_dt' [-Werror=implicit-function-declaration] 229 | of_scan_flat_dt(xtensa_dt_io_area, NULL);
xtensa-elf-ld: arch/xtensa/mm/mmu.o:(.text+0x0): undefined reference to `xtensa_kio_paddr'
Fixes: da844a81779e ("xtensa: add device trees support") Fixes: 6cb971114f63 ("xtensa: remap io area defined in device tree") Signed-off-by: Randy Dunlap <[email protected]> Signed-off-by: Max Filippov <[email protected]>
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33def849 |
| 22-Oct-2020 |
Joe Perches <[email protected]> |
treewide: Convert macro and uses of __section(foo) to __section("foo")
Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences.
Remove the q
treewide: Convert macro and uses of __section(foo) to __section("foo")
Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences.
Remove the quote operator # from compiler_attributes.h __section macro.
Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms.
Conversion done using the script at:
https://lore.kernel.org/lkml/[email protected]/2-convert_section.pl
Signed-off-by: Joe Perches <[email protected]> Reviewed-by: Nick Desaulniers <[email protected]> Reviewed-by: Miguel Ojeda <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
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0d5ab144 |
| 02-Jul-2020 |
Max Filippov <[email protected]> |
xtensa: update *pos in cpuinfo_op.next
Increment *pos in the cpuinfo_op.next to fix the following warning triggered by cat /proc/cpuinfo:
seq_file: buggy .next function c_next did not update posi
xtensa: update *pos in cpuinfo_op.next
Increment *pos in the cpuinfo_op.next to fix the following warning triggered by cat /proc/cpuinfo:
seq_file: buggy .next function c_next did not update position index
Signed-off-by: Max Filippov <[email protected]>
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e31cf2f4 |
| 09-Jun-2020 |
Mike Rapoport <[email protected]> |
mm: don't include asm/pgtable.h if linux/mm.h is already included
Patch series "mm: consolidate definitions of page table accessors", v2.
The low level page table accessors (pXY_index(), pXY_offset
mm: don't include asm/pgtable.h if linux/mm.h is already included
Patch series "mm: consolidate definitions of page table accessors", v2.
The low level page table accessors (pXY_index(), pXY_offset()) are duplicated across all architectures and sometimes more than once. For instance, we have 31 definition of pgd_offset() for 25 supported architectures.
Most of these definitions are actually identical and typically it boils down to, e.g.
static inline unsigned long pmd_index(unsigned long address) { return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); }
static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) { return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); }
These definitions can be shared among 90% of the arches provided XYZ_SHIFT, PTRS_PER_XYZ and xyz_page_vaddr() are defined.
For architectures that really need a custom version there is always possibility to override the generic version with the usual ifdefs magic.
These patches introduce include/linux/pgtable.h that replaces include/asm-generic/pgtable.h and add the definitions of the page table accessors to the new header.
This patch (of 12):
The linux/mm.h header includes <asm/pgtable.h> to allow inlining of the functions involving page table manipulations, e.g. pte_alloc() and pmd_alloc(). So, there is no point to explicitly include <asm/pgtable.h> in the files that include <linux/mm.h>.
The include statements in such cases are remove with a simple loop:
for f in $(git grep -l "include <linux/mm.h>") ; do sed -i -e '/include <asm\/pgtable.h>/ d' $f done
Signed-off-by: Mike Rapoport <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Brian Cain <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: Chris Zankel <[email protected]> Cc: "David S. Miller" <[email protected]> Cc: Geert Uytterhoeven <[email protected]> Cc: Greentime Hu <[email protected]> Cc: Greg Ungerer <[email protected]> Cc: Guan Xuetao <[email protected]> Cc: Guo Ren <[email protected]> Cc: Heiko Carstens <[email protected]> Cc: Helge Deller <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Ley Foon Tan <[email protected]> Cc: Mark Salter <[email protected]> Cc: Matthew Wilcox <[email protected]> Cc: Matt Turner <[email protected]> Cc: Max Filippov <[email protected]> Cc: Michael Ellerman <[email protected]> Cc: Michal Simek <[email protected]> Cc: Mike Rapoport <[email protected]> Cc: Nick Hu <[email protected]> Cc: Paul Walmsley <[email protected]> Cc: Richard Weinberger <[email protected]> Cc: Rich Felker <[email protected]> Cc: Russell King <[email protected]> Cc: Stafford Horne <[email protected]> Cc: Thomas Bogendoerfer <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Tony Luck <[email protected]> Cc: Vincent Chen <[email protected]> Cc: Vineet Gupta <[email protected]> Cc: Will Deacon <[email protected]> Cc: Yoshinori Sato <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Linus Torvalds <[email protected]>
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5e4417f9 |
| 01-Feb-2020 |
Max Filippov <[email protected]> |
xtensa: reorganize vectors placement
Allow vectors to be either merged into the kernel .text or put at a fixed virtual address independently of XIP option. Drop option that puts vectors at a fixed o
xtensa: reorganize vectors placement
Allow vectors to be either merged into the kernel .text or put at a fixed virtual address independently of XIP option. Drop option that puts vectors at a fixed offset from the kernel text. Add choice to Kconfig. Vectors at fixed virtual address may be useful for XIP-aware MTD support and for noMMU configurations with available IRAM. Configurations without VECBASE register must put their vectors at specific locations regardless of the selected option. All other configurations should happily use merged vectors.
Signed-off-by: Max Filippov <[email protected]>
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50722f0b |
| 01-Feb-2020 |
Max Filippov <[email protected]> |
xtensa: move fast exception handlers close to vectors
On XIP kernels it makes sense to have exception vectors and fast exception handlers together (in a fast memory). In addition, with MTD XIP suppo
xtensa: move fast exception handlers close to vectors
On XIP kernels it makes sense to have exception vectors and fast exception handlers together (in a fast memory). In addition, with MTD XIP support both vectors and fast exception handlers must be outside of the FLASH.
Add section .exception.text and move fast exception handlers to it. Put it together with vectors when vectors are outside of the .text.
Signed-off-by: Max Filippov <[email protected]>
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Revision tags: v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3 |
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fec63889 |
| 18-Dec-2019 |
Arvind Sankar <[email protected]> |
arch/xtensa/setup: Drop dummy_con initialization
con_init in tty/vt.c will now set conswitchp to dummy_con if it's unset. Drop it from arch setup code.
Signed-off-by: Arvind Sankar <[email protected]
arch/xtensa/setup: Drop dummy_con initialization
con_init in tty/vt.c will now set conswitchp to dummy_con if it's unset. Drop it from arch setup code.
Signed-off-by: Arvind Sankar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3, v5.2-rc2, v5.2-rc1, v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5, v5.1-rc4, v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6, v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20, v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1, v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6, v4.19-rc5, v4.19-rc4, v4.19-rc3, v4.19-rc2, v4.19-rc1, v4.18, v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4, v4.18-rc3, v4.18-rc2, v4.18-rc1, v4.17, v4.17-rc7, v4.17-rc6, v4.17-rc5, v4.17-rc4, v4.17-rc3, v4.17-rc2, v4.17-rc1, v4.16, v4.16-rc7, v4.16-rc6, v4.16-rc5, v4.16-rc4, v4.16-rc3, v4.16-rc2, v4.16-rc1, v4.15, v4.15-rc9, v4.15-rc8, v4.15-rc7, v4.15-rc6, v4.15-rc5, v4.15-rc4, v4.15-rc3, v4.15-rc2, v4.15-rc1, v4.14, v4.14-rc8, v4.14-rc7, v4.14-rc6, v4.14-rc5, v4.14-rc4, v4.14-rc3, v4.14-rc2, v4.14-rc1, v4.13, v4.13-rc7, v4.13-rc6, v4.13-rc5, v4.13-rc4, v4.13-rc3, v4.13-rc2, v4.13-rc1, v4.12, v4.12-rc7, v4.12-rc6, v4.12-rc5, v4.12-rc4, v4.12-rc3, v4.12-rc2, v4.12-rc1, v4.11, v4.11-rc8, v4.11-rc7, v4.11-rc6, v4.11-rc5, v4.11-rc4, v4.11-rc3, v4.11-rc2, v4.11-rc1, v4.10, v4.10-rc8, v4.10-rc7, v4.10-rc6, v4.10-rc5, v4.10-rc4, v4.10-rc3 |
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7af710d9 |
| 04-Jan-2017 |
Max Filippov <[email protected]> |
xtensa: add XIP kernel support
XIP (eXecute In Place) kernel image is the image that can be run directly from ROM, using RAM only for writable data.
XIP xtensa kernel differs from regular xtensa ke
xtensa: add XIP kernel support
XIP (eXecute In Place) kernel image is the image that can be run directly from ROM, using RAM only for writable data.
XIP xtensa kernel differs from regular xtensa kernel in the following ways: - it has exception/IRQ vectors merged into text section. No vectors relocation takes place at kernel startup. - .data/.bss location must be specified in the kernel configuration, its content is copied there in the _startup function. - .init.text is merged with the rest of text and is executed from ROM. - when MMU is used the virtual address where the kernel will be mapped must be specified in the kernel configuration. It may be in the KSEG or in the KIO, __pa macro is adjusted to be able to handle both.
Signed-off-by: Max Filippov <[email protected]>
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f348f5c2 |
| 24-Jul-2019 |
Mike Rapoport <[email protected]> |
xtensa: remove free_initrd_mem
The xtensa free_initrd_mem() verifies that initrd is mapped and then frees its memory using free_reserved_area().
The initrd is considered mapped when its memory was
xtensa: remove free_initrd_mem
The xtensa free_initrd_mem() verifies that initrd is mapped and then frees its memory using free_reserved_area().
The initrd is considered mapped when its memory was successfully reserved with mem_reserve().
Resetting initrd_start to 0 in case of mem_reserve() failure allows to switch to generic free_initrd_mem() implementation.
Signed-off-by: Mike Rapoport <[email protected]> Message-Id: <[email protected]> Signed-off-by: Max Filippov <[email protected]>
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cd8869f4 |
| 12-Aug-2019 |
Max Filippov <[email protected]> |
xtensa: add missing isync to the cpu_reset TLB code
ITLB entry modifications must be followed by the isync instruction before the new entries are possibly used. cpu_reset lacks one isync between ITL
xtensa: add missing isync to the cpu_reset TLB code
ITLB entry modifications must be followed by the isync instruction before the new entries are possibly used. cpu_reset lacks one isync between ITLB way 6 initialization and jump to the identity mapping. Add missing isync to xtensa cpu_reset.
Cc: [email protected] Signed-off-by: Max Filippov <[email protected]>
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88804e68 |
| 15-Oct-2018 |
Max Filippov <[email protected]> |
xtensa: drop dead PCI support code
xtensa-specific PCI initialization code has significantly bitrotted over time because there's no platform that use it. Get rid of remaining non-functioning initial
xtensa: drop dead PCI support code
xtensa-specific PCI initialization code has significantly bitrotted over time because there's no platform that use it. Get rid of remaining non-functioning initialization and remove platform_pcibios_* interface. A new platform that would use PCI on xtensa will configure PCI controller using device tree.
Drop variables pci_ctrl_head, pci_bus_count and functions pcibios_init, pci_controller_apertures, platform_pcibios_init and platform_pcibios_fixup.
Signed-off-by: Max Filippov <[email protected]>
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adefd051 |
| 30-May-2019 |
Guenter Roeck <[email protected]> |
xtensa: Fix section mismatch between memblock_reserve and mem_reserve
Since commit 9012d011660ea5cf2 ("compiler: allow all arches to enable CONFIG_OPTIMIZE_INLINING"), xtensa:tinyconfig fails to bui
xtensa: Fix section mismatch between memblock_reserve and mem_reserve
Since commit 9012d011660ea5cf2 ("compiler: allow all arches to enable CONFIG_OPTIMIZE_INLINING"), xtensa:tinyconfig fails to build with section mismatch errors.
WARNING: vmlinux.o(.text.unlikely+0x68): Section mismatch in reference from the function ___pa() to the function .meminit.text:memblock_reserve() WARNING: vmlinux.o(.text.unlikely+0x74): Section mismatch in reference from the function mem_reserve() to the function .meminit.text:memblock_reserve() FATAL: modpost: Section mismatches detected.
This was not seen prior to the above mentioned commit because mem_reserve() was always inlined.
Mark mem_reserve(() as __init_memblock to have it reside in the same section as memblock_reserve().
Signed-off-by: Guenter Roeck <[email protected]> Message-Id: <[email protected]> Signed-off-by: Max Filippov <[email protected]>
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