xtensa: increase ranges in ___invalidate_{i,d}cache_all

Cache invalidation macros use cache line size to iterate over
invalidated cache lines, assuming that all cache ways are invalidated by
single

xtensa: increase ranges in ___invalidate_{i,d}cache_all

Cache invalidation macros use cache line size to iterate over
invalidated cache lines, assuming that all cache ways are invalidated by
single instruction, but xtensa ISA recommends to not assume that for
future compatibility:
In some implementations all ways at index Addry-1..z are invalidated
regardless of the specified way, but for future compatibility this
behavior should not be assumed.

Iterate over all cache ways in ___invalidate_icache_all and
___invalidate_dcache_all.

Cc: [email protected]
Signed-off-by: Max Filippov <[email protected]>

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xtensa: limit offsets in __loop_cache_{all,page}

When building kernel for xtensa cores with big cache lines (e.g. 128
bytes or more) __loop_cache_all and __loop_cache_page may generate
assembly inst

xtensa: limit offsets in __loop_cache_{all,page}

When building kernel for xtensa cores with big cache lines (e.g. 128
bytes or more) __loop_cache_all and __loop_cache_page may generate
assembly instructions with immediate fields that are too big. This
results in the following build errors:

arch/xtensa/mm/misc.S: Assembler messages:
arch/xtensa/mm/misc.S:464: Error: operand 2 of 'diwbi' has invalid value '256'
arch/xtensa/mm/misc.S:464: Error: operand 2 of 'diwbi' has invalid value '384'
arch/xtensa/kernel/head.S: Assembler messages:
arch/xtensa/kernel/head.S:172: Error: operand 2 of 'diu' has invalid value '256'
arch/xtensa/kernel/head.S:172: Error: operand 2 of 'diu' has invalid value '384'
arch/xtensa/kernel/head.S:176: Error: operand 2 of 'iiu' has invalid value '256'
arch/xtensa/kernel/head.S:176: Error: operand 2 of 'iiu' has invalid value '384'
arch/xtensa/kernel/head.S:255: Error: operand 2 of 'diwb' has invalid value '256'
arch/xtensa/kernel/head.S:255: Error: operand 2 of 'diwb' has invalid value '384'

Add parameter max_immed to these macros and use it to limit values of
immediate operands. Extract common code of these macros into the new
macro __loop_cache_unroll.

Cc: [email protected]
Signed-off-by: Max Filippov <[email protected]>

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xtensa: define ___unlock_[di]cache_all unconditionally

Provide macro definitions regardless of whether caches are lockable or
not, make definitions empty in latter case.

Signed-off-by: Max Filippov

xtensa: define ___unlock_[di]cache_all unconditionally

Provide macro definitions regardless of whether caches are lockable or
not, make definitions empty in latter case.

Signed-off-by: Max Filippov <[email protected]>

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xtensa: fix build for configs without cache options

- make cache-related assembly macros empty if core doesn't have
corresponding cache type;
- don't initialize cache attributes in instruction/dat

xtensa: fix build for configs without cache options

- make cache-related assembly macros empty if core doesn't have
corresponding cache type;
- don't initialize cache attributes in instruction/data TLB entries if
there's no corresponding cache type.

Signed-off-by: Max Filippov <[email protected]>

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xtensa: clean up files to make them code-style compliant

Remove heading and trailing spaces, trim trailing lines, and wrap lines
that are longer than 80 characters.

Signed-off-by: Chris Zankel <chr

xtensa: clean up files to make them code-style compliant

Remove heading and trailing spaces, trim trailing lines, and wrap lines
that are longer than 80 characters.

Signed-off-by: Chris Zankel <[email protected]>

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xtensa: move headers files to arch/xtensa/include

Move all header files for xtensa to arch/xtensa/include and platform and
variant header files to the appropriate arch/xtensa/platforms/ and
arch/xte

xtensa: move headers files to arch/xtensa/include

Move all header files for xtensa to arch/xtensa/include and platform and
variant header files to the appropriate arch/xtensa/platforms/ and
arch/xtensa/variants/ directories.

Moving the files gets also rid of all uses of symlinks in the Makefile.

This has been completed already for the majority of the architectures
and xtensa is one out of six missing.

Signed-off-by: Sam Ravnborg <[email protected]>
Signed-off-by: Chris Zankel <[email protected]>

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