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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1 |
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9c19cc1f |
| 30-Jan-2025 |
Mario Limonciello <[email protected]> |
x86/amd_node: Add support for debugfs access to SMN registers
There are certain registers on AMD Zen systems that can only be accessed through SMN.
Introduce a new interface that provides debugfs f
x86/amd_node: Add support for debugfs access to SMN registers
There are certain registers on AMD Zen systems that can only be accessed through SMN.
Introduce a new interface that provides debugfs files for accessing SMN. As this introduces the capability for userspace to manipulate the hardware in unpredictable ways, taint the kernel when writing.
Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Yazen Ghannam <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Signed-off-by: Ingo Molnar <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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83518453 |
| 30-Jan-2025 |
Mario Limonciello <[email protected]> |
x86/amd_node: Add SMN offsets to exclusive region access
Offsets 0x60 and 0x64 are used internally by kernel drivers that call the amd_smn_read() and amd_smn_write() functions. If userspace accesses
x86/amd_node: Add SMN offsets to exclusive region access
Offsets 0x60 and 0x64 are used internally by kernel drivers that call the amd_smn_read() and amd_smn_write() functions. If userspace accesses the regions at the same time as the kernel it may cause malfunctions in drivers using the offsets.
Add these offsets to the exclusions so that the kernel is tainted if a non locked down userspace tries to access them.
Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Yazen Ghannam <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Signed-off-by: Ingo Molnar <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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8a3dc0f7 |
| 30-Jan-2025 |
Yazen Ghannam <[email protected]> |
x86/amd_node, platform/x86/amd/hsmp: Have HSMP use SMN through AMD_NODE
The HSMP interface is just an SMN interface with different offsets.
Define an HSMP wrapper in the SMN code and have the HSMP
x86/amd_node, platform/x86/amd/hsmp: Have HSMP use SMN through AMD_NODE
The HSMP interface is just an SMN interface with different offsets.
Define an HSMP wrapper in the SMN code and have the HSMP platform driver use that rather than a local solution.
Also, remove the "root" member from AMD_NB, since there are no more users of it.
Signed-off-by: Yazen Ghannam <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Signed-off-by: Ingo Molnar <[email protected]> Reviewed-by: Carlos Bilbao <[email protected]> Acked-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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6b06755a |
| 30-Jan-2025 |
Mario Limonciello <[email protected]> |
x86/amd_node: Add support for debugfs access to SMN registers
There are certain registers on AMD Zen systems that can only be accessed through SMN.
Introduce a new interface that provides debugfs f
x86/amd_node: Add support for debugfs access to SMN registers
There are certain registers on AMD Zen systems that can only be accessed through SMN.
Introduce a new interface that provides debugfs files for accessing SMN. As this introduces the capability for userspace to manipulate the hardware in unpredictable ways, taint the kernel when writing.
Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Yazen Ghannam <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Link: https://lore.kernel.org/r/[email protected]
show more ...
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bebe0afb |
| 30-Jan-2025 |
Mario Limonciello <[email protected]> |
x86/amd_node: Add SMN offsets to exclusive region access
Offsets 0x60 and 0x64 are used internally by kernel drivers that call the amd_smn_read() and amd_smn_write() functions. If userspace accesses
x86/amd_node: Add SMN offsets to exclusive region access
Offsets 0x60 and 0x64 are used internally by kernel drivers that call the amd_smn_read() and amd_smn_write() functions. If userspace accesses the regions at the same time as the kernel it may cause malfunctions in drivers using the offsets.
Add these offsets to the exclusions so that the kernel is tainted if a non locked down userspace tries to access them.
Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Yazen Ghannam <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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735049b8 |
| 30-Jan-2025 |
Yazen Ghannam <[email protected]> |
x86/amd_node, platform/x86/amd/hsmp: Have HSMP use SMN through AMD_NODE
The HSMP interface is just an SMN interface with different offsets.
Define an HSMP wrapper in the SMN code and have the HSMP
x86/amd_node, platform/x86/amd/hsmp: Have HSMP use SMN through AMD_NODE
The HSMP interface is just an SMN interface with different offsets.
Define an HSMP wrapper in the SMN code and have the HSMP platform driver use that rather than a local solution.
Also, remove the "root" member from AMD_NB, since there are no more users of it.
Signed-off-by: Yazen Ghannam <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Reviewed-by: Carlos Bilbao <[email protected]> Acked-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected]
show more ...
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Revision tags: v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2 |
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79821b90 |
| 06-Dec-2024 |
Yazen Ghannam <[email protected]> |
x86/amd_node: Use defines for SMN register offsets
There are more than one SMN index/data pair available for software use. The register offsets are different, but the protocol is the same.
Use defi
x86/amd_node: Use defines for SMN register offsets
There are more than one SMN index/data pair available for software use. The register offsets are different, but the protocol is the same.
Use defines for the SMN offset values and allow the index/data offsets to be passed to the read/write helper function.
This eases code reuse with other SMN users in the kernel.
Signed-off-by: Yazen Ghannam <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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77466b79 |
| 06-Dec-2024 |
Yazen Ghannam <[email protected]> |
x86/amd_node: Remove dependency on AMD_NB
Cache the root devices locally so that there are no more dependencies on AMD_NB.
Signed-off-by: Yazen Ghannam <[email protected]> Signed-off-by: Borisl
x86/amd_node: Remove dependency on AMD_NB
Cache the root devices locally so that there are no more dependencies on AMD_NB.
Signed-off-by: Yazen Ghannam <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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35df7976 |
| 06-Dec-2024 |
Yazen Ghannam <[email protected]> |
x86/amd_node: Update __amd_smn_rw() error paths
Use guard(mutex) and convert PCI error codes to common ones.
Suggested-by: Tom Lendacky <[email protected]> Signed-off-by: Yazen Ghannam <yazen
x86/amd_node: Update __amd_smn_rw() error paths
Use guard(mutex) and convert PCI error codes to common ones.
Suggested-by: Tom Lendacky <[email protected]> Signed-off-by: Yazen Ghannam <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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d6caeafa |
| 06-Dec-2024 |
Mario Limonciello <[email protected]> |
x86/amd_nb: Move SMN access code to a new amd_node driver
SMN access was bolted into amd_nb mostly as convenience. This has limitations though that require incurring tech debt to keep it working.
x86/amd_nb: Move SMN access code to a new amd_node driver
SMN access was bolted into amd_nb mostly as convenience. This has limitations though that require incurring tech debt to keep it working.
Move SMN access to the newly introduced AMD Node driver.
Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Yazen Ghannam <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Acked-by: Ilpo Järvinen <[email protected]> # pdx86 Acked-by: Shyam Sundar S K <[email protected]> # PMF, PMC Link: https://lore.kernel.org/r/[email protected]
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40a5f6ff |
| 06-Dec-2024 |
Yazen Ghannam <[email protected]> |
x86/amd_nb: Simplify root device search
The "root" device search was introduced to support SMN access for Zen systems. This device represents a PCIe root complex. It is not the same as the "CPU/node
x86/amd_nb: Simplify root device search
The "root" device search was introduced to support SMN access for Zen systems. This device represents a PCIe root complex. It is not the same as the "CPU/node" devices found at slots 0x18-0x1F.
There may be multiple PCIe root complexes within an AMD node. Such is the case with server or High-end Desktop (HEDT) systems, etc. Therefore it is not enough to assume "root <-> AMD node" is a 1-to-1 association.
Currently, this is handled by skipping "extra" root complexes during the search. However, the hardware provides the PCI bus number of an AMD node's root device.
Use the hardware info to get the root device's bus and drop the extra search code and PCI IDs.
Signed-off-by: Yazen Ghannam <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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e6e6e5e8 |
| 06-Dec-2024 |
Yazen Ghannam <[email protected]> |
x86: Start moving AMD node functionality out of AMD_NB
The "AMD Node" concept spans many families of systems and applies to a number of subsystems and drivers.
Currently, the AMD Northbridge code i
x86: Start moving AMD node functionality out of AMD_NB
The "AMD Node" concept spans many families of systems and applies to a number of subsystems and drivers.
Currently, the AMD Northbridge code is overloaded with AMD node functionality. However, the node concept is broader than just northbridges.
Start files to host common AMD node functions and definitions. Include a helper to find an AMD node device function based on the convention described in AMD documentation.
Anything that needs node functionality should include this rather than amd_nb.h. The AMD_NB code will be reduced to only northbridge-specific code needed for legacy systems.
Signed-off-by: Yazen Ghannam <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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