sh: machvec: Use char[] for section boundaries

As done for other sections, define the extern as a character array,
which relaxes many of the compiler-time object size checks, which would
otherwise a

sh: machvec: Use char[] for section boundaries

As done for other sections, define the extern as a character array,
which relaxes many of the compiler-time object size checks, which would
otherwise assume it's a single long. Solves the following build error:

arch/sh/kernel/machvec.c: error: array subscript 'struct sh_machine_vector[0]' is partly outside array bounds of 'long int[1]' [-Werror=array-bounds]: => 105:33

Cc: Yoshinori Sato <[email protected]>
Cc: Rich Felker <[email protected]>
Cc: [email protected]
Reported-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/lkml/[email protected]/
Fixes: 9655ad03af2d ("sh: Fixup machvec support.")
Reviewed-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Gustavo A. R. Silva <[email protected]>
Acked-by: Rich Felker <[email protected]>
Signed-off-by: Kees Cook <[email protected]>

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sh: machvec: Modernize printing of kernel messages

- Convert from printk() to pr_*(),
- Add missing continuations.

Signed-off-by: Geert Uytterhoeven <[email protected]>
Tested-by: Guenter

sh: machvec: Modernize printing of kernel messages

- Convert from printk() to pr_*(),
- Add missing continuations.

Signed-off-by: Geert Uytterhoeven <[email protected]>
Tested-by: Guenter Roeck <[email protected]>
Signed-off-by: Rich Felker <[email protected]>

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locking/seqlock, headers: Untangle the spaghetti monster

By using lockdep_assert_*() from seqlock.h, the spaghetti monster
attacked.

Attack back by reducing seqlock.h dependencies from two key high

locking/seqlock, headers: Untangle the spaghetti monster

By using lockdep_assert_*() from seqlock.h, the spaghetti monster
attacked.

Attack back by reducing seqlock.h dependencies from two key high level headers:

- <linux/seqlock.h>: -Remove <linux/ww_mutex.h>
- <linux/time.h>: -Remove <linux/seqlock.h>
- <linux/sched.h>: +Add <linux/seqlock.h>

The price was to add it to sched.h ...

Core header fallout, we add direct header dependencies instead of gaining them
parasitically from higher level headers:

- <linux/dynamic_queue_limits.h>: +Add <asm/bug.h>
- <linux/hrtimer.h>: +Add <linux/seqlock.h>
- <linux/ktime.h>: +Add <asm/bug.h>
- <linux/lockdep.h>: +Add <linux/smp.h>
- <linux/sched.h>: +Add <linux/seqlock.h>
- <linux/videodev2.h>: +Add <linux/kernel.h>

Arch headers fallout:

- PARISC: <asm/timex.h>: +Add <asm/special_insns.h>
- SH: <asm/io.h>: +Add <asm/page.h>
- SPARC: <asm/timer_64.h>: +Add <uapi/asm/asi.h>
- SPARC: <asm/vvar.h>: +Add <asm/processor.h>, <asm/barrier.h>
-Remove <linux/seqlock.h>
- X86: <asm/fixmap.h>: +Add <asm/pgtable_types.h>
-Remove <asm/acpi.h>

There's also a bunch of parasitic header dependency fallout in .c files, not listed
separately.

[ mingo: Extended the changelog, split up & fixed the original patch. ]

Co-developed-by: Ingo Molnar <[email protected]>
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]

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sh: kernel: convert to SPDX identifiers

Update license to use SPDX-License-Identifier instead of verbose license
text.

Link: http://lkml.kernel.org/r/[email protected]

sh: kernel: convert to SPDX identifiers

Update license to use SPDX-License-Identifier instead of verbose license
text.

Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Kuninori Morimoto <[email protected]>
Reviewed-by: Simon Horman <[email protected]>
Cc: Rich Felker <[email protected]>
Cc: Yoshinori Sato <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>

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sh: Kill off machvec IRQ hinting.

Everything is using sparseirq these days, so we have no need to
arbitrarily size nr_irqs ahead of time. The legacy IRQ pre-allocation
likewise has no meaning for us

sh: Kill off machvec IRQ hinting.

Everything is using sparseirq these days, so we have no need to
arbitrarily size nr_irqs ahead of time. The legacy IRQ pre-allocation
likewise has no meaning for us, so that's killed off too. We now depend
on nr_irqs expansion by the generic hardirq layer instead.

It's also worth noting that the majority of boards had completely bogus
values for their nr_irqs relative to their CPU and configurations, so
this ends up correcting behaviour for quite a few platforms.

Signed-off-by: Paul Mundt <[email protected]>

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sh: machvec IO death.

This takes a bit of a sledgehammer to the machvec I/O routines. The
iomem case requires no special casing and so can just be dropped
outright. This only leaves the ioport casin

sh: machvec IO death.

This takes a bit of a sledgehammer to the machvec I/O routines. The
iomem case requires no special casing and so can just be dropped
outright. This only leaves the ioport casing for PCI and SuperIO
mangling. With the SuperIO case going through the standard ioport
mapping, it's possible to replace everything with generic routines.

With this done the standard I/O routines are tidied up and NO_IOPORT
now gets default-enabled for the vast majority of boards.

Signed-off-by: Paul Mundt <[email protected]>

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sh: support for platforms without PIO.

This extends some of the existing special casing for HAS_IOPORT
platforms and gets it to the point where platforms can begin to
conditionally select it.

The m

sh: support for platforms without PIO.

This extends some of the existing special casing for HAS_IOPORT
platforms and gets it to the point where platforms can begin to
conditionally select it.

The major changes here are that the PIO routines themselves go away
completely, including all of the machvec port mapping wrappers. With this
in place it's possible for any non-machvec abusing platform to disable
PIO completely. At present this is left as an opt-in until the abusers
are the odd ones out instead of the majority.

Signed-off-by: Paul Mundt <[email protected]>

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sh: enable LMB region setup via machvec.

This plugs in a memory init callback in the machvec to permit boards to
wire up various bits of memory directly in to LMB. A generic machvec
implementation i

sh: enable LMB region setup via machvec.

This plugs in a memory init callback in the machvec to permit boards to
wire up various bits of memory directly in to LMB. A generic machvec
implementation is provided that simply wraps around the normal
Kconfig-derived memory start/size.

Signed-off-by: Paul Mundt <[email protected]>

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sh: Use the generic I/O port base for slowdown.

This fixes up the build and behaviour for various configurations. Namely
the CONFIG_32BIT cases where legacy mappings do not exist, as well as the
sh6

sh: Use the generic I/O port base for slowdown.

This fixes up the build and behaviour for various configurations. Namely
the CONFIG_32BIT cases where legacy mappings do not exist, as well as the
sh64 build.

Signed-off-by: Paul Mundt <[email protected]>

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sh: Set the default I/O port base to P2SEG.

This bumps up the default I/O base to P2SEG, which allows legacy probing
to bail out gracefully rather than oopsing. Platforms that have a real
PIO offset

sh: Set the default I/O port base to P2SEG.

This bumps up the default I/O base to P2SEG, which allows legacy probing
to bail out gracefully rather than oopsing. Platforms that have a real
PIO offset still need to fix this up on their own, although most
platforms are content with P2SEG already.

The previous change to teach ioport_map() about >= P1SEG offsets in
combination with this patch allows both the already remapped and the
legacy address probing to pass through and succeed.

Fixes up an oops with i8042 on the sh7785lcr board.

Signed-off-by: Paul Mundt <[email protected]>

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sh: boot word / mode pin support V2

Add mode pin support for the SuperH architecture V2.

With this patch applied the board code can add their
own function to export the cpu mode pin configuration.

sh: boot word / mode pin support V2

Add mode pin support for the SuperH architecture V2.

With this patch applied the board code can add their
own function to export the cpu mode pin configuration.
In most cases this will be a constant bitmap, but
boards that allow reading this from a register can
instead read out the pin state from hardware.

The code warns if a pin is tested but no board specific
mode pin function has been provided.

Signed-off-by: Magnus Damm <[email protected]>
Signed-off-by: Paul Mundt <[email protected]>

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sh: More I/O routine overhauling.

This tidies up a lot of the PIO/MMIO split. No in-tree platforms were
making use of the MMIO overloading through the machvec (nor have any of
them been in some time

sh: More I/O routine overhauling.

This tidies up a lot of the PIO/MMIO split. No in-tree platforms were
making use of the MMIO overloading through the machvec (nor have any of
them been in some time), so we just kill all of that off. The ISA I/O
routine wrapping remains unaffected, which remains the only special
casing outside of the iomap API that boards need to think about.

Signed-off-by: Paul Mundt <[email protected]>

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sh: fixup many sparse errors.

Signed-off-by: Paul Mundt <[email protected]>

sh: panic on machvec section misalignment.

Now that __initmv references the machvec section unconditionally
there have been cases where folks have been mistakenly flagging
non-machvec structures wit

sh: panic on machvec section misalignment.

Now that __initmv references the machvec section unconditionally
there have been cases where folks have been mistakenly flagging
non-machvec structures with the machvec section attribute (presumably
to shut up modpost). This leads to obscure breakage in earlyprintk
amongst other places and is rather non-obvious.

Add a simple sanity check to try and catch __initmv misuse and
panic early.

Reported-by: Markus Brunner <[email protected]>
Signed-off-by: Paul Mundt <[email protected]>

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sh: Rip out special unknown machvec.

This kills off the BareCPU board as a "special" machvec, rather,
we leave this as a default for when no other vector is available,
or when we want to use it in c

sh: Rip out special unknown machvec.

This kills off the BareCPU board as a "special" machvec, rather,
we leave this as a default for when no other vector is available,
or when we want to use it in combination with other vectors for
testing with generic ops. As sh_mv is copied out anyways (or
overloaded when an alternate vector is explicitly selected), this
doesn't consume any additional memory.

The generic machvec can be forcibly selected with sh_mv=generic,
or by not having any other boards enabled.

Signed-off-by: Paul Mundt <[email protected]>

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sh: Kill off machvec aliases.

We now throw all of the machvecs in to .machvec.init and either
select one on the command line, or copy out the first (and
usually only) one to sh_mv. The rest are free

sh: Kill off machvec aliases.

We now throw all of the machvecs in to .machvec.init and either
select one on the command line, or copy out the first (and
usually only) one to sh_mv. The rest are freed as usual.

This gets rid of all of the silly sh_mv aliasing and makes the
selection explicit rather than link-order dependent.

Signed-off-by: Paul Mundt <[email protected]>

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sh: Fixup machvec support.

This fixes up much of the machvec handling, allowing for it to be
overloaded on boot. Making practical use of this still requires
some Kconfig munging, however.

Signed-of

sh: Fixup machvec support.

This fixes up much of the machvec handling, allowing for it to be
overloaded on boot. Making practical use of this still requires
some Kconfig munging, however.

Signed-off-by: Paul Mundt <[email protected]>

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