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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4 |
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| #
82b143ae |
| 05-Feb-2024 |
Helge Deller <[email protected]> |
Revert "parisc: Only list existing CPUs in cpu_possible_mask"
This reverts commit 0921244f6f4f0d05698b953fe632a99b38907226.
It broke CPU hotplugging because it modifies the __cpu_possible_mask afte
Revert "parisc: Only list existing CPUs in cpu_possible_mask"
This reverts commit 0921244f6f4f0d05698b953fe632a99b38907226.
It broke CPU hotplugging because it modifies the __cpu_possible_mask after bootup, so that it will be different than nr_cpu_ids, which then effictively breaks the workqueue setup code and triggers crashes when shutting down CPUs at runtime.
Guenter was the first who noticed the wrong values in __cpu_possible_mask, since the cpumask Kunit tests were failig.
Reverting this commit fixes both issues, but sadly brings back this uncritical runtime warning: register_cpu_capacity_sysctl: too early to get CPU4 device!
Signed-off-by: Helge Deller <[email protected]> Reported-by: Guenter Roeck <[email protected]> Link: https://lkml.org/lkml/2024/2/4/146 Link: https://lore.kernel.org/lkml/[email protected]/t/ Cc: [email protected] # 6.0+
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Revision tags: v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2 |
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721d28f3 |
| 16-Nov-2023 |
Kees Cook <[email protected]> |
parisc: Replace strlcpy() with strscpy()
strlcpy() reads the entire source buffer first. This read may exceed the destination size limit. This is both inefficient and can lead to linear read overflo
parisc: Replace strlcpy() with strscpy()
strlcpy() reads the entire source buffer first. This read may exceed the destination size limit. This is both inefficient and can lead to linear read overflows if a source string is not NUL-terminated[1]. Additionally, it returns the size of the source string, not the resulting size of the destination string. In an effort to remove strlcpy() completely[2], replace strlcpy() here with strscpy().
Link: https://www.kernel.org/doc/html/latest/process/deprecated.html#strlcpy [1] Link: https://github.com/KSPP/linux/issues/89 [2] Cc: "James E.J. Bottomley" <[email protected]> Cc: Helge Deller <[email protected]> Cc: Azeem Shaikh <[email protected]> Cc: [email protected] Signed-off-by: Kees Cook <[email protected]> Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v6.7-rc1, v6.6 |
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b63b4f1a |
| 23-Oct-2023 |
Helge Deller <[email protected]> |
parisc: Show default CPU PSW.W setting as reported by PDC
The last word shows the default PSW.W setting.
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1 |
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e5ef93d0 |
| 07-Sep-2023 |
Helge Deller <[email protected]> |
parisc: BTLB: Initialize BTLB tables at CPU startup
Initialize the BTLB entries when starting up a CPU. Note that BTLBs are not available on 64-bit CPUs.
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v6.5, v6.5-rc7 |
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9f5ba4b3 |
| 18-Aug-2023 |
Helge Deller <[email protected]> |
parisc: Fix /proc/cpuinfo output for lscpu
The lscpu command is broken since commit cab56b51ec0e ("parisc: Fix device names in /proc/iomem") added the PA pathname to all PA devices, includig the CPU
parisc: Fix /proc/cpuinfo output for lscpu
The lscpu command is broken since commit cab56b51ec0e ("parisc: Fix device names in /proc/iomem") added the PA pathname to all PA devices, includig the CPUs.
lscpu parses /proc/cpuinfo and now believes it found different CPU types since every CPU is listed with an unique identifier (PA pathname).
Fix this problem by simply dropping the PA pathname when listing the CPUs in /proc/cpuinfo. There is no need to show the pathname in this procfs file.
Fixes: cab56b51ec0e ("parisc: Fix device names in /proc/iomem") Signed-off-by: Helge Deller <[email protected]> Cc: <[email protected]> # v4.9+
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Revision tags: v6.5-rc6 |
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2c9227fd |
| 10-Aug-2023 |
Helge Deller <[email protected]> |
parisc: processor: Include asm/smp.h for init_per_cpu()
Fix sparse warning that init_per_cpu() isn't declared.
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1 |
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5f0c791d |
| 30-Jun-2023 |
Helge Deller <[email protected]> |
parisc: processor: Fix kdoc for init_cpu_profiler()
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2 |
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4934fbfb |
| 21-Oct-2022 |
Helge Deller <[email protected]> |
parisc: Show MPE/iX model string at bootup
Some (mostly 64-bit machines) machines allow to run MPE/iX and report the MPE model string via firmware call. Enhance the pdc_model_sysmodel() function to
parisc: Show MPE/iX model string at bootup
Some (mostly 64-bit machines) machines allow to run MPE/iX and report the MPE model string via firmware call. Enhance the pdc_model_sysmodel() function to report that model string. Note that some 32-bit machines like the B160L wrongly report success for the firmware call, so include a check to prevent showing wrong info.
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1 |
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6ba68836 |
| 01-Jun-2022 |
Mikulas Patocka <[email protected]> |
parisc: fix a crash with multicore scheduler
With the kernel 5.18, the system will hang on boot if it is compiled with CONFIG_SCHED_MC. The last printed message is "Brought up 1 node, 1 CPU".
The c
parisc: fix a crash with multicore scheduler
With the kernel 5.18, the system will hang on boot if it is compiled with CONFIG_SCHED_MC. The last printed message is "Brought up 1 node, 1 CPU".
The crash happens in sd_init tl->mask (which is cpu_coregroup_mask) returns an empty mask. This happens because cpu_topology[0].core_sibling is empty. Consequently, sd_span is set to an empty mask sd_id = cpumask_first(sd_span) sets sd_id == NR_CPUS (because the mask is empty) sd->shared = *per_cpu_ptr(sdd->sds, sd_id); sets sd->shared to NULL because sd_id is out of range atomic_inc(&sd->shared->ref); crashes without printing anything
We can fix it by calling reset_cpu_topology() from init_cpu_topology() - this will initialize the sibling masks on CPUs, so that they're not empty.
This patch also removes the variable "dualcores_found", it is useless, because during boot, init_cpu_topology is called before store_cpu_topology. Thus, set_sched_topology(parisc_mc_topology) is never called. We don't need to call it at all because default_topology in kernel/sched/topology.c contains the same items as parisc_mc_topology.
Note that we should not call store_cpu_topology() from init_per_cpu() because it is called too early in the kernel initialization process and it results in the message "Failure to register CPU0 device". Before this patch, store_cpu_topology() would exit immediatelly because cpuid_topo->core id was uninitialized and it was 0.
Signed-off-by: Mikulas Patocka <[email protected]> Cc: [email protected] # v5.18 Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1 |
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5b89966b |
| 03-Apr-2022 |
Helge Deller <[email protected]> |
parisc: Merge model and model name into one line in /proc/cpuinfo
The Linux tool "lscpu" shows the double amount of CPUs if we have "model" and "model name" in two different lines in /proc/cpuinfo.
parisc: Merge model and model name into one line in /proc/cpuinfo
The Linux tool "lscpu" shows the double amount of CPUs if we have "model" and "model name" in two different lines in /proc/cpuinfo. This change combines the model and the model name into one line.
Signed-off-by: Helge Deller <[email protected]> Cc: [email protected]
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0921244f |
| 01-Apr-2022 |
Helge Deller <[email protected]> |
parisc: Only list existing CPUs in cpu_possible_mask
The inventory knows which CPUs are in the system, so this bitmask should be in cpu_possible_mask instead of the bitmask based on CONFIG_NR_CPUS.
parisc: Only list existing CPUs in cpu_possible_mask
The inventory knows which CPUs are in the system, so this bitmask should be in cpu_possible_mask instead of the bitmask based on CONFIG_NR_CPUS.
Reset the cpu_possible_mask before scanning the system for CPUs, and mark each existing CPU as possible during initialization of that CPU.
This avoids those warnings later on too:
register_cpu_capacity_sysctl: too early to get CPU4 device!
Signed-off-by: Helge Deller <[email protected]> Noticed-by: John David Anglin <[email protected]>
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beb48dfd |
| 26-Mar-2022 |
Helge Deller <[email protected]> |
parisc: Move CPU startup-related functions into .text section
If CONFIG_HOTPLUG_CPU is enabled, those functions will be run again after bootup. So they need to reside in the .text section.
Signed-o
parisc: Move CPU startup-related functions into .text section
If CONFIG_HOTPLUG_CPU is enabled, those functions will be run again after bootup. So they need to reside in the .text section.
Signed-off-by: Helge Deller <[email protected]>
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62773112 |
| 24-Mar-2022 |
Helge Deller <[email protected]> |
parisc: Switch from GENERIC_CPU_DEVICES to GENERIC_ARCH_TOPOLOGY
Switch away from the own cpu topology code to common code which is used by ARM64 and RISCV. That will allow us to enable CPU hotplug
parisc: Switch from GENERIC_CPU_DEVICES to GENERIC_ARCH_TOPOLOGY
Switch away from the own cpu topology code to common code which is used by ARM64 and RISCV. That will allow us to enable CPU hotplug later on.
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1 |
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93346da8 |
| 24-Oct-2020 |
Helge Deller <[email protected]> |
parisc: Drop loops_per_jiffy from per_cpu struct
There is no need to keep a loops_per_jiffy value per cpu. Drop it.
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6 |
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02addaea |
| 23-Mar-2020 |
Qais Yousef <[email protected]> |
parisc: Replace cpu_up/down() with add/remove_cpu()
The core device API performs extra housekeeping bits that are missing from directly calling cpu_up/down().
See commit a6717c01ddc2 ("powerpc/rtas
parisc: Replace cpu_up/down() with add/remove_cpu()
The core device API performs extra housekeeping bits that are missing from directly calling cpu_up/down().
See commit a6717c01ddc2 ("powerpc/rtas: use device model APIs and serialization during LPM") for an example description of what might go wrong.
This also prepares to make cpu_up/down() a private interface of the CPU subsystem.
Signed-off-by: Qais Yousef <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Acked-by: Helge Deller <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
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Revision tags: v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3 |
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de6cc651 |
| 27-May-2019 |
Thomas Gleixner <[email protected]> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 153
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify it under the terms of th
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 153
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 675 mass ave cambridge ma 02139 usa
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-or-later
has been chosen to replace the boilerplate/reference in 77 file(s).
Signed-off-by: Thomas Gleixner <[email protected]> Reviewed-by: Allison Randal <[email protected]> Reviewed-by: Armijn Hemel <[email protected]> Reviewed-by: Richard Fontana <[email protected]> Cc: [email protected] Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v5.2-rc2, v5.2-rc1 |
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d9888369 |
| 10-May-2019 |
Helge Deller <[email protected]> |
parisc: Use __ro_after_init in processor.c
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5 |
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0e4db23e |
| 09-Apr-2019 |
Helge Deller <[email protected]> |
parisc: Show n/a if product number not available
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v5.1-rc4, v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6 |
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8207d4ee |
| 08-Feb-2019 |
Helge Deller <[email protected]> |
parisc: Show machine product number during boot
Ask PDC firmware during boot for the original and current product number as well as the serial number and show it (if available).
Signed-off-by: Helg
parisc: Show machine product number during boot
Ask PDC firmware during boot for the original and current product number as well as the serial number and show it (if available).
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20, v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1, v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6, v4.19-rc5, v4.19-rc4, v4.19-rc3, v4.19-rc2, v4.19-rc1 |
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dbf2a4b1 |
| 21-Aug-2018 |
Helge Deller <[email protected]> |
parisc: Add hardware description to stack traces
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v4.18, v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4, v4.18-rc3, v4.18-rc2, v4.18-rc1, v4.17, v4.17-rc7, v4.17-rc6, v4.17-rc5, v4.17-rc4, v4.17-rc3, v4.17-rc2, v4.17-rc1, v4.16, v4.16-rc7, v4.16-rc6, v4.16-rc5, v4.16-rc4, v4.16-rc3, v4.16-rc2, v4.16-rc1, v4.15, v4.15-rc9, v4.15-rc8, v4.15-rc7, v4.15-rc6, v4.15-rc5, v4.15-rc4, v4.15-rc3, v4.15-rc2, v4.15-rc1, v4.14, v4.14-rc8, v4.14-rc7, v4.14-rc6, v4.14-rc5, v4.14-rc4, v4.14-rc3, v4.14-rc2 |
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bf7b4c1b |
| 21-Sep-2017 |
Helge Deller <[email protected]> |
parisc: Add CPU topology support
Add topology support, including multi-core scheduler support on PA8800/PA8900 CPUs and enhanced output in /proc/cpuinfo, e.g. lscpu now reports on a single-socket, d
parisc: Add CPU topology support
Add topology support, including multi-core scheduler support on PA8800/PA8900 CPUs and enhanced output in /proc/cpuinfo, e.g. lscpu now reports on a single-socket, dual-core machine:
Architecture: parisc64 CPU(s): 2 On-line CPU(s) list: 0,1 Thread(s) per core: 1 Core(s) per socket: 2 Socket(s): 1 CPU family: PA-RISC 2.0 Model name: PA8800 (Mako)
Signed-off-by: Helge Deller <[email protected]>
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a7e6601f |
| 21-Sep-2017 |
Helge Deller <[email protected]> |
parisc: Move init_per_cpu() into init section
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v4.14-rc1, v4.13, v4.13-rc7 |
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6c706b93 |
| 21-Aug-2017 |
Helge Deller <[email protected]> |
parisc/core: Fix section mismatches
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v4.13-rc6, v4.13-rc5 |
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1ed4714f |
| 10-Aug-2017 |
Helge Deller <[email protected]> |
parisc/random: Add machine specific randomness
Add some machine-specific information like values of cr16 cycle counter, machine-specific software ID and machine model to the random generator.
Signe
parisc/random: Add machine specific randomness
Add some machine-specific information like values of cr16 cycle counter, machine-specific software ID and machine model to the random generator.
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v4.13-rc4, v4.13-rc3, v4.13-rc2, v4.13-rc1, v4.12, v4.12-rc7, v4.12-rc6, v4.12-rc5, v4.12-rc4, v4.12-rc3, v4.12-rc2, v4.12-rc1, v4.11, v4.11-rc8, v4.11-rc7, v4.11-rc6, v4.11-rc5, v4.11-rc4, v4.11-rc3, v4.11-rc2, v4.11-rc1, v4.10, v4.10-rc8, v4.10-rc7, v4.10-rc6, v4.10-rc5, v4.10-rc4, v4.10-rc3 |
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| #
c8c37359 |
| 08-Jan-2017 |
Helge Deller <[email protected]> |
parisc: Enhance detection of synchronous cr16 clocksources
The cr16 clocks of the physical PARISC CPUs are usually nonsynchronous. Nevertheless, it seems that each CPU socket (which holds two cores)
parisc: Enhance detection of synchronous cr16 clocksources
The cr16 clocks of the physical PARISC CPUs are usually nonsynchronous. Nevertheless, it seems that each CPU socket (which holds two cores) of PA8800 and PA8900 CPUs (e.g. in a C8000 workstation) is fed by the same clock source, which makes the cr16 clocks of each CPU socket syncronous. Let's try to detect such situations and mark the cr16 clocksource stable on single-socket and single-core machines.
Signed-off-by: Helge Deller <[email protected]>
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