MIPS: Add a blank line after __HEAD

Add a blank line after __HEAD in the text section.

The __HEAD symbol was added in commit 52892ed6b03a ("MIPS:
Place __kernel_entry at the beginning of text secti

MIPS: Add a blank line after __HEAD

Add a blank line after __HEAD in the text section.

The __HEAD symbol was added in commit 52892ed6b03a ("MIPS:
Place __kernel_entry at the beginning of text section").

Signed-off-by: Rong Xu <[email protected]>
Suggested-by: Maciej W. Rozycki <[email protected]>

---Changelog--
Added suggested-by.

Signed-off-by: Thomas Bogendoerfer <[email protected]>

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MIPS: Place __kernel_entry at the beginning of text section

Mark __kernel_entry as ".head.text" and place HEAD_TEXT before
TEXT_TEXT in the linker script. This ensures that __kernel_entry
will be pl

MIPS: Place __kernel_entry at the beginning of text section

Mark __kernel_entry as ".head.text" and place HEAD_TEXT before
TEXT_TEXT in the linker script. This ensures that __kernel_entry
will be placed at the beginning of text section.

Drop mips from scripts/head-object-list.txt.

Signed-off-by: Rong Xu <[email protected]>
Reported-by: Chris Packham <[email protected]>
Closes: https://lore.kernel.org/lkml/[email protected]/T/
Tested-by: Chris Packham <[email protected]>
Signed-off-by: Masahiro Yamada <[email protected]>

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MIPS: of: Introduce helper function to get DTB

Selection of the DTB to be used was burried in more or less readable
code in head.S. Move this code into a inline helper function and
use it.

Signed-o

MIPS: of: Introduce helper function to get DTB

Selection of the DTB to be used was burried in more or less readable
code in head.S. Move this code into a inline helper function and
use it.

Signed-off-by: Thomas Bogendoerfer <[email protected]>
Acked-by: Florian Fainelli <[email protected]>

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MIPS: Loongson-3: Enable COP2 usage in kernel

Loongson-3's COP2 is Multi-Media coprocessor, it is disabled in kernel
mode by default. However, gslq/gssq (16-bytes load/store instructions)
overrides

MIPS: Loongson-3: Enable COP2 usage in kernel

Loongson-3's COP2 is Multi-Media coprocessor, it is disabled in kernel
mode by default. However, gslq/gssq (16-bytes load/store instructions)
overrides the instruction format of lwc2/swc2. If we wan't to use gslq/
gssq for optimization in kernel, we should enable COP2 usage in kernel.

Please pay attention that in this patch we only enable COP2 in kernel,
which means it will lose ST0_CU2 when a process go to user space (try
to use COP2 in user space will trigger an exception and then grab COP2,
which is similar to FPU). And as a result, we need to modify the context
switching code because the new scheduled process doesn't contain ST0_CU2
in its THERAD_STATUS probably.

For zboot, we disable gslq/gssq be generated by toolchain.

Signed-off-by: Huacai Chen <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>

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MIPS: head.S: Init fw_passed_dtb to builtin DTB

Init the 'fw_passed_dtb' pointer to the buit-in Device Tree blob when it
has been compiled in with CONFIG_BUILTIN_DTB.

Signed-off-by: Paul Cercueil <

MIPS: head.S: Init fw_passed_dtb to builtin DTB

Init the 'fw_passed_dtb' pointer to the buit-in Device Tree blob when it
has been compiled in with CONFIG_BUILTIN_DTB.

Signed-off-by: Paul Cercueil <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>

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MIPS: Clear XContext at boot time

XContext might be dirty at boot time. We need to clear it
to ensure early stackframe is safe.

Signed-off-by: Jiaxun Yang <[email protected]>
Signed-off-by: T

MIPS: Clear XContext at boot time

XContext might be dirty at boot time. We need to clear it
to ensure early stackframe is safe.

Signed-off-by: Jiaxun Yang <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>

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MIPS/head: Store ELF appended dtb in a global variable too

Since commit 15f37e158892 ("MIPS: store the appended
dtb address in a variable"),
in kernels with MIPS_RAW_APPENDED_DTB=y, the early boot c

MIPS/head: Store ELF appended dtb in a global variable too

Since commit 15f37e158892 ("MIPS: store the appended
dtb address in a variable"),
in kernels with MIPS_RAW_APPENDED_DTB=y, the early boot code detects
the dtb and stores it in the 'fw_passed_dtb' variable.

However, the dtb is not stored in 'fw_passed_dtb' in kernels with
MIPS_ELF_APPENDED_DTB=y.

Under MIPS_ELF_APPENDED_DTB=y, the dtb is also located in the
__appended_dtb section, so we just need to update the #ifdef.

This will allow to access the dtb in a more uniform way.

Fixes: 15f37e158892 ("MIPS: store the appended dtb address in a variable")
Signed-off-by: Yasha Cherikovsky <[email protected]>
Signed-off-by: Paul Burton <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/20803/
Cc: Ralf Baechle <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: James Hogan <[email protected]>
Cc: [email protected]
Cc: [email protected]

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MIPS/head: Add comments after #endif and #else

It makes the code more readable, especially in the nested ifdefs.

Signed-off-by: Yasha Cherikovsky <[email protected]>
Signed-off-by: Paul Burton <

MIPS/head: Add comments after #endif and #else

It makes the code more readable, especially in the nested ifdefs.

Signed-off-by: Yasha Cherikovsky <[email protected]>
Signed-off-by: Paul Burton <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/20802/
Cc: Ralf Baechle <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: James Hogan <[email protected]>
Cc: [email protected]
Cc: [email protected]

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MIPS: head: Reorder instructions missing a delay slot

In this sequence the 'move' is assumed in the delay slot of the 'beq',
but head.S is in reorder mode and the former gets pushed one 'nop'
farthe

MIPS: head: Reorder instructions missing a delay slot

In this sequence the 'move' is assumed in the delay slot of the 'beq',
but head.S is in reorder mode and the former gets pushed one 'nop'
farther by the assembler.

The corrected behavior made booting with an UHI supplied dtb erratic.

Fixes: 15f37e158892 ("MIPS: store the appended dtb address in a variable")
Signed-off-by: Karl Beldan <[email protected]>
Reviewed-by: James Hogan <[email protected]>
Cc: Jonas Gorski <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/16614/
Signed-off-by: Ralf Baechle <[email protected]>

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MIPS: store the appended dtb address in a variable

Instead of rewriting the arguments to match the UHI spec, store the
address of a appended or UHI supplied dtb in fw_supplied_dtb.

That way the ori

MIPS: store the appended dtb address in a variable

Instead of rewriting the arguments to match the UHI spec, store the
address of a appended or UHI supplied dtb in fw_supplied_dtb.

That way the original bootloader arugments are kept intact while still
making the use of an appended dtb invisible for mach code.

Mach code can still find out if it is an appended dtb by comparing
fw_arg1 with fw_supplied_dtb.

Signed-off-by: Jonas Gorski <[email protected]>
Cc: Kevin Cernekee <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: John Crispin <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: James Hogan <[email protected]>
Cc: Alban Bedel <[email protected]>
Cc: Daniel Gimpelevich <[email protected]>
Cc: Antony Pavlov <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/13699/
Signed-off-by: Ralf Baechle <[email protected]>

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MIPS: Remove redundant asm/pgtable-bits.h inclusions

asm/pgtable-bits.h is included in 2 assembly files and thus has to
ifdef around C code, however nothing defined by the header is used
in either o

MIPS: Remove redundant asm/pgtable-bits.h inclusions

asm/pgtable-bits.h is included in 2 assembly files and thus has to
ifdef around C code, however nothing defined by the header is used
in either of the assembly files that include it.

Remove the redundant inclusions such that asm/pgtable-bits.h doesn't
need to #ifdef around C code, for cleanliness and in preparation for
later patches which will add more C.

Signed-off-by: Paul Burton <[email protected]>
Reviewed-by: James Hogan <[email protected]>
Cc: Maciej W. Rozycki <[email protected]>
Cc: Jonas Gorski <[email protected]>
Cc: Alex Smith <[email protected]>
Cc: Kirill A. Shutemov <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/13114/
Signed-off-by: Ralf Baechle <[email protected]>

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MIPS: Call relocate_kernel if CONFIG_RELOCATABLE=y

If CONFIG_RELOCATABLE is enabled, call relocate_kernel.

This function will return the entry point of the relocated kernel if
copy/relocate is suce

MIPS: Call relocate_kernel if CONFIG_RELOCATABLE=y

If CONFIG_RELOCATABLE is enabled, call relocate_kernel.

This function will return the entry point of the relocated kernel if
copy/relocate is sucessful or the original entry point if not. The stack
pointer must then be pointed into the new image.

Signed-off-by: Matt Redfearn <[email protected]>
Cc: Jonas Gorski <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/12984/
Signed-off-by: Ralf Baechle <[email protected]>

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MIPS: Add support for vmlinux.bin appended dtb

Add support for detecting a vmlinux.bin appended dtb and overriding
the boot arguments to match the UHI interface.

Due to the PERCPU section being emp

MIPS: Add support for vmlinux.bin appended dtb

Add support for detecting a vmlinux.bin appended dtb and overriding
the boot arguments to match the UHI interface.

Due to the PERCPU section being empty for !SMP, but still modifying
the current address by aligning it to the page size, do not define
it for !SMP builds to allow __appended_dtb to still point to
the actual end of the data.

Signed-off-by: Jonas Gorski <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: John Crispin <[email protected]>
Cc: Kevin Cernekee <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: Aaro Koskinen <[email protected]>
Cc: Markos Chandras <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: James Hartley <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/9739/
Signed-off-by: Ralf Baechle <[email protected]>

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MIPS: MT: Remove SMTC support

Nobody is maintaining SMTC anymore and there also seems to be no userbase.
Which is a pity - the SMTC technology primarily developed by Kevin D.
Kissell <kevink@paralog

MIPS: MT: Remove SMTC support

Nobody is maintaining SMTC anymore and there also seems to be no userbase.
Which is a pity - the SMTC technology primarily developed by Kevin D.
Kissell <[email protected]> is an ingenious demonstration for the MT
ASE's power and elegance.

Based on Markos Chandras <[email protected]> patch
https://patchwork.linux-mips.org/patch/6719/ which while very similar did
no longer apply cleanly when I tried to merge it plus some additional
post-SMTC cleanup - SMTC was a feature as tricky to remove as it was to
merge once upon a time.

Signed-off-by: Ralf Baechle <[email protected]>

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MIPS: malta: Add support for SMP EVA

Allow secondary cores to program their segment control registers
during smp bootstrap code. This enables EVA on Malta SMP
configurations

Signed-off-by: Markos C

MIPS: malta: Add support for SMP EVA

Allow secondary cores to program their segment control registers
during smp bootstrap code. This enables EVA on Malta SMP
configurations

Signed-off-by: Markos Chandras <[email protected]>

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MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code

commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.

The __cpuinit type of throwaway sections might have made sense
some time ago when RAM

MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code

commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.

The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.

After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.

Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings. In any case, they are temporary and harmless.

Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files. MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.

[1] https://lkml.org/lkml/2013/5/20/589

[[email protected]: Folded in Paul's followup fix.]

Signed-off-by: Paul Gortmaker <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/
Signed-off-by: Ralf Baechle <[email protected]>

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MIPS: Move gas macro MAPPED_KERNEL_SETUP_TLB to IP27-specific code.

It's IP27-specific and can only cause trouble in head.S.

Signed-off-by: Ralf Baechle <[email protected]>

MIPS: Whitespace cleanup.

Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-b

MIPS: Whitespace cleanup.

Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle <[email protected]>

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MIPS: Don't include <asm/page.h> unnecessarily.

So far we're jumping through hoops to keep the file usable from assembler
source but it's getting just too painful. Turns out that many uses of
<asm/

MIPS: Don't include <asm/page.h> unnecessarily.

So far we're jumping through hoops to keep the file usable from assembler
source but it's getting just too painful. Turns out that many uses of
<asm/page.h> are unnecessary anyway, so just remove those.

Signed-off-by: Ralf Baechle <[email protected]>

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MIPS: Avoid potential hazard on Context register

set_saved_sp reads Context register. Avoid reading stale value from
earlier incomplete write.

Issue found and fixed for head.S by Chris Dearman <chr

MIPS: Avoid potential hazard on Context register

set_saved_sp reads Context register. Avoid reading stale value from
earlier incomplete write.

Issue found and fixed for head.S by Chris Dearman <[email protected]>.

Signed-off-by: Chris Dearman <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>

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MIPS: Avoid clobbering struct pt_regs in kthreads

The resume() implementation octeon_switch.S examines the saved cp0_status
register. We were clobbering the entire pt_regs structure in kernel
threa

MIPS: Avoid clobbering struct pt_regs in kthreads

The resume() implementation octeon_switch.S examines the saved cp0_status
register. We were clobbering the entire pt_regs structure in kernel
threads leading to random crashes.

When switching away from a kernel thread, the saved cp0_status is examined
and if bit 30 is set it is cleared and the CP2 state saved into the pt_regs
structure. Since the kernel thread stack overlaid the pt_regs structure
this resulted in a corrupt stack. When the kthread with the corrupt stack
was resumed, it could crash if it used any of the data in the stack that was
clobbered.

We fix it by moving the kernel thread stack down so it doesn't overlay
pt_regs.

Signed-off-by: David Daney <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>

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[MIPS] IP27: Fix build errors if CONFIG_MAPPED_KERNEL=y

Signed-off-by: Ralf Baechle <[email protected]>

[MIPS] Fix loads of section missmatches

Signed-off-by: Ralf Baechle <[email protected]>

[MIPS] Fix build after b0rked changes to <linux/init.h>.

Commit 312b1485fb509c9bc32eda28ad29537896658cb8 made __INIT_REFOK expand
into .section .section ".ref.text", "ax". Since the assembler doesn

[MIPS] Fix build after b0rked changes to <linux/init.h>.

Commit 312b1485fb509c9bc32eda28ad29537896658cb8 made __INIT_REFOK expand
into .section .section ".ref.text", "ax". Since the assembler doesn't
tolerate stuttering in the source that broke all MIPS builds.

Since with this change Sam downgraded __INIT_REFOK the best fix is to
get replace it by the modern days operator. With MIPS the only user
of __INIT_REFOK and __INITDATA_REFOK (which was equally broken) being
unused anyway these can be deleted but that's subject of a separate
commit.

Signed-off-by: Ralf Baechle <[email protected]>

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[MIPS] Fix CONFIG_BOOT_RAW.

This was broken by 017e3a492683b32d17dcd1b13b279745cc656073 (lmo) /
396a2ae08e5080b140330645743ab2567f6bc426 (kernel.org).

Signed-off-by: Ralf Baechle <[email protected]

[MIPS] Fix CONFIG_BOOT_RAW.

This was broken by 017e3a492683b32d17dcd1b13b279745cc656073 (lmo) /
396a2ae08e5080b140330645743ab2567f6bc426 (kernel.org).

Signed-off-by: Ralf Baechle <[email protected]>

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