mips: generic: add fdt fixup for Realtek reference board

The bootloader used on the Realtek RTL9302C boards is an ancient vendor
fork of U-Boot that doesn't understand device trees. So to run a mode

mips: generic: add fdt fixup for Realtek reference board

The bootloader used on the Realtek RTL9302C boards is an ancient vendor
fork of U-Boot that doesn't understand device trees. So to run a modern
kernel it is necessary use one of the APPENDED_DTB options.

When appending the DTB the inintrd information, if present, needs to be
inserted into the /chosen device tree node. The bootloader provides the
initrd start/size via the firmware environment. Add a fdt fixup that
will update the device tree with the initrd information.

Signed-off-by: Chris Packham <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>

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MIPS: Share generic kernel code with other architecture

Some architectures might seek to utilize a significant portion of the
generic kernel code while maintaining independence from the generic
kern

MIPS: Share generic kernel code with other architecture

Some architectures might seek to utilize a significant portion of the
generic kernel code while maintaining independence from the generic
kernel due to specific peculiarities.

This patch allows for the reuse of core code, preventing unnecessary
duplication.

Suggested-by: Thomas Bogendoerfer <[email protected]>
Reviewed-by: Jiaxun Yang <[email protected]>
Signed-off-by: Gregory CLEMENT <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>

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MIPS: generic: Add support for Ingenic SoCs

Add support for Ingenic SoCs in arch/mips/generic/.

The Kconfig changes are here to ensure that it is possible to compile
either a generic kernel that su

MIPS: generic: Add support for Ingenic SoCs

Add support for Ingenic SoCs in arch/mips/generic/.

The Kconfig changes are here to ensure that it is possible to compile
either a generic kernel that supports Ingenic SoCs, or a Ingenic-only
kernel, both using the same code base, to avoid duplicated code.

Signed-off-by: Paul Cercueil <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>

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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

Based on 1 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of th

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

Based on 1 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 3029 file(s).

Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Allison Randal <[email protected]>
Cc: [email protected]
Link: https://lkml.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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MIPS: kexec: Use prepare method from Generic for UHI platforms

Out-of-tree platforms may not be based on Generic as shown in customer
communication. Share the prepare method with all using UHI boot

MIPS: kexec: Use prepare method from Generic for UHI platforms

Out-of-tree platforms may not be based on Generic as shown in customer
communication. Share the prepare method with all using UHI boot protocol,
and put into machine_kexec.c.

The benefit is that, when having kexec_args related problems, developers
will naturally look into machine_kexec.c, where "CONFIG_UHI_BOOT" will be
found, prompting them to add "select UHI_BOOT" to the platform Kconfig. It
would otherwise require a lot debugging or online searching to be aware
that the solution is in Generic code.

Tested-by: Rachel Mozes <[email protected]>
Reported-by: Rachel Mozes <[email protected]>
Signed-off-by: Dengcheng Zhu <[email protected]>
Signed-off-by: Paul Burton <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/20569/
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]

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MIPS: generic: Add support for Microsemi Ocelot

Introduce support for the MIPS based Microsemi Ocelot SoCs.

Signed-off-by: Alexandre Belloni <[email protected]>
Cc: Ralf Baechle <ralf@l

MIPS: generic: Add support for Microsemi Ocelot

Introduce support for the MIPS based Microsemi Ocelot SoCs.

Signed-off-by: Alexandre Belloni <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: Allan Nielsen <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/18858/
[[email protected]: update ocelot_defconfig specification]
Signed-off-by: James Hogan <[email protected]>

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MIPS: generic: Fix Makefile alignment

Fix whitespace of generic platform Makefile so that obj-y values align.

Fixes: f2d0b0d5c171 ("MIPS: ranchu: Add Ranchu as a new generic-based board")
Signed-of

MIPS: generic: Fix Makefile alignment

Fix whitespace of generic platform Makefile so that obj-y values align.

Fixes: f2d0b0d5c171 ("MIPS: ranchu: Add Ranchu as a new generic-based board")
Signed-off-by: James Hogan <[email protected]>
Reviewed-by: Paul Burton <[email protected]>
Reviewed-by: Matt Redfearn <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: Miodrag Dinic <[email protected]>
Cc: Goran Ferenc <[email protected]>
Cc: Aleksandar Markovic <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/18582/

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MIPS: ranchu: Add Ranchu as a new generic-based board

Provide amendments to the MIPS generic platform framework so that
the new generic-based board Ranchu can be chosen to be built.

The Ranchu boar

MIPS: ranchu: Add Ranchu as a new generic-based board

Provide amendments to the MIPS generic platform framework so that
the new generic-based board Ranchu can be chosen to be built.

The Ranchu board is intended to be used by Android emulator. The name
"Ranchu" originates from Android development community. "Goldfish" and
"Ranchu" are terms used for two generations of virtual boards used by
Android emulator. The name "Ranchu" is a newer one among the two, and
this patch deals with Ranchu. However, for historical reasons, some
devices/drivers still contain the name "Goldfish".

MIPS Ranchu machine includes a number of Goldfish devices. The support
for Virtio devices is also included. Ranchu board supports up to 16
Virtio devices which can be attached using Virtio MMIO Bus. This is
summarized in the following picture:

ABUS
||----MIPS CPU
|| | IRQs
||----Goldfish PIC------------(32)--------
|| | | | | | | | | |
||----Goldfish TTY------ | | | | | | | |
|| | | | | | | | |
||----Goldfish RTC-------- | | | | | | |
|| | | | | | | |
||----Goldfish FB----------- | | | | | |
|| | | | | | |
||----Goldfish Events--------- | | | | |
|| | | | | |
||----Goldfish Audio------------ | | | |
|| | | | |
||----Goldfish Battery------------ | | |
|| | | |
||----Android PIPE------------------ | |
|| | |
||----Virtio MMIO Bus | |
|| | | | | |
|| | | (virtio-block)--------- |
|| (16) | |
|| | (virtio-net)------------------

Device Tree is created on the QEMU side based on the information about
devices IO map and IRQ numbers. Kernel will load this DTB using UHI
boot protocol DTB handover mode.

Signed-off-by: Miodrag Dinic <[email protected]>
Signed-off-by: Goran Ferenc <[email protected]>
Signed-off-by: Aleksandar Markovic <[email protected]>
Reviewed-by: James Hogan <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/18138/
Signed-off-by: James Hogan <[email protected]>

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Update MIPS email addresses

MIPS will soon not be a part of Imagination Technologies, and as such
many @imgtec.com email addresses will no longer be valid. This patch
updates the addresses for those

Update MIPS email addresses

MIPS will soon not be a part of Imagination Technologies, and as such
many @imgtec.com email addresses will no longer be valid. This patch
updates the addresses for those who:

- Have 10 or more patches in mainline authored using an @imgtec.com
email address, or any patches dated within the past year.

- Are still with Imagination but leaving as part of the MIPS business
unit, as determined from an internal email address list.

- Haven't already updated their email address (ie. JamesH) or expressed
a desire to be excluded (ie. Maciej).

- Acked v2 or earlier of this patch, which leaves Deng-Cheng, Matt &
myself.

New addresses are of the form [email protected], and all
verified against an internal email address list. An entry is added to
.mailmap for each person such that get_maintainer.pl will report the new
addresses rather than @imgtec.com addresses which will soon be dead.

Instances of the affected addresses throughout the tree are then
mechanically replaced with the new @mips.com address.

Signed-off-by: Paul Burton <[email protected]>
Cc: Deng-Cheng Zhu <[email protected]>
Cc: Deng-Cheng Zhu <[email protected]>
Acked-by: Dengcheng Zhu <[email protected]>
Cc: Matt Redfearn <[email protected]>
Cc: Matt Redfearn <[email protected]>
Acked-by: Matt Redfearn <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Linus Torvalds <[email protected]>

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Update MIPS email addresses

MIPS will soon not be a part of Imagination Technologies, and as such
many @imgtec.com email addresses will no longer be valid. This patch
updates the addresses for those

Update MIPS email addresses

MIPS will soon not be a part of Imagination Technologies, and as such
many @imgtec.com email addresses will no longer be valid. This patch
updates the addresses for those who:

- Have 10 or more patches in mainline authored using an @imgtec.com
email address, or any patches dated within the past year.

- Are still with Imagination but leaving as part of the MIPS business
unit, as determined from an internal email address list.

- Haven't already updated their email address (ie. JamesH) or expressed
a desire to be excluded (ie. Maciej).

- Acked v2 or earlier of this patch, which leaves Deng-Cheng, Matt &
myself.

New addresses are of the form [email protected], and all
verified against an internal email address list. An entry is added to
.mailmap for each person such that get_maintainer.pl will report the new
addresses rather than @imgtec.com addresses which will soon be dead.

Instances of the affected addresses throughout the tree are then
mechanically replaced with the new @mips.com address.

Signed-off-by: Paul Burton <[email protected]>
Cc: Deng-Cheng Zhu <[email protected]>
Cc: Deng-Cheng Zhu <[email protected]>
Acked-by: Dengcheng Zhu <[email protected]>
Cc: Matt Redfearn <[email protected]>
Cc: Matt Redfearn <[email protected]>
Acked-by: Matt Redfearn <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/17540/
Signed-off-by: James Hogan <[email protected]>

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MIPS: generic/yamon-dt: Pull YAMON DT shim code out of SEAD-3 board

In preparation for supporting other YAMON-using boards (Malta) & sharing
code to translate information from YAMON into device tree

MIPS: generic/yamon-dt: Pull YAMON DT shim code out of SEAD-3 board

In preparation for supporting other YAMON-using boards (Malta) & sharing
code to translate information from YAMON into device tree properties,
pull the code doing so for the kernel command line, system memory &
serial configuration out of the SEAD-3 board code.

Signed-off-by: Paul Burton <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/16181/
Signed-off-by: Ralf Baechle <[email protected]>

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MIPS: generic/kexec: add support for a DTB passed in a separate buffer

Signed-off-by: Marcin Nowakowski <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linu

MIPS: generic/kexec: add support for a DTB passed in a separate buffer

Signed-off-by: Marcin Nowakowski <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/14615/
Signed-off-by: Ralf Baechle <[email protected]>

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MIPS: generic: Convert SEAD-3 to a generic board

Convert the MIPS SEAD-3 board support to be a generic board, supported
by generic kernels.

Because the SEAD-3 boot protocol was defined long ago and

MIPS: generic: Convert SEAD-3 to a generic board

Convert the MIPS SEAD-3 board support to be a generic board, supported
by generic kernels.

Because the SEAD-3 boot protocol was defined long ago and we don't want
to force a switch to the UHI protocol, SEAD-3 is added as a legacy board
which is detected by reading the REVISION register. This may technically
not be a valid memory read & future work will include attempting to
handle that gracefully. In practice since SEAD-3 is the only legacy
board supported by the generic kernel so far the read will only happen
on SEAD-3 boards, and even once Malta is converted the same REVISION
register exists there too. Other boards such as Boston, Ci20 & Ci40 will
use the UHI boot protocol & thus not run any of the legacy board detect
functions.

Signed-off-by: Paul Burton <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/14354/
Signed-off-by: Ralf Baechle <[email protected]>

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MIPS: generic: Introduce generic DT-based board support

Introduce a "generic" platform, which aims to be board-agnostic by
making use of device trees passed by the boot protocol defined in the
MIPS

MIPS: generic: Introduce generic DT-based board support

Introduce a "generic" platform, which aims to be board-agnostic by
making use of device trees passed by the boot protocol defined in the
MIPS UHI (Universal Hosting Interface) specification. Provision is made
for supporting boards which use a legacy boot protocol that can't be
changed, but adding support for such boards or any others is left to
followon patches.

Right now the built kernels expect to be loaded to 0x80100000, ie. in
kseg0. This is fine for the vast majority of MIPS platforms, but
nevertheless it would be good to remove this limitation in the future by
mapping the kernel via the TLB such that it can be loaded anywhere & map
itself appropriately.

Configuration is handled by dynamically generating configs using
scripts/kconfig/merge_config.sh, somewhat similar to the way powerpc
makes use of it. This allows for variations upon the configuration, eg.
differing architecture revisions or subsets of driver support for
differing boards, to be handled without having a large number of
defconfig files.

Signed-off-by: Paul Burton <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/14353/
Signed-off-by: Ralf Baechle <[email protected]>

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