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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3 |
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| #
666173ee |
| 23-Jul-2021 |
Jiaxun Yang <[email protected]> |
MIPS: generic: Allow generating FIT image for Marduk board
Marduk is based on IMG pistachio SoC. The platform is using MIPS UHI booting protocol and does have a proper devicetree implement, thus it
MIPS: generic: Allow generating FIT image for Marduk board
Marduk is based on IMG pistachio SoC. The platform is using MIPS UHI booting protocol and does have a proper devicetree implement, thus it could be a part of generic kernel.
Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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Revision tags: v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4 |
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| #
fe005201 |
| 10-Nov-2020 |
Gregory CLEMENT <[email protected]> |
MIPS: mscc: Add serval support
Add a device trees and FIT image support for the Microsemi Serval SoC which belongs to same family of the Ocelot SoC.
It is based on the work of Lars Povlsen <lars.po
MIPS: mscc: Add serval support
Add a device trees and FIT image support for the Microsemi Serval SoC which belongs to same family of the Ocelot SoC.
It is based on the work of Lars Povlsen <[email protected]>.
Signed-off-by: Gregory CLEMENT <[email protected]> Acked-by: Alexandre Belloni <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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f84778f7 |
| 10-Nov-2020 |
Gregory CLEMENT <[email protected]> |
MIPS: mscc: Add jaguar2 support
Add a device trees and FIT image support for the Microsemi Jaguar2 SoC which belongs to same family of the Ocelot SoC.
It is based on the work of Lars Povlsen <lars.
MIPS: mscc: Add jaguar2 support
Add a device trees and FIT image support for the Microsemi Jaguar2 SoC which belongs to same family of the Ocelot SoC.
It is based on the work of Lars Povlsen <[email protected]>.
Signed-off-by: Gregory CLEMENT <[email protected]> Acked-by: Alexandre Belloni <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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378e413f |
| 10-Nov-2020 |
Gregory CLEMENT <[email protected]> |
MIPS: mscc: build FIT image for Luton
Luton now has already an u-boot port so let's build FIT images.
Signed-off-by: Gregory CLEMENT <[email protected]> Acked-by: Alexandre Belloni <alexa
MIPS: mscc: build FIT image for Luton
Luton now has already an u-boot port so let's build FIT images.
Signed-off-by: Gregory CLEMENT <[email protected]> Acked-by: Alexandre Belloni <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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2825f4c0 |
| 10-Nov-2020 |
Gregory CLEMENT <[email protected]> |
MIPS: mscc: Fix configuration name for ocelot legacy boards
Ocelots is supported by the generic MIPS build so make it clears that LEGACY_BOARD_OCELOT is only needed for legacy boards which didn't ha
MIPS: mscc: Fix configuration name for ocelot legacy boards
Ocelots is supported by the generic MIPS build so make it clears that LEGACY_BOARD_OCELOT is only needed for legacy boards which didn't have bootloader supporting device tree.
Signed-off-by: Gregory CLEMENT <[email protected]> Acked-by: Alexandre Belloni <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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700364da |
| 10-Nov-2020 |
Gregory CLEMENT <[email protected]> |
MIPS: mscc: Prepare configuration to handle more SoCs
Ocelot belongs to a family of SoC named the VCore III. In order to add these new Soc, use the new symbol SOC_VCOREIII instead of a one dedicated
MIPS: mscc: Prepare configuration to handle more SoCs
Ocelot belongs to a family of SoC named the VCore III. In order to add these new Soc, use the new symbol SOC_VCOREIII instead of a one dedicated to Ocelot.
In order to avoid regression on driver building, the MSCC_OCELOT configuration symbol is kept until the driver will be converted.
Signed-off-by: Gregory CLEMENT <[email protected]> Acked-by: Alexandre Belloni <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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Revision tags: v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4 |
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| #
f0f4a753 |
| 06-Sep-2020 |
Paul Cercueil <[email protected]> |
MIPS: generic: Add support for Ingenic SoCs
Add support for Ingenic SoCs in arch/mips/generic/.
The Kconfig changes are here to ensure that it is possible to compile either a generic kernel that su
MIPS: generic: Add support for Ingenic SoCs
Add support for Ingenic SoCs in arch/mips/generic/.
The Kconfig changes are here to ensure that it is possible to compile either a generic kernel that supports Ingenic SoCs, or a Ingenic-only kernel, both using the same code base, to avoid duplicated code.
Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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c434b9f8 |
| 06-Sep-2020 |
Paul Cercueil <[email protected]> |
MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbol
The MIPS_GENERIC symbol now won't select any other configuration option. The MIPS_GENERIC_KERNEL will select all the options that the previous MIPS_GENE
MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbol
The MIPS_GENERIC symbol now won't select any other configuration option. The MIPS_GENERIC_KERNEL will select all the options that the previous MIPS_GENERIC option did select, and will select MIPS_GENERIC as well.
The whole point of this, is that it now becomes possible to compile a kernel for a SoC supported by the arch/mips/generic/ code, without making that kernel generic itself.
Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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Revision tags: v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3, v5.2-rc2, v5.2-rc1, v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5, v5.1-rc4, v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6, v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20, v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1, v4.19, v4.19-rc8 |
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| #
39249d77 |
| 08-Oct-2018 |
Quentin Schulz <[email protected]> |
MIPS: mscc: add PCB120 to the ocelot fitImage
PCB120 and PCB123 are both development boards based on Microsemi Ocelot so let's use the same fitImage for both.
Reviewed-by: Alexandre Belloni <alexan
MIPS: mscc: add PCB120 to the ocelot fitImage
PCB120 and PCB123 are both development boards based on Microsemi Ocelot so let's use the same fitImage for both.
Reviewed-by: Alexandre Belloni <[email protected]> Signed-off-by: Quentin Schulz <[email protected]> Signed-off-by: Paul Burton <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/20871/ Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected]
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Revision tags: v4.19-rc7, v4.19-rc6, v4.19-rc5, v4.19-rc4, v4.19-rc3, v4.19-rc2, v4.19-rc1, v4.18, v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4, v4.18-rc3 |
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| #
d5be4aeb |
| 26-Jun-2018 |
Alexandre Belloni <[email protected]> |
mips: mscc: build FIT image for Ocelot
Ocelot now has a u-boot port, allow building FIT images instead of relying on the legacy detection and builtin DTB.
Signed-off-by: Alexandre Belloni <alexandr
mips: mscc: build FIT image for Ocelot
Ocelot now has a u-boot port, allow building FIT images instead of relying on the legacy detection and builtin DTB.
Signed-off-by: Alexandre Belloni <[email protected]> Reviewed-by: James Hogan <[email protected]> Signed-off-by: Paul Burton <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19632/ Cc: Ralf Baechle <[email protected]> Cc: [email protected] Cc: [email protected]
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Revision tags: v4.18-rc2, v4.18-rc1, v4.17, v4.17-rc7, v4.17-rc6, v4.17-rc5, v4.17-rc4, v4.17-rc3, v4.17-rc2, v4.17-rc1, v4.16, v4.16-rc7 |
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| #
6bce3dea |
| 20-Mar-2018 |
Alexandre Belloni <[email protected]> |
MIPS: generic: Add support for Microsemi Ocelot
Introduce support for the MIPS based Microsemi Ocelot SoCs.
Signed-off-by: Alexandre Belloni <[email protected]> Cc: Ralf Baechle <ralf@l
MIPS: generic: Add support for Microsemi Ocelot
Introduce support for the MIPS based Microsemi Ocelot SoCs.
Signed-off-by: Alexandre Belloni <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Allan Nielsen <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/18858/ [[email protected]: update ocelot_defconfig specification] Signed-off-by: James Hogan <[email protected]>
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Revision tags: v4.16-rc6, v4.16-rc5, v4.16-rc4, v4.16-rc3, v4.16-rc2, v4.16-rc1, v4.15, v4.15-rc9, v4.15-rc8, v4.15-rc7, v4.15-rc6 |
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| #
f2d0b0d5 |
| 29-Dec-2017 |
Miodrag Dinic <[email protected]> |
MIPS: ranchu: Add Ranchu as a new generic-based board
Provide amendments to the MIPS generic platform framework so that the new generic-based board Ranchu can be chosen to be built.
The Ranchu boar
MIPS: ranchu: Add Ranchu as a new generic-based board
Provide amendments to the MIPS generic platform framework so that the new generic-based board Ranchu can be chosen to be built.
The Ranchu board is intended to be used by Android emulator. The name "Ranchu" originates from Android development community. "Goldfish" and "Ranchu" are terms used for two generations of virtual boards used by Android emulator. The name "Ranchu" is a newer one among the two, and this patch deals with Ranchu. However, for historical reasons, some devices/drivers still contain the name "Goldfish".
MIPS Ranchu machine includes a number of Goldfish devices. The support for Virtio devices is also included. Ranchu board supports up to 16 Virtio devices which can be attached using Virtio MMIO Bus. This is summarized in the following picture:
ABUS ||----MIPS CPU || | IRQs ||----Goldfish PIC------------(32)-------- || | | | | | | | | | ||----Goldfish TTY------ | | | | | | | | || | | | | | | | | ||----Goldfish RTC-------- | | | | | | | || | | | | | | | ||----Goldfish FB----------- | | | | | | || | | | | | | ||----Goldfish Events--------- | | | | | || | | | | | ||----Goldfish Audio------------ | | | | || | | | | ||----Goldfish Battery------------ | | | || | | | ||----Android PIPE------------------ | | || | | ||----Virtio MMIO Bus | | || | | | | | || | | (virtio-block)--------- | || (16) | | || | (virtio-net)------------------
Device Tree is created on the QEMU side based on the information about devices IO map and IRQ numbers. Kernel will load this DTB using UHI boot protocol DTB handover mode.
Signed-off-by: Miodrag Dinic <[email protected]> Signed-off-by: Goran Ferenc <[email protected]> Signed-off-by: Aleksandar Markovic <[email protected]> Reviewed-by: James Hogan <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/18138/ Signed-off-by: James Hogan <[email protected]>
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Revision tags: v4.15-rc5, v4.15-rc4, v4.15-rc3, v4.15-rc2, v4.15-rc1, v4.14, v4.14-rc8, v4.14-rc7, v4.14-rc6, v4.14-rc5, v4.14-rc4, v4.14-rc3, v4.14-rc2, v4.14-rc1, v4.13, v4.13-rc7, v4.13-rc6, v4.13-rc5, v4.13-rc4, v4.13-rc3, v4.13-rc2, v4.13-rc1, v4.12, v4.12-rc7, v4.12-rc6, v4.12-rc5, v4.12-rc4, v4.12-rc3, v4.12-rc2, v4.12-rc1, v4.11, v4.11-rc8, v4.11-rc7, v4.11-rc6, v4.11-rc5 |
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b35565bb |
| 31-Mar-2017 |
Zubair Lutfullah Kakakhel <[email protected]> |
MIPS: generic: Add support for MIPSfpga
Add support for the MIPSfpga platform to generic kernel.
Signed-off-by: Zubair Lutfullah Kakakhel <[email protected]> Cc: Ralf Baechle <ralf@linux-m
MIPS: generic: Add support for MIPSfpga
Add support for the MIPSfpga platform to generic kernel.
Signed-off-by: Zubair Lutfullah Kakakhel <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/15846/ [[email protected]: Use separate board-xilfpga.its.S. Add 32r2 and little endian requires to board-xilfpga.config] Signed-off-by: James Hogan <[email protected]>
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b2441318 |
| 01-Nov-2017 |
Greg Kroah-Hartman <[email protected]> |
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license identifiers to apply.
- when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary:
SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became the concluded license(s).
- when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time.
In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related.
Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches.
Reviewed-by: Kate Stewart <[email protected]> Reviewed-by: Philippe Ombredanne <[email protected]> Reviewed-by: Thomas Gleixner <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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| #
7aacf86b |
| 18-Jul-2017 |
Nathan Sullivan <[email protected]> |
MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan <[email protected]> Acked-by: Rob Herring <[email protected]> Cc: [email protected]
MIPS: NI 169445 board support
Support the National Instruments 169445 board.
Signed-off-by: Nathan Sullivan <[email protected]> Acked-by: Rob Herring <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/16782/ Signed-off-by: Ralf Baechle <[email protected]>
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6e62a888 |
| 17-Jun-2017 |
Paul Burton <[email protected]> |
MIPS: generic: Support MIPS Boston development boards
Add support for the MIPS Boston development board to generic kernels, which essentially amounts to:
- Adding the device tree source for the M
MIPS: generic: Support MIPS Boston development boards
Add support for the MIPS Boston development board to generic kernels, which essentially amounts to:
- Adding the device tree source for the MIPS Boston board.
- Adding a Kconfig fragment which enables the appropriate drivers for the MIPS Boston board.
With these changes in place generic kernels will support the board by default, and kernels with only the drivers needed for Boston enabled can be configured by setting BOARDS=boston during configuration. For example:
$ make ARCH=mips 64r6el_defconfig BOARDS=boston
Signed-off-by: Paul Burton <[email protected]> Reviewed-by: James Hogan <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/16485/ Signed-off-by: Ralf Baechle <[email protected]>
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571b7e69 |
| 02-Jun-2017 |
Paul Burton <[email protected]> |
MIPS: generic/yamon-dt: Pull YAMON DT shim code out of SEAD-3 board
In preparation for supporting other YAMON-using boards (Malta) & sharing code to translate information from YAMON into device tree
MIPS: generic/yamon-dt: Pull YAMON DT shim code out of SEAD-3 board
In preparation for supporting other YAMON-using boards (Malta) & sharing code to translate information from YAMON into device tree properties, pull the code doing so for the kernel command line, system memory & serial configuration out of the SEAD-3 board code.
Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/16181/ Signed-off-by: Ralf Baechle <[email protected]>
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Revision tags: v4.11-rc4, v4.11-rc3, v4.11-rc2, v4.11-rc1, v4.10, v4.10-rc8, v4.10-rc7, v4.10-rc6, v4.10-rc5, v4.10-rc4, v4.10-rc3, v4.10-rc2, v4.10-rc1, v4.9, v4.9-rc8, v4.9-rc7, v4.9-rc6, v4.9-rc5, v4.9-rc4, v4.9-rc3, v4.9-rc2, v4.9-rc1 |
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3f5f0a44 |
| 05-Oct-2016 |
Paul Burton <[email protected]> |
MIPS: generic: Convert SEAD-3 to a generic board
Convert the MIPS SEAD-3 board support to be a generic board, supported by generic kernels.
Because the SEAD-3 boot protocol was defined long ago and
MIPS: generic: Convert SEAD-3 to a generic board
Convert the MIPS SEAD-3 board support to be a generic board, supported by generic kernels.
Because the SEAD-3 boot protocol was defined long ago and we don't want to force a switch to the UHI protocol, SEAD-3 is added as a legacy board which is detected by reading the REVISION register. This may technically not be a valid memory read & future work will include attempting to handle that gracefully. In practice since SEAD-3 is the only legacy board supported by the generic kernel so far the read will only happen on SEAD-3 boards, and even once Malta is converted the same REVISION register exists there too. Other boards such as Boston, Ci20 & Ci40 will use the UHI boot protocol & thus not run any of the legacy board detect functions.
Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14354/ Signed-off-by: Ralf Baechle <[email protected]>
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eed0eabd |
| 05-Oct-2016 |
Paul Burton <[email protected]> |
MIPS: generic: Introduce generic DT-based board support
Introduce a "generic" platform, which aims to be board-agnostic by making use of device trees passed by the boot protocol defined in the MIPS
MIPS: generic: Introduce generic DT-based board support
Introduce a "generic" platform, which aims to be board-agnostic by making use of device trees passed by the boot protocol defined in the MIPS UHI (Universal Hosting Interface) specification. Provision is made for supporting boards which use a legacy boot protocol that can't be changed, but adding support for such boards or any others is left to followon patches.
Right now the built kernels expect to be loaded to 0x80100000, ie. in kseg0. This is fine for the vast majority of MIPS platforms, but nevertheless it would be good to remove this limitation in the future by mapping the kernel via the TLB such that it can be loaded anywhere & map itself appropriately.
Configuration is handled by dynamically generating configs using scripts/kconfig/merge_config.sh, somewhat similar to the way powerpc makes use of it. This allows for variations upon the configuration, eg. differing architecture revisions or subsets of driver support for differing boards, to be handled without having a large number of defconfig files.
Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14353/ Signed-off-by: Ralf Baechle <[email protected]>
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