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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5 |
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| #
b95b30e5 |
| 20-Jun-2024 |
Christian Marangi <[email protected]> |
mips: bmips: setup: make CBR address configurable
Add support to provide CBR address from DT to handle broken SoC/Bootloader that doesn't correctly init it. This permits to use the RAC flush even in
mips: bmips: setup: make CBR address configurable
Add support to provide CBR address from DT to handle broken SoC/Bootloader that doesn't correctly init it. This permits to use the RAC flush even in these condition.
To provide a CBR address from DT, the property "brcm,bmips-cbr-reg" needs to be set in the "cpus" node. On DT init, this property presence will be checked and will set the bmips_cbr_addr value accordingly. Also bmips_rac_flush_disable will be set to false as RAC flush can be correctly supported.
The CBR address from DT will overwrite the cached one and the one set in the CBR register will be ignored.
Also the DT CBR address is validated on being outside DRAM window.
Signed-off-by: Christian Marangi <[email protected]> Acked-by: Florian Fainelli <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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a5c05453 |
| 20-Jun-2024 |
Christian Marangi <[email protected]> |
mips: bmips: rework and cache CBR addr handling
Rework the handling of the CBR address and cache it. This address doesn't change and can be cached instead of reading the register every time.
This i
mips: bmips: rework and cache CBR addr handling
Rework the handling of the CBR address and cache it. This address doesn't change and can be cached instead of reading the register every time.
This is in preparation of permitting to tweak the CBR address in DT with broken SoC or bootloader.
bmips_cbr_addr is defined in setup.c for each arch to keep compatibility with legacy brcm47xx/brcm63xx and generic BMIPS target.
Acked-by: Florian Fainelli <[email protected]> Signed-off-by: Christian Marangi <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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Revision tags: v6.10-rc4 |
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ce5cdd3b |
| 11-Jun-2024 |
Christian Marangi <[email protected]> |
mips: bmips: BCM6358: make sure CBR is correctly set
It was discovered that some device have CBR address set to 0 causing kernel panic when arch_sync_dma_for_cpu_all is called.
This was notice in s
mips: bmips: BCM6358: make sure CBR is correctly set
It was discovered that some device have CBR address set to 0 causing kernel panic when arch_sync_dma_for_cpu_all is called.
This was notice in situation where the system is booted from TP1 and BMIPS_GET_CBR() returns 0 instead of a valid address and !!(read_c0_brcm_cmt_local() & (1 << 31)); not failing.
The current check whether RAC flush should be disabled or not are not enough hence lets check if CBR is a valid address or not.
Fixes: ab327f8acdf8 ("mips: bmips: BCM6358: disable RAC flush for TP1") Signed-off-by: Christian Marangi <[email protected]> Acked-by: Florian Fainelli <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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Revision tags: v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2 |
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657c45b3 |
| 14-Jul-2023 |
Rob Herring <[email protected]> |
MIPS: Explicitly include correct DT includes
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it was merged into the regular platform bus. As part of that m
MIPS: Explicitly include correct DT includes
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it was merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes.
Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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Revision tags: v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1 |
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964e6d97 |
| 03-May-2023 |
Jonathan Corbet <[email protected]> |
mips: update a reference to a moved Arm Document
Arm documentation has moved to Documentation/arch/arm; update a reference in arch/mips/bmips/setup.c to match.
Cc: Thomas Bogendoerfer <tsbogend@alp
mips: update a reference to a moved Arm Document
Arm documentation has moved to Documentation/arch/arm; update a reference in arch/mips/bmips/setup.c to match.
Cc: Thomas Bogendoerfer <[email protected]> Cc: [email protected] Acked-by: Florian Fainelli <[email protected]> Reviewed-by: Philippe Mathieu-Daudé <[email protected]> Signed-off-by: Jonathan Corbet <[email protected]>
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Revision tags: v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3 |
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ab327f8a |
| 17-Mar-2023 |
Álvaro Fernández Rojas <[email protected]> |
mips: bmips: BCM6358: disable RAC flush for TP1
RAC flush causes kernel panics on BCM6358 with EHCI/OHCI when booting from TP1: [ 3.881739] usb 1-1: new high-speed USB device number 2 using ehci-
mips: bmips: BCM6358: disable RAC flush for TP1
RAC flush causes kernel panics on BCM6358 with EHCI/OHCI when booting from TP1: [ 3.881739] usb 1-1: new high-speed USB device number 2 using ehci-platform [ 3.895011] Reserved instruction in kernel code[#1]: [ 3.900113] CPU: 0 PID: 1 Comm: init Not tainted 5.10.16 #0 [ 3.905829] $ 0 : 00000000 10008700 00000000 77d94060 [ 3.911238] $ 4 : 7fd1f088 00000000 81431cac 81431ca0 [ 3.916641] $ 8 : 00000000 ffffefff 8075cd34 00000000 [ 3.922043] $12 : 806f8d40 f3e812b7 00000000 000d9aaa [ 3.927446] $16 : 7fd1f068 7fd1f080 7ff559b8 81428470 [ 3.932848] $20 : 00000000 00000000 55590000 77d70000 [ 3.938251] $24 : 00000018 00000010 [ 3.943655] $28 : 81430000 81431e60 81431f28 800157fc [ 3.949058] Hi : 00000000 [ 3.952013] Lo : 00000000 [ 3.955019] epc : 80015808 setup_sigcontext+0x54/0x24c [ 3.960464] ra : 800157fc setup_sigcontext+0x48/0x24c [ 3.965913] Status: 10008703 KERNEL EXL IE [ 3.970216] Cause : 00800028 (ExcCode 0a) [ 3.974340] PrId : 0002a010 (Broadcom BMIPS4350) [ 3.979170] Modules linked in: ohci_platform ohci_hcd fsl_mph_dr_of ehci_platform ehci_fsl ehci_hcd gpio_button_hotplug usbcore nls_base usb_common [ 3.992907] Process init (pid: 1, threadinfo=(ptrval), task=(ptrval), tls=77e22ec8) [ 4.000776] Stack : 81431ef4 7fd1f080 81431f28 81428470 7fd1f068 81431edc 7ff559b8 81428470 [ 4.009467] 81431f28 7fd1f080 55590000 77d70000 77d5498c 80015c70 806f0000 8063ae74 [ 4.018149] 08100002 81431f28 0000000a 08100002 81431f28 0000000a 77d6b418 00000003 [ 4.026831] ffffffff 80016414 80080734 81431ecc 81431ecc 00000001 00000000 04000000 [ 4.035512] 77d54874 00000000 00000000 00000000 00000000 00000012 00000002 00000000 [ 4.044196] ... [ 4.046706] Call Trace: [ 4.049238] [<80015808>] setup_sigcontext+0x54/0x24c [ 4.054356] [<80015c70>] setup_frame+0xdc/0x124 [ 4.059015] [<80016414>] do_notify_resume+0x1dc/0x288 [ 4.064207] [<80011b50>] work_notifysig+0x10/0x18 [ 4.069036] [ 4.070538] Code: 8fc300b4 00001025 26240008 <ac820000> ac830004 3c048063 0c0228aa 24846a00 26240010 [ 4.080686] [ 4.082517] ---[ end trace 22a8edb41f5f983b ]--- [ 4.087374] Kernel panic - not syncing: Fatal exception [ 4.092753] Rebooting in 1 seconds..
Because the bootloader (CFE) is not initializing the Read-ahead cache properly on the second thread (TP1). Since the RAC was not initialized properly, we should avoid flushing it at the risk of corrupting the instruction stream as seen in the trace above.
Fixes: d59098a0e9cb ("MIPS: bmips: use generic dma noncoherent ops") Signed-off-by: Álvaro Fernández Rojas <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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Revision tags: v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7 |
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466ab2ea |
| 15-Jul-2022 |
Florian Fainelli <[email protected]> |
MIPS: BMIPS: Utilize cfe_die() for invalid DTB
If we were not specified a correct DTB, we will not be able to print anything useful with panic() which requires a working console of some sort. Utiliz
MIPS: BMIPS: Utilize cfe_die() for invalid DTB
If we were not specified a correct DTB, we will not be able to print anything useful with panic() which requires a working console of some sort. Utilize cfe_die() to callback into the CFE default UART and print some useful diagnostics.
Signed-off-by: Florian Fainelli <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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Revision tags: v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse |
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faf3c25e |
| 22-Feb-2021 |
Álvaro Fernández Rojas <[email protected]> |
mips: bmips: init clocks earlier
device_initcall() is too late for bcm63xx. We need to call of_clk_init() earlier in order to properly boot.
Signed-off-by: Álvaro Fernández Rojas <[email protected]
mips: bmips: init clocks earlier
device_initcall() is too late for bcm63xx. We need to call of_clk_init() earlier in order to properly boot.
Signed-off-by: Álvaro Fernández Rojas <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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Revision tags: v5.11, v5.11-rc7, v5.11-rc6 |
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b83ba0b9 |
| 27-Jan-2021 |
Thomas Bogendoerfer <[email protected]> |
MIPS: of: Introduce helper function to get DTB
Selection of the DTB to be used was burried in more or less readable code in head.S. Move this code into a inline helper function and use it.
Signed-o
MIPS: of: Introduce helper function to get DTB
Selection of the DTB to be used was burried in more or less readable code in head.S. Move this code into a inline helper function and use it.
Signed-off-by: Thomas Bogendoerfer <[email protected]> Acked-by: Florian Fainelli <[email protected]>
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Revision tags: v5.11-rc5, v5.11-rc4, v5.11-rc3 |
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a6e83ace |
| 05-Jan-2021 |
Thomas Bogendoerfer <[email protected]> |
MIPS: Remove empty prom_free_prom_memory functions
Most of the prom_free_prom_memory functions are empty. With a new weak prom_free_prom_memory() we can remove all of them.
Signed-off-by: Thomas Bo
MIPS: Remove empty prom_free_prom_memory functions
Most of the prom_free_prom_memory functions are empty. With a new weak prom_free_prom_memory() we can remove all of them.
Signed-off-by: Thomas Bogendoerfer <[email protected]> Acked-by: Florian Fainelli <[email protected]>
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d422c6c0 |
| 05-Jan-2021 |
Nathan Chancellor <[email protected]> |
MIPS: Use address-of operator on section symbols
When building xway_defconfig with clang:
arch/mips/lantiq/prom.c:82:23: error: array comparison always evaluates to true [-Werror,-Wtautological-com
MIPS: Use address-of operator on section symbols
When building xway_defconfig with clang:
arch/mips/lantiq/prom.c:82:23: error: array comparison always evaluates to true [-Werror,-Wtautological-compare] else if (__dtb_start != __dtb_end) ^ 1 error generated.
These are not true arrays, they are linker defined symbols, which are just addresses. Using the address of operator silences the warning and does not change the resulting assembly with either clang/ld.lld or gcc/ld (tested with diff + objdump -Dr). Do the same thing across the entire MIPS subsystem to ensure there are no more warnings around this type of comparison.
Link: https://github.com/ClangBuiltLinux/linux/issues/1232 Signed-off-by: Nathan Chancellor <[email protected]> Acked-by: Florian Fainelli <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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Revision tags: v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2 |
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e40b3def |
| 12-Feb-2020 |
Geert Uytterhoeven <[email protected]> |
MIPS: BMIPS: Replace <linux/clk-provider.h> by <linux/of_clk.h>
The Broadcom BMIPS platform code is not a clock provider, and just needs to call of_clk_init().
Hence it can include <linux/of_clk.h>
MIPS: BMIPS: Replace <linux/clk-provider.h> by <linux/of_clk.h>
The Broadcom BMIPS platform code is not a clock provider, and just needs to call of_clk_init().
Hence it can include <linux/of_clk.h> instead of <linux/clk-provider.h>.
Signed-off-by: Geert Uytterhoeven <[email protected]> Acked-by: Florian Fainelli <[email protected]> Reviewed-by: Philippe Mathieu-Daudé <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Paul Cercueil <[email protected]> Cc: James Hartley <[email protected]> Cc: John Crispin <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected]
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Revision tags: v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3, v5.2-rc2, v5.2-rc1, v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5 |
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dc7a12bd |
| 14-Apr-2019 |
Mauro Carvalho Chehab <[email protected]> |
docs: arm: convert docs to ReST and rename to *.rst
Converts ARM the text files to ReST, preparing them to be an architecture book.
The conversion is actually: - add blank lines and identation in
docs: arm: convert docs to ReST and rename to *.rst
Converts ARM the text files to ReST, preparing them to be an architecture book.
The conversion is actually: - add blank lines and identation in order to identify paragraphs; - fix tables markups; - add some lists markups; - mark literal blocks; - adjust title markups.
At its new index.rst, let's add a :orphan: while this is not linked to the main index.rst file, in order to avoid build warnings.
Signed-off-by: Mauro Carvalho Chehab <[email protected]> Reviewed-by Corentin Labbe <[email protected]> # For sun4i-ss
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Revision tags: v5.1-rc4, v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6, v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20, v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1 |
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57c8a661 |
| 30-Oct-2018 |
Mike Rapoport <[email protected]> |
mm: remove include/linux/bootmem.h
Move remaining definitions and declarations from include/linux/bootmem.h into include/linux/memblock.h and remove the redundant header.
The includes were replaced
mm: remove include/linux/bootmem.h
Move remaining definitions and declarations from include/linux/bootmem.h into include/linux/memblock.h and remove the redundant header.
The includes were replaced with the semantic patch below and then semi-automated removal of duplicated '#include <linux/memblock.h>
@@ @@ - #include <linux/bootmem.h> + #include <linux/memblock.h>
[[email protected]: dma-direct: fix up for the removal of linux/bootmem.h] Link: http://lkml.kernel.org/r/[email protected] [[email protected]: powerpc: fix up for removal of linux/bootmem.h] Link: http://lkml.kernel.org/r/[email protected] [[email protected]: x86/kaslr, ACPI/NUMA: fix for linux/bootmem.h removal] Link: http://lkml.kernel.org/r/[email protected] Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Mike Rapoport <[email protected]> Signed-off-by: Stephen Rothwell <[email protected]> Acked-by: Michal Hocko <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: Chris Zankel <[email protected]> Cc: "David S. Miller" <[email protected]> Cc: Geert Uytterhoeven <[email protected]> Cc: Greentime Hu <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Guan Xuetao <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: "James E.J. Bottomley" <[email protected]> Cc: Jonas Bonn <[email protected]> Cc: Jonathan Corbet <[email protected]> Cc: Ley Foon Tan <[email protected]> Cc: Mark Salter <[email protected]> Cc: Martin Schwidefsky <[email protected]> Cc: Matt Turner <[email protected]> Cc: Michael Ellerman <[email protected]> Cc: Michal Simek <[email protected]> Cc: Palmer Dabbelt <[email protected]> Cc: Paul Burton <[email protected]> Cc: Richard Kuo <[email protected]> Cc: Richard Weinberger <[email protected]> Cc: Rich Felker <[email protected]> Cc: Russell King <[email protected]> Cc: Serge Semin <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Tony Luck <[email protected]> Cc: Vineet Gupta <[email protected]> Cc: Yoshinori Sato <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
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Revision tags: v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6 |
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e524c788 |
| 25-Sep-2018 |
Yasha Cherikovsky <[email protected]> |
MIPS: BMIPS: Remove special handling of CONFIG_MIPS_ELF_APPENDED_DTB=y
The ELF appended dtb can be accessed now via 'fw_passed_dtb'.
Signed-off-by: Yasha Cherikovsky <[email protected]> Signed-o
MIPS: BMIPS: Remove special handling of CONFIG_MIPS_ELF_APPENDED_DTB=y
The ELF appended dtb can be accessed now via 'fw_passed_dtb'.
Signed-off-by: Yasha Cherikovsky <[email protected]> Signed-off-by: Paul Burton <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/20804/ Cc: Kevin Cernekee <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Paul Burton <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
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Revision tags: v4.19-rc5, v4.19-rc4, v4.19-rc3, v4.19-rc2, v4.19-rc1, v4.18, v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4, v4.18-rc3, v4.18-rc2 |
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| #
0279455f |
| 19-Jun-2018 |
Rob Herring <[email protected]> |
MIPS: bmips: remove unnecessary call to register "simple-bus"
The DT core will register "simple-bus" by default, so it is not necessary for arch specific code to do so unless there are custom match
MIPS: bmips: remove unnecessary call to register "simple-bus"
The DT core will register "simple-bus" by default, so it is not necessary for arch specific code to do so unless there are custom match entries, auxdata or parent device. Neither of those apply here, so remove the call.
Cc: Kevin Cernekee <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Paul Burton <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Signed-off-by: Rob Herring <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/19590/ Signed-off-by: Paul Burton <[email protected]> Cc: [email protected]
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Revision tags: v4.18-rc1, v4.17, v4.17-rc7, v4.17-rc6, v4.17-rc5, v4.17-rc4, v4.17-rc3, v4.17-rc2, v4.17-rc1, v4.16, v4.16-rc7, v4.16-rc6, v4.16-rc5, v4.16-rc4, v4.16-rc3, v4.16-rc2, v4.16-rc1, v4.15, v4.15-rc9, v4.15-rc8, v4.15-rc7, v4.15-rc6, v4.15-rc5, v4.15-rc4, v4.15-rc3, v4.15-rc2, v4.15-rc1, v4.14, v4.14-rc8, v4.14-rc7, v4.14-rc6, v4.14-rc5, v4.14-rc4, v4.14-rc3, v4.14-rc2, v4.14-rc1, v4.13, v4.13-rc7, v4.13-rc6, v4.13-rc5, v4.13-rc4, v4.13-rc3, v4.13-rc2, v4.13-rc1, v4.12, v4.12-rc7, v4.12-rc6, v4.12-rc5, v4.12-rc4, v4.12-rc3, v4.12-rc2, v4.12-rc1, v4.11, v4.11-rc8, v4.11-rc7, v4.11-rc6, v4.11-rc5, v4.11-rc4, v4.11-rc3, v4.11-rc2, v4.11-rc1, v4.10, v4.10-rc8, v4.10-rc7, v4.10-rc6, v4.10-rc5, v4.10-rc4, v4.10-rc3, v4.10-rc2, v4.10-rc1, v4.9, v4.9-rc8, v4.9-rc7, v4.9-rc6, v4.9-rc5, v4.9-rc4, v4.9-rc3, v4.9-rc2, v4.9-rc1, v4.8 |
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d66698e0 |
| 30-Sep-2016 |
Jaedon Shin <[email protected]> |
MIPS: BMIPS: Support APPENDED_DTB
Use appended DTB when available.
Signed-off-by: Jaedon Shin <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Florian Fainelli <f.fainelli@gmail.
MIPS: BMIPS: Support APPENDED_DTB
Use appended DTB when available.
Signed-off-by: Jaedon Shin <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14337/ Signed-off-by: Ralf Baechle <[email protected]>
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Revision tags: v4.8-rc8, v4.8-rc7, v4.8-rc6, v4.8-rc5, v4.8-rc4, v4.8-rc3, v4.8-rc2, v4.8-rc1 |
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8e385a66 |
| 03-Aug-2016 |
Álvaro Fernández Rojas <[email protected]> |
MIPS: BMIPS: Add BCM6362 support
BCM6362 is a BMIPS4350 SoC which needs the same fixup as BCM6368 in order to enable SMP support.
Signed-off-by: Álvaro Fernández Rojas <[email protected]> Cc: f.fai
MIPS: BMIPS: Add BCM6362 support
BCM6362 is a BMIPS4350 SoC which needs the same fixup as BCM6368 in order to enable SMP support.
Signed-off-by: Álvaro Fernández Rojas <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/13845/ Signed-off-by: Ralf Baechle <[email protected]>
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4bac0e2a |
| 03-Aug-2016 |
Álvaro Fernández Rojas <[email protected]> |
MIPS: BMIPS: Add BCM3368 support
BCM3368 has a shared TLB which conflicts with current SMP support, so it must be disabled for now.
Signed-off-by: Álvaro Fernández Rojas <[email protected]> Cc: f.f
MIPS: BMIPS: Add BCM3368 support
BCM3368 has a shared TLB which conflicts with current SMP support, so it must be disabled for now.
Signed-off-by: Álvaro Fernández Rojas <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/13840/ Signed-off-by: Ralf Baechle <[email protected]>
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Revision tags: v4.7, v4.7-rc7, v4.7-rc6, v4.7-rc5 |
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15f37e15 |
| 20-Jun-2016 |
Jonas Gorski <[email protected]> |
MIPS: store the appended dtb address in a variable
Instead of rewriting the arguments to match the UHI spec, store the address of a appended or UHI supplied dtb in fw_supplied_dtb.
That way the ori
MIPS: store the appended dtb address in a variable
Instead of rewriting the arguments to match the UHI spec, store the address of a appended or UHI supplied dtb in fw_supplied_dtb.
That way the original bootloader arugments are kept intact while still making the use of an appended dtb invisible for mach code.
Mach code can still find out if it is an appended dtb by comparing fw_arg1 with fw_supplied_dtb.
Signed-off-by: Jonas Gorski <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: John Crispin <[email protected]> Cc: Paul Burton <[email protected]> Cc: James Hogan <[email protected]> Cc: Alban Bedel <[email protected]> Cc: Daniel Gimpelevich <[email protected]> Cc: Antony Pavlov <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/13699/ Signed-off-by: Ralf Baechle <[email protected]>
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Revision tags: v4.7-rc4, v4.7-rc3, v4.7-rc2, v4.7-rc1, v4.6, v4.6-rc7, v4.6-rc6, v4.6-rc5, v4.6-rc4, v4.6-rc3 |
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3652acd2 |
| 09-Apr-2016 |
Álvaro Fernández Rojas <[email protected]> |
MIPS: BMIPS: Add support for BCM63268
This SoC is very similar to BCM63168 and Broadcom usually refers to them as BCM63268. Add BCM63268 and missing BCM63168 to device tree documentation.
Signed-of
MIPS: BMIPS: Add support for BCM63268
This SoC is very similar to BCM63168 and Broadcom usually refers to them as BCM63268. Add BCM63268 and missing BCM63168 to device tree documentation.
Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Rob Herring <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/13042/ Signed-off-by: Ralf Baechle <[email protected]>
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3604b451 |
| 09-Apr-2016 |
Álvaro Fernández Rojas <[email protected]> |
MIPS: BMIPS: Add BCM6358 support
BCM6358 has a shared TLB which conflicts with current SMP support, so it must be disabled for now. BCM6358 uses >= 0xfffe0000 addresses for internal registers, which
MIPS: BMIPS: Add BCM6358 support
BCM6358 has a shared TLB which conflicts with current SMP support, so it must be disabled for now. BCM6358 uses >= 0xfffe0000 addresses for internal registers, which need to be remapped (by using a simplified version of BRCM63xx ioremap.h). However, 0xfff80000 is a better address, since it also covers BCM3368, leaving the possibility to add it in the future.
Signed-off-by: Álvaro Fernández Rojas <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/13040/ Signed-off-by: Ralf Baechle <[email protected]>
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Revision tags: v4.6-rc2, v4.6-rc1, v4.5, v4.5-rc7, v4.5-rc6, v4.5-rc5, v4.5-rc4 |
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738a3f79 |
| 09-Feb-2016 |
Florian Fainelli <[email protected]> |
MIPS: BMIPS: Add early CPU initialization code
Port the stblinux-3.3 code to perform a bunch of CPU-specific initialization, make it compatible with run-time detection of the CPU, and unroll the brc
MIPS: BMIPS: Add early CPU initialization code
Port the stblinux-3.3 code to perform a bunch of CPU-specific initialization, make it compatible with run-time detection of the CPU, and unroll the brcmstb-specific macros: BDEV_RB(), BDEV_UNSET.
The "pref 30" disabling is done as a quirk. This is a preliminary change to allow the use of the "rotr" instruction gated by cpu_has_rixi.
Signed-off-by: Florian Fainelli <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/12504/ Signed-off-by: Ralf Baechle <[email protected]>
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Revision tags: v4.5-rc3, v4.5-rc2, v4.5-rc1, v4.4, v4.4-rc8, v4.4-rc7, v4.4-rc6, v4.4-rc5, v4.4-rc4, v4.4-rc3, v4.4-rc2, v4.4-rc1 |
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16580796 |
| 15-Nov-2015 |
Simon Arlott <[email protected]> |
MIPS: bmips: Support SMP on BCM63168
The BCM63168 requires the same CPU1 fix as BCM6368.
Signed-off-by: Simon Arlott <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Florian Fainelli
MIPS: bmips: Support SMP on BCM63168
The BCM63168 requires the same CPU1 fix as BCM6368.
Signed-off-by: Simon Arlott <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: [email protected] Cc: Linux Kernel Mailing List <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/11487/ Signed-off-by: Ralf Baechle <[email protected]>
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Revision tags: v4.3, v4.3-rc7, v4.3-rc6 |
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2bcef9b4 |
| 12-Oct-2015 |
Jonas Gorski <[email protected]> |
MIPS: Make MIPS_CMDLINE_DTB default
Seval of-enabled machines (bmips, lantiq, xlp, pistachio, ralink) copied the arguments from dtb to arcs_command_line to prevent the kernel from overwriting them.
MIPS: Make MIPS_CMDLINE_DTB default
Seval of-enabled machines (bmips, lantiq, xlp, pistachio, ralink) copied the arguments from dtb to arcs_command_line to prevent the kernel from overwriting them.
Since there is now an option to keep the dtb arguments, default to the new option remove the "backup" to arcs_command_line in case of USE_OF is enabled, except for those platforms that still take the bootloader arguments or do not use any at all.
Signed-off-by: Jonas Gorski <[email protected]> Cc: [email protected] Cc: Kevin Cernekee <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: Zubair Lutfullah Kakakhel <[email protected]> Cc: James Hogan <[email protected]> Cc: John Crispin <[email protected]> Cc: Ganesan Ramalingam <[email protected]> Cc: Jayachandran C <[email protected]> Cc: Andrew Bresticker <[email protected]> Cc: James Hartley <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/11285/ Signed-off-by: Ralf Baechle <[email protected]>
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