microblaze: Add support for error injection

To inject the error using the tmr inject IP reset vectors need to be placed
in lmb(bram) due to the limitation in HW when this code runs out of DDR.
Below

microblaze: Add support for error injection

To inject the error using the tmr inject IP reset vectors need to be placed
in lmb(bram) due to the limitation in HW when this code runs out of DDR.
Below code adds the error inject code to the .init.ivt section to copy
it in machine_early_init to lmb/Bram location. C_BASE_VECTORS which allow
moving reset vectors out of 0 location is not currently supported by
Microblaze architecture, that's why all the time reset vectors with
injection code is all the time copied to address 0.

As of now getting this functionality working CPU switches to real mode
and simply jumps to bram, which causes triggering of fault which continues
to call_xmb_manager_break break handler which will at the end calls the
error count callback function and performs recovery.

Signed-off-by: Appana Durga Kedareswara rao <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>

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microblaze: Add custom break vector handler for mb manager

When the TMR Manager detects a fault Lockstep state it is signaled to the
MicroBlaze processors by asserting a break signal, When Microblaz

microblaze: Add custom break vector handler for mb manager

When the TMR Manager detects a fault Lockstep state it is signaled to the
MicroBlaze processors by asserting a break signal, When Microblaze gets
a break vector from tmr Microblaze it's needed to clear/block the break
bit in the tmr manager before performing recovery.
In order to perform recovery need to perform the following steps.
1) Store all internal MicroBlaze registers in RAM
2) Execute a suspend instruction which asserts the reset signal
3) Restore all registers from RAM and execute an RTBD instruction to
return from the reset handler, to resume execution at the place
where the break occurred.

This API supports getting called from kernel space only.

Signed-off-by: Appana Durga Kedareswara rao <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>

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microblaze: Add xmb_manager_register function

Triple Modular Redundancy (TMR) Microblaze solution provides soft error
injection, detection, correction and recovery for Microblaze cores in the
system

microblaze: Add xmb_manager_register function

Triple Modular Redundancy (TMR) Microblaze solution provides soft error
injection, detection, correction and recovery for Microblaze cores in the
system. The Xilinx/AMD Triple Modular Redundancy (TMR) solution in Vivado
provides all the necessary building blocks to implement a redundant
triplicated MicroBlaze subsystem. This processing subsystem is
fault-tolerant and continues to operate nominally after encountering an
error. Together with the capability to detect and recover from errors,
the implementation ensures the reliability of the entire subsystem.

When the break vector gets asserted because of error injection,
the break signal must be blocked before exiting from the break handler,
This commit adds support for xmb_manager_register api which updates the
TMR manager address and control register and error count and reset callback
function arguments, which will be used by the break handler to block the
break and call the error count callback function and reset callback
function.

Signed-off-by: Appana Durga Kedareswara rao <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>

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microblaze: Fix some typos in comment

Replace 'the the' with 'like the' in the comment.
Replace 'an' with 'a'.

Signed-off-by: Slark Xiao <[email protected]>
Signed-off-by: Michal Simek <michal.sim

microblaze: Fix some typos in comment

Replace 'the the' with 'like the' in the comment.
Replace 'an' with 'a'.

Signed-off-by: Slark Xiao <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]

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microblaze: Fix _reset() function

There is a need to disable VM before jump to zero reset vector.

Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Stefan Asserhall <stefan.asserha

microblaze: Fix _reset() function

There is a need to disable VM before jump to zero reset vector.

Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Stefan Asserhall <[email protected]>

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sched/rt, microblaze: Use CONFIG_PREEMPTION

CONFIG_PREEMPTION is selected by CONFIG_PREEMPT and by CONFIG_PREEMPT_RT.
Both PREEMPT and PREEMPT_RT require the same functionality which today
depends o

sched/rt, microblaze: Use CONFIG_PREEMPTION

CONFIG_PREEMPTION is selected by CONFIG_PREEMPT and by CONFIG_PREEMPT_RT.
Both PREEMPT and PREEMPT_RT require the same functionality which today
depends on CONFIG_PREEMPT.

Switch the entry code over to use CONFIG_PREEMPTION.

Signed-off-by: Thomas Gleixner <[email protected]>
Signed-off-by: Sebastian Andrzej Siewior <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Cc: Linus Torvalds <[email protected]>
Cc: Michal Simek <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Ingo Molnar <[email protected]>

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microblaze: entry: Remove unneeded need_resched() loop

Since the enabling and disabling of IRQs within preempt_schedule_irq()
is contained in a need_resched() loop, we don't need the outer arch
code

microblaze: entry: Remove unneeded need_resched() loop

Since the enabling and disabling of IRQs within preempt_schedule_irq()
is contained in a need_resched() loop, we don't need the outer arch
code loop.

Signed-off-by: Valentin Schneider <[email protected]>
Cc: Michal Simek <[email protected]>
Signed-off-by: Michal Simek <[email protected]>

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microblaze: Fix MSR flags when returning from exception

The issue was that the service routine was sometimes
returning with the wrong flags set in the MSR.

In this case, EIP bit was set while retur

microblaze: Fix MSR flags when returning from exception

The issue was that the service routine was sometimes
returning with the wrong flags set in the MSR.

In this case, EIP bit was set while returning to User Mode
which is an illegal combination since exceptions are always
handled in privileged mode.

In order for MicroBlaze to take an interrupt, the MSR must have IE=1,
BIP=0 and EIP=0.

Signed-off-by: Stefan Asserhall <[email protected]>
Signed-off-by: Goran Bilski <[email protected]>
Signed-off-by: Michal Simek <[email protected]>

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microblaze: Separate GP registers from MSR handling

Separate general purpose register restoring from MSR handling.

Signed-off-by: Michal Simek <[email protected]>

microblaze: Fix syscall error recovery for invalid syscall IDs

This patch fixes two bugs in the Microblaze syscall trap handler when an invalid
syscall ID is used.

First, the range check on line 35

microblaze: Fix syscall error recovery for invalid syscall IDs

This patch fixes two bugs in the Microblaze syscall trap handler when an invalid
syscall ID is used.

First, the range check on line 351 only checks for syscall IDs greater than
__NR_syscalls. A negative syscall ID (either passed to `syscall()` or as returned
by `do_syscall_trace_enter()` on error) will still satisfy this test and cause
the Linux kernel to access an invalid memory location and cause a kernel oops.
This has been fixed by also checking for r12 < 0.

Secondly, the current error recovery at line 378 returns using the wrong register
(r15 instead of r14) and does not restore the previous stack state. This has been
fixed by invoking `ret_from_trap` on error, setting r3 to `-ENOSYS`, similar to
what would happen when calling a valid syscall.

Signed-off-by: Jamie Garside <[email protected]>
Signed-off-by: Michal Simek <[email protected]>

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microblaze: Coding style cleanup

No function change.

Signed-off-by: Michal Simek <[email protected]>

microblaze: Move restart allowed out of block

Better not to break block which do work together.

Signed-off-by: Michal Simek <[email protected]>
Signed-off-by: Al Viro <[email protected]>

microblaze: fix handling of multiple pending signals

We need to keep building sigframes until no pending signals remain.
Wrap do_notify_resume() calls into loops; do _not_ allow syscall
restart logi

microblaze: fix handling of multiple pending signals

We need to keep building sigframes until no pending signals remain.
Wrap do_notify_resume() calls into loops; do _not_ allow syscall
restart logics to trigger after the first iteration.

Incidentally, comments about pending signals that should (somehow)
be in r18 are pure BS. Doesn't work that way and cannot work that
way, sorry...

Signed-off-by: Al Viro <[email protected]>

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microblaze: fix the horror with restarts of sigreturn()

solution a-la arm one - pick a callee-saved register (r30), set it
non-zero when entering a syscall, have sigreturn wrapper zero it out
and pa

microblaze: fix the horror with restarts of sigreturn()

solution a-la arm one - pick a callee-saved register (r30), set it
non-zero when entering a syscall, have sigreturn wrapper zero it out
and pass the value in it to do_notify_resume() as "in_syscall" (actually,
"restarts allowed") argument.

Note that we don't give a damn about ret_from_fork() - return value
is not restart-worthy anyway.

Possible remaining bug: on !MMU we still have _debug_exception()
restartable. If it hits with -ERESTART_... accidentally in r3, fun happens.
MMU does _not_ have _debug_exception() restartable. If that's decided to
be a bug (as I strongly suspect it to be), we'll just need to replace
setting r30 to 1 with setting r30 to 0 in !MMU _debug_exception().
Up to microblaze maintainers...

[folded a fix from Michal]

Signed-off-by: Al Viro <[email protected]>

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microblaze: switch to generic fork/vfork/clone

Signed-off-by: Al Viro <[email protected]>
Signed-off-by: Michal Simek <[email protected]>

microblaze: switch to generic sys_execve()

Signed-off-by: Al Viro <[email protected]>

microblaze: switch to generic kernel_execve()

Signed-off-by: Al Viro <[email protected]>
Signed-off-by: Michal Simek <[email protected]>

microblaze: switch to generic kernel_thread()

Signed-off-by: Al Viro <[email protected]>
Signed-off-by: Michal Simek <[email protected]>

microblaze: Fix bug with schedule_tail

Signed-off-by: Michal Simek <[email protected]>

microblaze: Add TLS support to sys_clone

Formerly unused Args 4/5 now load parent tid / child tid so the brid to
do_fork can pick up TLS from r10. Arg 3 still unused

There is also necessary to fix

microblaze: Add TLS support to sys_clone

Formerly unused Args 4/5 now load parent tid / child tid so the brid to
do_fork can pick up TLS from r10. Arg 3 still unused

There is also necessary to fix old glibc which do not setup r9/r10 (arg 4/5).
Simple clearing them is fine.

Signed-off-by: Edgar E. Iglesias <[email protected]>
Signed-off-by: David Holsgrove <[email protected]>
Signed-off-by: Michal Simek <[email protected]>

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microblaze: drop 'oldset' argument of do_notify_resume()

never used...

Signed-off-by: Al Viro <[email protected]>

microblaze: handle TIF_NOTIFY_RESUME

Signed-off-by: Al Viro <[email protected]>

microblaze: Trivial asm fix

Just replace one dot with comma. New binutils can detect it.

Signed-off-by: Michal Simek <[email protected]>

microblaze: Do not copy reset vectors/manual reset vector setup

Reset vector can be setup by bootloader and kernel doens't need
to touch it. If you require to setup reset vector, please use
CONFIG_M

microblaze: Do not copy reset vectors/manual reset vector setup

Reset vector can be setup by bootloader and kernel doens't need
to touch it. If you require to setup reset vector, please use
CONFIG_MANUAL_RESET_VECTOR throught menuconfig.
It is not possible to setup address 0x0 as reset address because
make no sense to set it up at all.

Signed-off-by: Michal Simek <[email protected]>
Signed-off-by: John Williams <[email protected]>

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microblaze: Fix _reset function

If soft reset falls through with no hardware assisted reset, the best
we can do is jump to the reset vector and see what the bootloader left
for us.

Signed-off-by: M

microblaze: Fix _reset function

If soft reset falls through with no hardware assisted reset, the best
we can do is jump to the reset vector and see what the bootloader left
for us.

Signed-off-by: Michal Simek <[email protected]>
Signed-off-by: John Williams <[email protected]>

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