ARM: 9005/1: debug: Select flow control for all debug UARTs

Instead of a flow control selection mechanism specifically for
8250, make this available for all debug UARTs. If the debug
UART supports w

ARM: 9005/1: debug: Select flow control for all debug UARTs

Instead of a flow control selection mechanism specifically for
8250, make this available for all debug UARTs. If the debug
UART supports waiting for CTS to be asserted, then this code
can be activated for terminals that need it.

We keep the defaults for EBSA110, Footbridge, Gemini and RPC
so that this still works as expected for these older platforms:
they assume that flow control shall be enabled for debug
prints.

I switch the location of the check for
ifdef CONFIG_DEBUG_UART_FLOW_CONTROL from the actual debug
UART drivers: the code would get compiled-out for 8250 and
Tegra unless their custom config (or passing -DFLOW_CONTROL
in the Tegra case) was not set. Instead this is conditional
at the three places where we print debug messages. The idea
is that debug UARTs can be implemented without this ifdef
boilerplate so they look cleaner, alas the ifdef has to be
somewhere.

Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Russell King <[email protected]>

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ARM: 9004/1: debug: Split waituart to CTS and TXRDY

This patch was triggered by a remark from Russell that
introducing a call to the waituart (needed to fix debug prints
on the Qualcomm platforms) w

ARM: 9004/1: debug: Split waituart to CTS and TXRDY

This patch was triggered by a remark from Russell that
introducing a call to the waituart (needed to fix debug prints
on the Qualcomm platforms) was dangerous because in some cases
this will involve waiting for a modem CTS (clear to send)
signal, and debug messages would maybe not work on platforms
with no modem connected to the UART port: they will just
hang waiting for the modem to assert CTS and this might never
happen.

Looking through all UART debug drivers implementing the waituart
macro I discovered that all users except two actually use this
macro to check if the UART is ready for TX, let's call this
TXRDY.

Only two debug UART drivers actually check for CTS:
- arch/arm/include/debug/8250.S
- arch/arm/include/debug/tegra.S

The former is very significant since the 8250 is possibly
the most common UART on the planet.

We have the following problem: the semantics of waituart are
ambiguous making it dangerous to introduce the macro to debug
code fixing debug prints for Qualcomm. To start to pry this
problem apart, this patch does the following:

- Convert all debug UART drivers to define two macros:

- waituartcts with the clear semantic to wait for CTS
to be asserted

- waituarttxrdy with the clear semantic to wait for the TX
capability of the UART to be ready

- When doing this take care to assign the right function to
each drivers macro, so they now do exactly the above.

- Update the three sites in the kernel invoking the waituart
macro to call waituartcts/waituarttxrdy in sequence, so that
the functional impact on the kernel should be zero.

After this we can start to change the code sites using this
code to do the right thing.

Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Russell King <[email protected]>

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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

Based on 2 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of th

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

Based on 2 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Enrico Weigelt <[email protected]>
Reviewed-by: Kate Stewart <[email protected]>
Reviewed-by: Allison Randal <[email protected]>
Cc: [email protected]
Link: https://lkml.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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ARM: 8844/1: use unified assembler in assembly files

Use unified assembler syntax (UAL) in assembly files. Divided
syntax is considered deprecated. This will also allow to build
the kernel using LLV

ARM: 8844/1: use unified assembler in assembly files

Use unified assembler syntax (UAL) in assembly files. Divided
syntax is considered deprecated. This will also allow to build
the kernel using LLVM's integrated assembler.

Signed-off-by: Stefan Agner <[email protected]>
Acked-by: Nicolas Pitre <[email protected]>
Signed-off-by: Russell King <[email protected]>

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ARM: 8717/2: debug printch/printascii: translate '\n' to "\r\n" not "\n\r"

Some terminals apparently have issues with "\n\r" and mess up the
display. Let's use the traditional "\r\n" ordering.

Sign

ARM: 8717/2: debug printch/printascii: translate '\n' to "\r\n" not "\n\r"

Some terminals apparently have issues with "\n\r" and mess up the
display. Let's use the traditional "\r\n" ordering.

Signed-off-by: Nicolas Pitre <[email protected]>
Reported-by: Chris Brandt <[email protected]>
Tested-by: Chris Brandt <[email protected]>
Signed-off-by: Russell King <[email protected]>

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ARM: 8704/1: semihosting: use proper instruction on v7m processors

The svc instruction doesn't exist on v7m processors. Semihosting ops are
invoked with the bkpt instruction instead.

Signed-off-by:

ARM: 8704/1: semihosting: use proper instruction on v7m processors

The svc instruction doesn't exist on v7m processors. Semihosting ops are
invoked with the bkpt instruction instead.

Signed-off-by: Nicolas Pitre <[email protected]>
Signed-off-by: Russell King <[email protected]>

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ARM: 8703/1: debug.S: move hexbuf to a writable section

This was located in .text which is meant to be read-only. And in the XIP
case this shortcut simply doesn't work and may trigger a Flash contro

ARM: 8703/1: debug.S: move hexbuf to a writable section

This was located in .text which is meant to be read-only. And in the XIP
case this shortcut simply doesn't work and may trigger a Flash controller
mode switch and crash the kernel. Move it to the .bss area.

Signed-off-by: Nicolas Pitre <[email protected]>
Signed-off-by: Russell King <[email protected]>

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ARM: unify MMU/!MMU addruart calls

Remove the needless differences between MMU/!MMU addruart calls.
This allows to use the same addruart macro on SoC level. Useful
for SoC consisting of multiple CPU

ARM: unify MMU/!MMU addruart calls

Remove the needless differences between MMU/!MMU addruart calls.
This allows to use the same addruart macro on SoC level. Useful
for SoC consisting of multiple CPUs with and without MMU such as
Freescale Vybrid.

Signed-off-by: Stefan Agner <[email protected]>
Signed-off-by: Arnd Bergmann <[email protected]>

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ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+

ARMv6 and greater introduced a new instruction ("bx") which can be used
to return from function calls. Recent CPUs perform better when the
"b

ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+

ARMv6 and greater introduced a new instruction ("bx") which can be used
to return from function calls. Recent CPUs perform better when the
"bx lr" instruction is used rather than the "mov pc, lr" instruction,
and this sequence is strongly recommended to be used by the ARM
architecture manual (section A.4.1.1).

We provide a new macro "ret" with all its variants for the condition
code which will resolve to the appropriate instruction.

Rather than doing this piecemeal, and miss some instances, change all
the "mov pc" instances to use the new macro, with the exception of
the "movs" instruction and the kprobes code. This allows us to detect
the "mov pc, lr" case and fix it up - and also gives us the possibility
of deploying this for other registers depending on the CPU selection.

Reported-by: Will Deacon <[email protected]>
Tested-by: Stephen Warren <[email protected]> # Tegra Jetson TK1
Tested-by: Robert Jarzmik <[email protected]> # mioa701_bootresume.S
Tested-by: Andrew Lunn <[email protected]> # Kirkwood
Tested-by: Shawn Guo <[email protected]>
Tested-by: Tony Lindgren <[email protected]> # OMAPs
Tested-by: Gregory CLEMENT <[email protected]> # Armada XP, 375, 385
Acked-by: Sekhar Nori <[email protected]> # DaVinci
Acked-by: Christoffer Dall <[email protected]> # kvm/hyp
Acked-by: Haojian Zhuang <[email protected]> # PXA3xx
Acked-by: Stefano Stabellini <[email protected]> # Xen
Tested-by: Uwe Kleine-König <[email protected]> # ARMv7M
Tested-by: Simon Horman <[email protected]> # Shmobile
Signed-off-by: Russell King <[email protected]>

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ARM: compile fix for DEBUG_LL=y && MMU=n

debug_ll_addr is only used on machines with an MMU so it can be #ifdef'ed
out safely. This fixes:

arch/arm/kernel/debug.S: Assembler messages:
arch/arm/kern

ARM: compile fix for DEBUG_LL=y && MMU=n

debug_ll_addr is only used on machines with an MMU so it can be #ifdef'ed
out safely. This fixes:

arch/arm/kernel/debug.S: Assembler messages:
arch/arm/kernel/debug.S:104: Error: too many positional arguments

The problem was introduced in e5c5f2a ARM: implement debug_ll_io_init().

Signed-off-by: Uwe Kleine-König <[email protected]>
Reviewed-by: Stephen Warren <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Olof Johansson <[email protected]>

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ARM: implement debug_ll_io_init()

When using DEBUG_LL, the UART's (or other HW's) registers are mapped
into early page tables based on the results of assembly macro addruart.
Later, when the page ta

ARM: implement debug_ll_io_init()

When using DEBUG_LL, the UART's (or other HW's) registers are mapped
into early page tables based on the results of assembly macro addruart.
Later, when the page tables are replaced, the same virtual address must
remain valid. Historically, this has been ensured by using defines from
<mach/iomap.h> in both the implementation of addruart, and the machine's
.map_io() function. However, with the move to single zImage, we wish to
remove <mach/iomap.h>. To enable this, the macro addruart may be used
when constructing the late page tables too; addruart is exposed as a
C function debug_ll_addr(), and used to set up the required mapping in
debug_ll_io_init(), which may called on an opt-in basis from a machine's
.map_io() function.

Signed-off-by: Rob Herring <[email protected]>
[swarren: Mask map.virtual with PAGE_MASK. Checked for NULL results from
debug_ll_addr (e.g. when selected UART isn't valid). Fixed compile when
either !CONFIG_DEBUG_LL or CONFIG_DEBUG_SEMIHOSTING.]
Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Olof Johansson <[email protected]>

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ARM: move debug macros to common location

Based on suggestion by Russell King, create a common location for debug
macros and select the included debug macro file using config option.

Signed-off-by:

ARM: move debug macros to common location

Based on suggestion by Russell King, create a common location for debug
macros and select the included debug macro file using config option.

Signed-off-by: Rob Herring <[email protected]>
Cc: Russell King <[email protected]>

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ARM: 7338/1: add support for early console output via semihosting

This is a very simple method for code running in an emulator, or under
the supervision of a debugger, to use I/O facilities on the c

ARM: 7338/1: add support for early console output via semihosting

This is a very simple method for code running in an emulator, or under
the supervision of a debugger, to use I/O facilities on the controlling
host.

Tested with OpenOCD, and ARM's Fast Models.

Details on semihosting can be found in chapter 8 of
DUI0203I_rvct_developer_guide.pdf from ARM Ltd.

Signed-off-by: Nicolas Pitre <[email protected]>
Signed-off-by: Russell King <[email protected]>

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ARM: create a common IOMEM definition

Several platforms create IOMEM defines for casting to 'void __iomem *',
and other platforms are incorrectly using __io() macro for the same
purpose. This create

ARM: create a common IOMEM definition

Several platforms create IOMEM defines for casting to 'void __iomem *',
and other platforms are incorrectly using __io() macro for the same
purpose. This creates a common definition and removes all the platform
specific versions. Rather than try to make linux/io.h and asm/io.h
assembly safe, the assembly version of IOMEM is moved into
asm/assembler.h.

Signed-off-by: Rob Herring <[email protected]>
Cc: Russell King <[email protected]>
Cc: Sekhar Nori <[email protected]>
Cc: Kevin Hilman <[email protected]>
Acked-by: H Hartley Sweeten <[email protected]>
Cc: Ryan Mallon <[email protected]>
Cc: Eric Miao <[email protected]>
Cc: Haojian Zhuang <[email protected]>
Acked-by: David Brown <[email protected]>
Cc: Daniel Walker <[email protected]>
Cc: Bryan Huntsman <[email protected]>
Cc: Sascha Hauer <[email protected]>
Cc: Shawn Guo <[email protected]>
Acked-by: Tony Lindgren <[email protected]>
Acked-by: Paul Walmsley <[email protected]>
Acked-by: Viresh Kumar <[email protected]>
Cc: Rajeev Kumar <[email protected]>
Cc: Colin Cross <[email protected]>
Cc: Olof Johansson <[email protected]>
Cc: Stephen Warren <[email protected]>
Acked-by: Linus Walleij <[email protected]>
Acked-by: Arnd Bergmann <[email protected]>

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ARM: 7137/1: Fix error upon adding LL debug

Upon adding new board LL debug support, if the resultant code
addition would not cause PC relative offset of "hexbuf" from
"adr r2, hexbuf" (+2) instructi

ARM: 7137/1: Fix error upon adding LL debug

Upon adding new board LL debug support, if the resultant code
addition would not cause PC relative offset of "hexbuf" from
"adr r2, hexbuf" (+2) instruction to be representable in a
shifted 8-bit value (hence indirectly putting higher aligment
requirement on larger offsets), following error occurs,

arch/arm/kernel/debug.S: Assembler messages:
arch/arm/kernel/debug.S:138: Error: invalid constant (428) after fixup

Fix it by bringing "hexbuf" closer so that "adr"
can have the offset.

Signed-off-by: Afzal Mohammed <[email protected]>
Acked-by: Tony Lindgren <[email protected]>
Signed-off-by: Russell King <[email protected]>

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ARM: add an extra temp register to the low level debugging addruart macro

Some platforms (like OMAP not to name it) are doing rather complicated
hacks just to determine the base UART address to use.

ARM: add an extra temp register to the low level debugging addruart macro

Some platforms (like OMAP not to name it) are doing rather complicated
hacks just to determine the base UART address to use. Let's give their
addruart macro some slack by providing an extra work register which will
allow for much needed cleanups.

This is basically a no-op as this commit is only adding the extra argument
to the macro but no one is using it yet.

Signed-off-by: nicolas Pitre <[email protected]>
Reviewed-by: Kevin Hilman <[email protected]>

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ARM: 6826/1: Merge v6 and v7 DEBUG_LL DCC support

The inline assembly differences for v6 vs. v7 are purely
optimizations. On a v7 processor, an mrc with the pc sets the
condition codes to the 28-31

ARM: 6826/1: Merge v6 and v7 DEBUG_LL DCC support

The inline assembly differences for v6 vs. v7 are purely
optimizations. On a v7 processor, an mrc with the pc sets the
condition codes to the 28-31 bits of the register being read. It
just so happens that the TX/RX full bits the DCC support code is
testing for are high enough in the register to be put into the
condition codes. On a v6 processor, this "feature" isn't
implemented and thus we have to do the usual read, mask, test
operations to check for TX/RX full. Thus, we can drop the v7
implementation and just use the v6 implementation for both.

Cc: Tony Lindgren <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
Signed-off-by: Russell King <[email protected]>

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ARM: v6k: introduce CPU_V6K option

Introduce a CPU_V6K configuration option for platforms to select if they
have a V6K CPU core. This allows us to identify whether we need to
support ARMv6 CPUs wit

ARM: v6k: introduce CPU_V6K option

Introduce a CPU_V6K configuration option for platforms to select if they
have a V6K CPU core. This allows us to identify whether we need to
support ARMv6 CPUs without the V6K SMP extensions at build time.

Currently CPU_V6K is just an alias for CPU_V6, and all places which
reference CPU_V6 are replaced by (CPU_V6 || CPU_V6K).

Select CPU_V6K from platforms which are known to be V6K-only.

Acked-by: Tony Lindgren <[email protected]>
Tested-by: Sourav Poddar <[email protected]>
Tested-by: Will Deacon <[email protected]>
Signed-off-by: Russell King <[email protected]>

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arm: return both physical and virtual addresses from addruart

Rather than checking the MMU status in every instance of addruart, do it
once in kernel/debug.S, and change the existing addruart macros

arm: return both physical and virtual addresses from addruart

Rather than checking the MMU status in every instance of addruart, do it
once in kernel/debug.S, and change the existing addruart macros to
return both physical and virtual addresses. The main debug code can then
select the appropriate address to use.

This will also allow us to retreive the address of a uart for the MMU
state that we're not current in.

Updated with fixes for OMAP from Jason Wang <[email protected]>
and Tony Lindgren <[email protected]>, and fix for versatile express from
Lorenzo Pieralisi <[email protected]>.

Signed-off-by: Jeremy Kerr <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Signed-off-by: Jason Wang <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
Tested-by: Kevin Hilman <[email protected]>

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arm/debug: consolidate addruart macros for CONFIG_DEBUG_ICEDCC

We have the same (empty) macro for all IDEDCC flavours, so consolidate
it to one.

Signed-off-by: Jeremy Kerr <[email protected]

arm/debug: consolidate addruart macros for CONFIG_DEBUG_ICEDCC

We have the same (empty) macro for all IDEDCC flavours, so consolidate
it to one.

Signed-off-by: Jeremy Kerr <[email protected]>

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ARM: 5910/1: ARM: Add tmp register for addruart and loadsp

Otherwise more complicated uart configuration won't be possible.
We can use r1 for tmp register for both head.S and debug.S.

NOTE: This pa

ARM: 5910/1: ARM: Add tmp register for addruart and loadsp

Otherwise more complicated uart configuration won't be possible.
We can use r1 for tmp register for both head.S and debug.S.

NOTE: This patch depends on another patch to add the the tmp register
into all debug-macro.S files. That can be done with:

$ sed -i -e "s/addruart,rx|addruart, rx/addruart, rx, tmp/"
arch/arm/*/include/*/debug-macro.S

Signed-off-by: Tony Lindgren <[email protected]>
Signed-off-by: Russell King <[email protected]>

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ARM: 5884/1: arm: Fix DCC console for v7

Without this patch arch/arm/compressed/head.S defaults to generic
DCC code that does not work for v7.

For more information on the v7 DCC, see Cortex-A8 TRM

ARM: 5884/1: arm: Fix DCC console for v7

Without this patch arch/arm/compressed/head.S defaults to generic
DCC code that does not work for v7.

For more information on the v7 DCC, see Cortex-A8 TRM
"12.11.1 Debug communications channel".

To use it with post 2.6.33-rc1 or later, you need to have:

CONFIG_DEBUG_LL=y
ONFIG_DEBUG_ICEDCC=y
CONFIG_EARLY_PRINTK=y

Earlier kernels need commit 93fd03a8c6728b58879f8af20ffd55d9c32a778b
backported.

Tested on omap3430.

Signed-off-by: Tony Lindgren <[email protected]>
Signed-off-by: Russell King <[email protected]>

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[ARM] 5412/1: XSCALE: add ice dcc support

SCALE: add ice dcc support

Tested on the ixp425 with the ice PEEDI

Ack-by: Eric Miao <[email protected]>

Signed-off-by: Jean-Christophe PLAGNIOL-VILL

[ARM] 5412/1: XSCALE: add ice dcc support

SCALE: add ice dcc support

Tested on the ixp425 with the ice PEEDI

Ack-by: Eric Miao <[email protected]>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Signed-off-by: Russell King <[email protected]>

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[ARM] 5227/1: Add the ENDPROC declarations to the .S files

This declaration specifies the "function" type and size for various
assembly functions, mainly needed for generating the correct branch
ins

[ARM] 5227/1: Add the ENDPROC declarations to the .S files

This declaration specifies the "function" type and size for various
assembly functions, mainly needed for generating the correct branch
instructions in Thumb-2.

Signed-off-by: Catalin Marinas <[email protected]>
Signed-off-by: Russell King <[email protected]>

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[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach

This just leaves include/asm-arm/plat-* to deal with.

Signed-off-by: Russell King <[email protected]>