| 5935d1f1 | 06-Mar-2025 |
Krzysztof Kozlowski <[email protected]> |
dt-bindings: memory-controllers: qcom,ebi2: Enforce child props
Qualcomm EBI2 peripheral properties were moved from the device schema to
separate "peripheral-props" schema for child node, but the de
dt-bindings: memory-controllers: qcom,ebi2: Enforce child props
Qualcomm EBI2 peripheral properties were moved from the device schema to
separate "peripheral-props" schema for child node, but the device schema
does not reference the new one.
Reference the peripheral-props schema so the child nodes will be
properly validated from the device schema.
Fixes: 06652f348f28 ("dt-bindings: memory-controllers: qcom,ebi2: Split out child node properties")
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Rob Herring (Arm) <[email protected]>
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| 67bf606f | 03-Feb-2025 |
Rob Herring (Arm) <[email protected]> |
dt-bindings: memory-controllers: samsung,exynos4210-srom: Split out child node properties
In order to validate devices in child nodes, the device schemas need to
reference any child node properties.
dt-bindings: memory-controllers: samsung,exynos4210-srom: Split out child node properties
In order to validate devices in child nodes, the device schemas need to
reference any child node properties. In order to do that, the properties
for child nodes need to be included in mc-peripheral-props.yaml.
"reg: { maxItems: 1 }" was also incorrect. It's up to the device schemas
how many reg entries they have.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Rob Herring (Arm) <[email protected]>
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| 06652f34 | 03-Feb-2025 |
Rob Herring (Arm) <[email protected]> |
dt-bindings: memory-controllers: qcom,ebi2: Split out child node properties
In order to validate devices in child nodes, the device schemas need to
reference any child node properties. In order to d
dt-bindings: memory-controllers: qcom,ebi2: Split out child node properties
In order to validate devices in child nodes, the device schemas need to
reference any child node properties. In order to do that, the properties
for child nodes need to be included in mc-peripheral-props.yaml.
"reg: { maxItems: 1 }" was also incorrect. It's up to the device schemas
how many reg entries they have.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Rob Herring (Arm) <[email protected]>
show more ...
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| eba8a7b0 | 18-Aug-2024 |
Krzysztof Kozlowski <[email protected]> |
dt-bindings: memory-controllers: renesas,rpc-if: add top-level constraints
Properties with variable number of items per each device are expected to
have widest constraints in top-level "properties:"
dt-bindings: memory-controllers: renesas,rpc-if: add top-level constraints
Properties with variable number of items per each device are expected to
have widest constraints in top-level "properties:" block and further
customized (narrowed) in "if:then:". Add missing top-level constraints
for clocks.
Acked-by: Conor Dooley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Krzysztof Kozlowski <[email protected]>
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| 97dcd1ef | 26-Feb-2024 |
Christophe Kerello <[email protected]> |
dt-bindings: memory-controller: st,stm32: add MP25 support
Add a new compatible string to support MP25 SoC.
On MP1 SoC, RNB signal (NAND controller signal) and NWAIT signal (PSRAM
controller signal
dt-bindings: memory-controller: st,stm32: add MP25 support
Add a new compatible string to support MP25 SoC.
On MP1 SoC, RNB signal (NAND controller signal) and NWAIT signal (PSRAM
controller signal) have been integrated together in the SoC. That means
that the NAND controller and the PSRAM controller (if the signal is
used) can not be used at the same time. On MP25 SoC, the 2 signals can
be used outside the SoC, so there is no more restrictions.
MP1 SoC also embeds revision 1.1 of the FMC2 IP when MP25 SoC embeds
revision 2.0 of the FMC2 IP.
MP25 SoC is also using PSCI OS-initiated mode, so allow a single
'power-domains' entry for STM32 FMC2. As MP1 will move on PSCI
OS-initiated mode, add this property as optional for all FMC2 variants.
Signed-off-by: Christophe Kerello <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Krzysztof Kozlowski <[email protected]>
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| fdb88a14 | 19-Feb-2024 |
Geert Uytterhoeven <[email protected]> |
dt-bindings: memory: renesas,rpc-if: Document R-Car V4M support
Document support for the SPI Multi I/O Bus Controller (RPC-IF) in the
Renesas R-Car V4M (R8A779H0) SoC.
Signed-off-by: Geert Uytterho
dt-bindings: memory: renesas,rpc-if: Document R-Car V4M support
Document support for the SPI Multi I/O Bus Controller (RPC-IF) in the
Renesas R-Car V4M (R8A779H0) SoC.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Wolfram Sang <[email protected]>
Link: https://lore.kernel.org/r/263d6626fd4fa51b175b5c7a53e6a363e2c91519.1708354280.git.geert+renesas@glider.be
Signed-off-by: Krzysztof Kozlowski <[email protected]>
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| a98dcaaa | 13-Jul-2023 |
Krzysztof Kozlowski <[email protected]> |
dt-bindings: memory-controllers: reference TI GPMC peripheral properties
Reference the Texas Instruments GPMC Bus Child Nodes schema with
peripheral properties, in common Memory Controller bus
Perip
dt-bindings: memory-controllers: reference TI GPMC peripheral properties
Reference the Texas Instruments GPMC Bus Child Nodes schema with
peripheral properties, in common Memory Controller bus
Peripheral-specific schema, to allow properly validate devices like
davicom,dm9000.
Acked-by: Conor Dooley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Krzysztof Kozlowski <[email protected]>
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