dt-bindings: dvfs: drop unneeded quotesCleanup bindings dropping unneeded quotes. Once all these are fixed,checking for this can be enabled in yamllint.Signed-off-by: Krzysztof Kozlowski <krzysz
dt-bindings: dvfs: drop unneeded quotesCleanup bindings dropping unneeded quotes. Once all these are fixed,checking for this can be enabled in yamllint.Signed-off-by: Krzysztof Kozlowski <[email protected]>Link: https://lore.kernel.org/r/[email protected]Signed-off-by: Rob Herring <[email protected]>
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dt-bindings: dvfs: Use MediaTek CPUFREQ HW as an exampleQcom CPUFREQ HW don't have the support for generic performance domains yet.So use MediaTek CPUFREQ HW that has the support available in main
dt-bindings: dvfs: Use MediaTek CPUFREQ HW as an exampleQcom CPUFREQ HW don't have the support for generic performance domains yet.So use MediaTek CPUFREQ HW that has the support available in mainline.This also silences the below dtschema warnings for "cpufreq-qcom-hw.yaml":Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: reg: [[305397760, 4096]] is too short From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yamlDocumentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: 'clocks' is a required property From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yamlDocumentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: 'clock-names' is a required property From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yamlDocumentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: '#freq-domain-cells' is a required property From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yamlDocumentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: '#performance-domain-cells' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yamlCc: Hector Yuan <[email protected]>Cc: Sudeep Holla <[email protected]>Signed-off-by: Manivannan Sadhasivam <[email protected]>Acked-by: Sudeep Holla <[email protected]>Reviewed-by: Rob Herring <[email protected]>Signed-off-by: Viresh Kumar <[email protected]>
dt-bindings: Improve phandle-array schemasThe 'phandle-array' type is a bit ambiguous. It can be either just anarray of phandles or an array of phandles plus args. Many schemas forphandle-array p
dt-bindings: Improve phandle-array schemasThe 'phandle-array' type is a bit ambiguous. It can be either just anarray of phandles or an array of phandles plus args. Many schemas forphandle-array properties aren't clear in the schema which case appliesthough the description usually describes it.The array of phandles case boils down to needing:items: maxItems: 1The phandle plus args cases should typically take this form:items: - items: - description: A phandle - description: 1st arg cell - description: 2nd arg cellWith this change, some examples need updating so that the bracketing ofproperty values matches the schema.Signed-off-by: Rob Herring <[email protected]>Acked-by: Viresh Kumar <[email protected]>Acked-by: Vinod Koul <[email protected]>Acked-by: Ulf Hansson <[email protected]>Acked-by: Georgi Djakov <[email protected]>Reviewed-by: Geert Uytterhoeven <[email protected]>Acked-by: Mark Brown <[email protected]>Acked-by: Krzysztof Kozlowski <[email protected]>Acked-by: Stephen Boyd <[email protected]>Acked-by: Greg Kroah-Hartman <[email protected]>Acked-by: Marc Kleine-Budde <[email protected]>Link: https://lore.kernel.org/r/[email protected]
dt-bindings: dvfs: Add support for generic performance domainsThe CLKSCREW attack [0] exposed security vulnerabilities in energy managementimplementations where untrusted software had direct acces
dt-bindings: dvfs: Add support for generic performance domainsThe CLKSCREW attack [0] exposed security vulnerabilities in energy managementimplementations where untrusted software had direct access to clock andvoltage hardware controls. In this attack, the malicious software was able toplace the platform into unsafe overclocked or undervolted configurations. Suchconfigurations then enabled the injection of predictable faults to revealsecrets.Many Arm-based systems used to or still use voltage regulator and clockframeworks in the kernel. These frameworks allow callers to independentlymanipulate frequency and voltage settings. Such implementations can rendersystems susceptible to this form of attack.Attacks such as CLKSCREW are now being mitigated by not having direct andindependent control of clock and voltage in the kernel and moving thatcontrol to a trusted entity, such as the SCP firmware or secure worldfirmware/software which are to perform sanity checking on the requestedperformance levels, thereby preventing any attempted malicious programming.With the advent of such an abstraction, there is a need to replace thegeneric clock and regulator bindings used by such devices with a genericperformance domains bindings.[0] https://www.usenix.org/conference/usenixsecurity17/technical-sessions/presentation/tangCc: Rob Herring <[email protected]>Acked-by: Viresh Kumar <[email protected]>Signed-off-by: Sudeep Holla <[email protected]>Reviewed-by: Rob Herring <[email protected]>Signed-off-by: Viresh Kumar <[email protected]>