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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5 |
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f4818881 |
| 22-Jun-2024 |
Pawan Gupta <[email protected]> |
x86/its: Enable Indirect Target Selection mitigation
Indirect Target Selection (ITS) is a bug in some pre-ADL Intel CPUs with eIBRS. It affects prediction of indirect branch and RETs in the lower ha
x86/its: Enable Indirect Target Selection mitigation
Indirect Target Selection (ITS) is a bug in some pre-ADL Intel CPUs with eIBRS. It affects prediction of indirect branch and RETs in the lower half of cacheline. Due to ITS such branches may get wrongly predicted to a target of (direct or indirect) branch that is located in the upper half of the cacheline.
Scope of impact ===============
Guest/host isolation -------------------- When eIBRS is used for guest/host isolation, the indirect branches in the VMM may still be predicted with targets corresponding to branches in the guest.
Intra-mode ---------- cBPF or other native gadgets can be used for intra-mode training and disclosure using ITS.
User/kernel isolation --------------------- When eIBRS is enabled user/kernel isolation is not impacted.
Indirect Branch Prediction Barrier (IBPB) ----------------------------------------- After an IBPB, indirect branches may be predicted with targets corresponding to direct branches which were executed prior to IBPB. This is mitigated by a microcode update.
Add cmdline parameter indirect_target_selection=off|on|force to control the mitigation to relocate the affected branches to an ITS-safe thunk i.e. located in the upper half of cacheline. Also add the sysfs reporting.
When retpoline mitigation is deployed, ITS safe-thunks are not needed, because retpoline sequence is already ITS-safe. Similarly, when call depth tracking (CDT) mitigation is deployed (retbleed=stuff), ITS safe return thunk is not used, as CDT prevents RSB-underflow.
To not overcomplicate things, ITS mitigation is not supported with spectre-v2 lfence;jmp mitigation. Moreover, it is less practical to deploy lfence;jmp mitigation on ITS affected parts anyways.
Signed-off-by: Pawan Gupta <[email protected]> Signed-off-by: Dave Hansen <[email protected]> Reviewed-by: Josh Poimboeuf <[email protected]> Reviewed-by: Alexandre Chartre <[email protected]>
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c91c6062 |
| 12-Aug-2024 |
Sourabh Jain <[email protected]> |
Document/kexec: generalize crash hotplug description
Commit 79365026f869 ("crash: add a new kexec flag for hotplug support") generalizes the crash hotplug support to allow architectures to update mu
Document/kexec: generalize crash hotplug description
Commit 79365026f869 ("crash: add a new kexec flag for hotplug support") generalizes the crash hotplug support to allow architectures to update multiple kexec segments on CPU/Memory hotplug and not just elfcorehdr. Therefore, update the relevant kernel documentation to reflect the same.
No functional change.
Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Sourabh Jain <[email protected]> Reviewed-by: Petr Tesarik <[email protected]> Acked-by: Baoquan He <[email protected]> Cc: Hari Bathini <[email protected]> Cc: Petr Tesarik <[email protected]> Cc: Sourabh Jain <[email protected]> Cc: Jonathan Corbet <[email protected]> Signed-off-by: Andrew Morton <[email protected]>
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6c17ea1f |
| 31-Jul-2024 |
Nysal Jan K.A <[email protected]> |
cpu/SMT: Enable SMT only if a core is online
If a core is offline then enabling SMT should not online CPUs of this core. By enabling SMT, what is intended is either changing the SMT value from "off"
cpu/SMT: Enable SMT only if a core is online
If a core is offline then enabling SMT should not online CPUs of this core. By enabling SMT, what is intended is either changing the SMT value from "off" to "on" or setting the SMT level (threads per core) from a lower to higher value.
On PowerPC the ppc64_cpu utility can be used, among other things, to perform the following functions:
ppc64_cpu --cores-on # Get the number of online cores ppc64_cpu --cores-on=X # Put exactly X cores online ppc64_cpu --offline-cores=X[,Y,...] # Put specified cores offline ppc64_cpu --smt={on|off|value} # Enable, disable or change SMT level
If the user has decided to offline certain cores, enabling SMT should not online CPUs in those cores. This patch fixes the issue and changes the behaviour as described, by introducing an arch specific function topology_is_core_online(). It is currently implemented only for PowerPC.
Fixes: 73c58e7e1412 ("powerpc: Add HOTPLUG_SMT support") Reported-by: Tyrel Datwyler <[email protected]> Closes: https://groups.google.com/g/powerpc-utils-devel/c/wrwVzAAnRlI/m/5KJSoqP4BAAJ Signed-off-by: Nysal Jan K.A <[email protected]> Reviewed-by: Shrikanth Hegde <[email protected]> Reviewed-by: Thomas Gleixner <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/[email protected]
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Revision tags: v6.10-rc4, v6.10-rc3, v6.10-rc2 |
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4e1a7df4 |
| 29-May-2024 |
James Morse <[email protected]> |
cpumask: Add enabled cpumask for present CPUs that can be brought online
The 'offline' file in sysfs shows all offline CPUs, including those that aren't present. User-space is expected to remove not
cpumask: Add enabled cpumask for present CPUs that can be brought online
The 'offline' file in sysfs shows all offline CPUs, including those that aren't present. User-space is expected to remove not-present CPUs from this list to learn which CPUs could be brought online.
CPUs can be present but not-enabled. These CPUs can't be brought online until the firmware policy changes, which comes with an ACPI notification that will register the CPUs.
With only the offline and present files, user-space is unable to determine which CPUs it can try to bring online. Add a new CPU mask that shows this based on all the registered CPUs.
Signed-off-by: James Morse <[email protected]> Tested-by: Miguel Luis <[email protected]> Tested-by: Vishnu Pajjuri <[email protected]> Tested-by: Jianyong Wu <[email protected]> Acked-by: Thomas Gleixner <[email protected]> Signed-off-by: Russell King (Oracle) <[email protected]> Reviewed-by: Gavin Shan <[email protected]> Signed-off-by: Jonathan Cameron <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Catalin Marinas <[email protected]>
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61564d34 |
| 05-Jun-2024 |
Tom Lendacky <[email protected]> |
x86/sev: Provide guest VMPL level to userspace
Requesting an attestation report from userspace involves providing the VMPL level for the report. Currently any value from 0-3 is valid because Linux e
x86/sev: Provide guest VMPL level to userspace
Requesting an attestation report from userspace involves providing the VMPL level for the report. Currently any value from 0-3 is valid because Linux enforces running at VMPL0.
When an SVSM is present, though, Linux will not be running at VMPL0 and only VMPL values starting at the VMPL level Linux is running at to 3 are valid. In order to allow userspace to determine the minimum VMPL value that can be supplied to an attestation report, create a sysfs entry that can be used to retrieve the current VMPL level of the kernel.
[ bp: Add CONFIG_SYSFS ifdeffery. ]
Signed-off-by: Tom Lendacky <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Link: https://lore.kernel.org/r/fff846da0d8d561f9fdaf297dcf8cd907545a25b.1717600736.git.thomas.lendacky@amd.com
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Revision tags: v6.10-rc1, v6.9, v6.9-rc7 |
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fae57306 |
| 03-May-2024 |
Stephen Rothwell <[email protected]> |
Documentation: Fix the address of the linuxppc-dev mailing list
This list was moved many years ago.
Signed-off-by: Stephen Rothwell <[email protected]> Signed-off-by: Michael Ellerman <mpe@eller
Documentation: Fix the address of the linuxppc-dev mailing list
This list was moved many years ago.
Signed-off-by: Stephen Rothwell <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://msgid.link/[email protected]
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Revision tags: v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1 |
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8076fcde |
| 11-Mar-2024 |
Pawan Gupta <[email protected]> |
x86/rfds: Mitigate Register File Data Sampling (RFDS)
RFDS is a CPU vulnerability that may allow userspace to infer kernel stale data previously used in floating point registers, vector registers an
x86/rfds: Mitigate Register File Data Sampling (RFDS)
RFDS is a CPU vulnerability that may allow userspace to infer kernel stale data previously used in floating point registers, vector registers and integer registers. RFDS only affects certain Intel Atom processors.
Intel released a microcode update that uses VERW instruction to clear the affected CPU buffers. Unlike MDS, none of the affected cores support SMT.
Add RFDS bug infrastructure and enable the VERW based mitigation by default, that clears the affected buffers just before exiting to userspace. Also add sysfs reporting and cmdline parameter "reg_file_data_sampling" to control the mitigation.
For details see: Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst
Signed-off-by: Pawan Gupta <[email protected]> Signed-off-by: Dave Hansen <[email protected]> Reviewed-by: Thomas Gleixner <[email protected]> Acked-by: Josh Poimboeuf <[email protected]>
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Revision tags: v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4 |
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94483490 |
| 13-Jan-2023 |
Ard Biesheuvel <[email protected]> |
Documentation: Drop or replace remaining mentions of IA64
Drop or update mentions of IA64, as appropriate.
Signed-off-by: Ard Biesheuvel <[email protected]>
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88a6f899 |
| 14-Aug-2023 |
Eric DeVolder <[email protected]> |
crash: memory and CPU hotplug sysfs attributes
Introduce the crash_hotplug attribute for memory and CPUs for use by userspace. These attributes directly facilitate the udev rule for managing usersp
crash: memory and CPU hotplug sysfs attributes
Introduce the crash_hotplug attribute for memory and CPUs for use by userspace. These attributes directly facilitate the udev rule for managing userspace re-loading of the crash kernel upon hot un/plug changes.
For memory, expose the crash_hotplug attribute to the /sys/devices/system/memory directory. For example:
# udevadm info --attribute-walk /sys/devices/system/memory/memory81 looking at device '/devices/system/memory/memory81': KERNEL=="memory81" SUBSYSTEM=="memory" DRIVER=="" ATTR{online}=="1" ATTR{phys_device}=="0" ATTR{phys_index}=="00000051" ATTR{removable}=="1" ATTR{state}=="online" ATTR{valid_zones}=="Movable"
looking at parent device '/devices/system/memory': KERNELS=="memory" SUBSYSTEMS=="" DRIVERS=="" ATTRS{auto_online_blocks}=="offline" ATTRS{block_size_bytes}=="8000000" ATTRS{crash_hotplug}=="1"
For CPUs, expose the crash_hotplug attribute to the /sys/devices/system/cpu directory. For example:
# udevadm info --attribute-walk /sys/devices/system/cpu/cpu0 looking at device '/devices/system/cpu/cpu0': KERNEL=="cpu0" SUBSYSTEM=="cpu" DRIVER=="processor" ATTR{crash_notes}=="277c38600" ATTR{crash_notes_size}=="368" ATTR{online}=="1"
looking at parent device '/devices/system/cpu': KERNELS=="cpu" SUBSYSTEMS=="" DRIVERS=="" ATTRS{crash_hotplug}=="1" ATTRS{isolated}=="" ATTRS{kernel_max}=="8191" ATTRS{nohz_full}==" (null)" ATTRS{offline}=="4-7" ATTRS{online}=="0-3" ATTRS{possible}=="0-7" ATTRS{present}=="0-3"
With these sysfs attributes in place, it is possible to efficiently instruct the udev rule to skip crash kernel reloading for kernels configured with crash hotplug support.
For example, the following is the proposed udev rule change for RHEL system 98-kexec.rules (as the first lines of the rule file):
# The kernel updates the crash elfcorehdr for CPU and memory changes SUBSYSTEM=="cpu", ATTRS{crash_hotplug}=="1", GOTO="kdump_reload_end" SUBSYSTEM=="memory", ATTRS{crash_hotplug}=="1", GOTO="kdump_reload_end"
When examined in the context of 98-kexec.rules, the above rules test if crash_hotplug is set, and if so, the userspace initiated unload-then-reload of the crash kernel is skipped.
CPU and memory checks are separated in accordance with CONFIG_HOTPLUG_CPU and CONFIG_MEMORY_HOTPLUG kernel config options. If an architecture supports, for example, memory hotplug but not CPU hotplug, then the /sys/devices/system/memory/crash_hotplug attribute file is present, but the /sys/devices/system/cpu/crash_hotplug attribute file will NOT be present. Thus the udev rule skips userspace processing of memory hot un/plug events, but the udev rule will evaluate false for CPU events, thus allowing userspace to process CPU hot un/plug events (ie the unload-then-reload of the kdump capture kernel).
Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Eric DeVolder <[email protected]> Reviewed-by: Sourabh Jain <[email protected]> Acked-by: Hari Bathini <[email protected]> Acked-by: Baoquan He <[email protected]> Cc: Akhil Raj <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: Borislav Petkov (AMD) <[email protected]> Cc: Boris Ostrovsky <[email protected]> Cc: Dave Hansen <[email protected]> Cc: Dave Young <[email protected]> Cc: David Hildenbrand <[email protected]> Cc: Eric W. Biederman <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: "H. Peter Anvin" <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Jonathan Corbet <[email protected]> Cc: Konrad Rzeszutek Wilk <[email protected]> Cc: Mimi Zohar <[email protected]> Cc: Naveen N. Rao <[email protected]> Cc: Oscar Salvador <[email protected]> Cc: "Rafael J. Wysocki" <[email protected]> Cc: Sean Christopherson <[email protected]> Cc: Takashi Iwai <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Thomas Weißschuh <[email protected]> Cc: Valentin Schneider <[email protected]> Cc: Vivek Goyal <[email protected]> Cc: Vlastimil Babka <[email protected]> Signed-off-by: Andrew Morton <[email protected]>
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7f48405c |
| 05-Jul-2023 |
Michael Ellerman <[email protected]> |
cpu/SMT: Allow enabling partial SMT states via sysfs
Add support to the /sys/devices/system/cpu/smt/control interface for enabling a specified number of SMT threads per core, including partial SMT s
cpu/SMT: Allow enabling partial SMT states via sysfs
Add support to the /sys/devices/system/cpu/smt/control interface for enabling a specified number of SMT threads per core, including partial SMT states where not all threads are brought online.
The current interface accepts "on" and "off", to enable either 1 or all SMT threads per core.
This commit allows writing an integer, between 1 and the number of SMT threads supported by the machine. Writing 1 is a synonym for "off", 2 or more enables SMT with the specified number of threads.
When reading the file, if all threads are online "on" is returned, to avoid changing behaviour for existing users. If some other number of threads is online then the integer value is returned.
Architectures like x86 only supporting 1 thread or all threads, should not define CONFIG_SMT_NUM_THREADS_DYNAMIC. Architecture supporting partial SMT states, like PowerPC, should define it.
[ ldufour: Slightly reword the commit's description ] [ ldufour: Remove switch() in __store_smt_control() ] [ ldufour: Rix build issue in control_show() ]
Reported-by: kernel test robot <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Signed-off-by: Laurent Dufour <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Tested-by: Zhang Rui <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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8974eb58 |
| 13-Jul-2023 |
Daniel Sneddon <[email protected]> |
x86/speculation: Add Gather Data Sampling mitigation
Gather Data Sampling (GDS) is a hardware vulnerability which allows unprivileged speculative access to data which was previously stored in vector
x86/speculation: Add Gather Data Sampling mitigation
Gather Data Sampling (GDS) is a hardware vulnerability which allows unprivileged speculative access to data which was previously stored in vector registers.
Intel processors that support AVX2 and AVX512 have gather instructions that fetch non-contiguous data elements from memory. On vulnerable hardware, when a gather instruction is transiently executed and encounters a fault, stale data from architectural or internal vector registers may get transiently stored to the destination vector register allowing an attacker to infer the stale data using typical side channel techniques like cache timing attacks.
This mitigation is different from many earlier ones for two reasons. First, it is enabled by default and a bit must be set to *DISABLE* it. This is the opposite of normal mitigation polarity. This means GDS can be mitigated simply by updating microcode and leaving the new control bit alone.
Second, GDS has a "lock" bit. This lock bit is there because the mitigation affects the hardware security features KeyLocker and SGX. It needs to be enabled and *STAY* enabled for these features to be mitigated against GDS.
The mitigation is enabled in the microcode by default. Disable it by setting gather_data_sampling=off or by disabling all mitigations with mitigations=off. The mitigation status can be checked by reading:
/sys/devices/system/cpu/vulnerabilities/gather_data_sampling
Signed-off-by: Daniel Sneddon <[email protected]> Signed-off-by: Dave Hansen <[email protected]> Acked-by: Josh Poimboeuf <[email protected]>
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e4624435 |
| 12-Jun-2023 |
Jonathan Corbet <[email protected]> |
docs: arm64: Move arm64 documentation under Documentation/arch/
Architecture-specific documentation is being moved into Documentation/arch/ as a way of cleaning up the top-level documentation direct
docs: arm64: Move arm64 documentation under Documentation/arch/
Architecture-specific documentation is being moved into Documentation/arch/ as a way of cleaning up the top-level documentation directory and making the docs hierarchy more closely match the source hierarchy. Move Documentation/arm64 into arch/ (along with the Chinese equvalent translations) and fix up documentation references.
Cc: Will Deacon <[email protected]> Cc: Alex Shi <[email protected]> Cc: Hu Haowen <[email protected]> Cc: Paolo Bonzini <[email protected]> Acked-by: Catalin Marinas <[email protected]> Reviewed-by: Yantengsi <[email protected]> Signed-off-by: Jonathan Corbet <[email protected]>
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Revision tags: v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1 |
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8a7f0e8a |
| 01-Aug-2022 |
Randy Dunlap <[email protected]> |
Documentation/ABI: correct possessive "its" typos
Correct all uses of "it's" that are meant to be possessive "its".
Signed-off-by: Randy Dunlap <[email protected]> Cc: Jonathan Corbet <corbet@l
Documentation/ABI: correct possessive "its" typos
Correct all uses of "it's" that are meant to be possessive "its".
Signed-off-by: Randy Dunlap <[email protected]> Cc: Jonathan Corbet <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Corbet <[email protected]>
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00da0cb3 |
| 01-Aug-2022 |
Salvatore Bonaccorso <[email protected]> |
Documentation/ABI: Mention retbleed vulnerability info file for sysfs
While reporting for the AMD retbleed vulnerability was added in
6b80b59b3555 ("x86/bugs: Report AMD retbleed vulnerability")
Documentation/ABI: Mention retbleed vulnerability info file for sysfs
While reporting for the AMD retbleed vulnerability was added in
6b80b59b3555 ("x86/bugs: Report AMD retbleed vulnerability")
the new sysfs file was not mentioned so far in the ABI documentation for sysfs-devices-system-cpu. Fix that.
Fixes: 6b80b59b3555 ("x86/bugs: Report AMD retbleed vulnerability") Signed-off-by: Salvatore Bonaccorso <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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Revision tags: v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4 |
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1d248d23 |
| 26-Jun-2022 |
Mauro Carvalho Chehab <[email protected]> |
ABI: testing/sysfs-devices-system-cpu: remove duplicated core_id
This was already defined at stable/sysfs-devices-system-cpu with the same description, as pointed by get_abi.pl:
Warning: /sys/devi
ABI: testing/sysfs-devices-system-cpu: remove duplicated core_id
This was already defined at stable/sysfs-devices-system-cpu with the same description, as pointed by get_abi.pl:
Warning: /sys/devices/system/cpu/cpuX/topology/core_id is defined 2 times: Documentation/ABI/stable/sysfs-devices-system-cpu:38 Documentation/ABI/testing/sysfs-devices-system-cpu:69
Remove the duplicated one.
Signed-off-by: Mauro Carvalho Chehab <[email protected]> Link: https://lore.kernel.org/r/1e92337c1ef74f5eb9e1c1871e20b858b490d269.1656235926.git.mchehab@kernel.org Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v5.19-rc3, v5.19-rc2 |
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| #
d69d5649 |
| 07-Jun-2022 |
Mark Brown <[email protected]> |
arm64/sme: Expose SMIDR through sysfs
We currently expose MIDR and REVID to userspace through sysfs to enable it to make decisions based on the specific implementation. Since SME supports implementa
arm64/sme: Expose SMIDR through sysfs
We currently expose MIDR and REVID to userspace through sysfs to enable it to make decisions based on the specific implementation. Since SME supports implementations where streaming mode is provided by a separate hardware unit called a SMCU it provides a similar ID register SMIDR. Expose it to userspace via sysfs when the system supports SME along with the other ID registers.
Since we disable the SME priority mapping feature if it is supported by hardware we currently mask out the SMPS bit which reports that it is supported.
Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
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Revision tags: v5.19-rc1, v5.18 |
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8d50cdf8 |
| 20-May-2022 |
Pawan Gupta <[email protected]> |
x86/speculation/mmio: Add sysfs reporting for Processor MMIO Stale Data
Add the sysfs reporting file for Processor MMIO Stale Data vulnerability. It exposes the vulnerability and mitigation state si
x86/speculation/mmio: Add sysfs reporting for Processor MMIO Stale Data
Add the sysfs reporting file for Processor MMIO Stale Data vulnerability. It exposes the vulnerability and mitigation state similar to the existing files for the other hardware vulnerabilities.
Signed-off-by: Pawan Gupta <[email protected]> Signed-off-by: Borislav Petkov <[email protected]>
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Revision tags: v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8 |
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9986c765 |
| 09-Mar-2022 |
Evgenii Stepanov <[email protected]> |
docs: sysfs-devices-system-cpu: document "asymm" value for mte_tcf_preferred
It was added in commit 766121ba5de3 ("arm64/mte: Add userspace interface for enabling asymmetric mode").
Signed-off-by:
docs: sysfs-devices-system-cpu: document "asymm" value for mte_tcf_preferred
It was added in commit 766121ba5de3 ("arm64/mte: Add userspace interface for enabling asymmetric mode").
Signed-off-by: Evgenii Stepanov <[email protected]> Reviewed-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
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Revision tags: v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3 |
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ab28e944 |
| 31-Jan-2022 |
Tony Luck <[email protected]> |
topology/sysfs: Add PPIN in sysfs under cpu topology
PPIN is the Protected Processor Identification Number. This is used to identify the socket as a Field Replaceable Unit (FRU).
Existing code only
topology/sysfs: Add PPIN in sysfs under cpu topology
PPIN is the Protected Processor Identification Number. This is used to identify the socket as a Field Replaceable Unit (FRU).
Existing code only displays this when reporting errors. But this makes it inconvenient for large clusters to use it for its intended purpose of inventory control.
Add ppin to /sys/devices/system/cpu/cpu*/topology to make what is already available using RDMSR more easily accessible. Make the file read only for root in case there are still people concerned about making a unique system "serial number" available.
Signed-off-by: Tony Luck <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Acked-by: Greg Kroah-Hartman <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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Revision tags: v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4 |
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02bf6074 |
| 01-Dec-2021 |
Kohei Tarumizu <[email protected]> |
docs: document the sysfs ABI for "isolated"
Add missing documentation of sysfs ABI for "isolated". It was added by commit 59f30abe94bf("show isolated cpus in sysfs"). However, there is no documentat
docs: document the sysfs ABI for "isolated"
Add missing documentation of sysfs ABI for "isolated". It was added by commit 59f30abe94bf("show isolated cpus in sysfs"). However, there is no documentation for these interface.
Signed-off-by: Kohei Tarumizu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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3722e7c3 |
| 01-Dec-2021 |
Kohei Tarumizu <[email protected]> |
docs: document the sysfs ABI for "nohz_full"
Add missing documentation of sysfs ABI for "nohz_full". It was added by commit 6570a9a1ce3a("show nohz_full cpus in sysfs"). However, there is no documen
docs: document the sysfs ABI for "nohz_full"
Add missing documentation of sysfs ABI for "nohz_full". It was added by commit 6570a9a1ce3a("show nohz_full cpus in sysfs"). However, there is no documentation for these interface.
Signed-off-by: Kohei Tarumizu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4 |
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abcb948d |
| 30-Sep-2021 |
Mauro Carvalho Chehab <[email protected]> |
ABI: sysfs-devices-system-cpu: use cpuX instead of cpu#
Some What entries here use cpu# as a wildcard, while others use, instead, cpuX.
As scripts/get_abi.pl doesn't consider "#" as a wildcard, rep
ABI: sysfs-devices-system-cpu: use cpuX instead of cpu#
Some What entries here use cpu# as a wildcard, while others use, instead, cpuX.
As scripts/get_abi.pl doesn't consider "#" as a wildcard, replace:
cpu# -> cpuX
inside the file.
Signed-off-by: Mauro Carvalho Chehab <[email protected]> Link: https://lore.kernel.org/r/60b1a79189d1a9d9f1c9c9c299770e69b18972fd.1632994837.git.mchehab+huawei@kernel.org Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v5.15-rc3, v5.15-rc2 |
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26d6ba2f |
| 16-Sep-2021 |
Mauro Carvalho Chehab <[email protected]> |
ABI: sysfs-devices-system-cpu: use wildcards on What definitions
An "N" upper letter is not a wildcard, nor can easily be identified by script, specially since the USB sysfs define things like. bNum
ABI: sysfs-devices-system-cpu: use wildcards on What definitions
An "N" upper letter is not a wildcard, nor can easily be identified by script, specially since the USB sysfs define things like. bNumInterfaces. Use, instead, <N>, in order to let script/get_abi.pl to convert it into a Regex.
Signed-off-by: Mauro Carvalho Chehab <[email protected]> Link: https://lore.kernel.org/r/d18385a391b6797373a5d1382ea024857fb29987.1631782432.git.mchehab+huawei@kernel.org Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4 |
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7af33504 |
| 30-Jul-2021 |
Will Deacon <[email protected]> |
arm64: Advertise CPUs capable of running 32-bit applications in sysfs
Since 32-bit applications will be killed if they are caught trying to execute on a 64-bit-only CPU in a mismatched system, adver
arm64: Advertise CPUs capable of running 32-bit applications in sysfs
Since 32-bit applications will be killed if they are caught trying to execute on a 64-bit-only CPU in a mismatched system, advertise the set of 32-bit capable CPUs to userspace in sysfs.
Signed-off-by: Will Deacon <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Reviewed-by: Greg Kroah-Hartman <[email protected]> Reviewed-by: Catalin Marinas <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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80c7c36f |
| 27-Jul-2021 |
Peter Collingbourne <[email protected]> |
Documentation: document the preferred tag checking mode feature
Document the functionality added in the previous patches.
Link: https://linux-review.googlesource.com/id/I48217cc3e8b8da33abc08cbaddc
Documentation: document the preferred tag checking mode feature
Document the functionality added in the previous patches.
Link: https://linux-review.googlesource.com/id/I48217cc3e8b8da33abc08cbaddc11cf4360a1b86 Signed-off-by: Peter Collingbourne <[email protected]> Reviewed-by: Catalin Marinas <[email protected]> Acked-by: Will Deacon <[email protected]> Link: https://lore.kernel.org/r/[email protected] Acked-by: Will Deacon <[email protected]> [[email protected]: clarify that the change happens on task scheduling] Signed-off-by: Catalin Marinas <[email protected]>
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