dev/uart: Add APMC0D08 as found in the Intel E2100

This uart has the requirement for 32-bit sized and aligned memory
accesses. It is also described in the Serial Port Console Redirection
Table (SPCR

dev/uart: Add APMC0D08 as found in the Intel E2100

This uart has the requirement for 32-bit sized and aligned memory
accesses. It is also described in the Serial Port Console Redirection
Table (SPCR) with a different interface type value.

Reviewed by: imp
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D45834

(cherry picked from commit 9840598aa31f2a89272f5bef6545e316f254f0c6)

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uart(4): Honor hardware state of NS8250-class for tsw_busy

In 9750d9e5, I brought the equivalent of the TS_BUSY flag back in a
mostly hardware-agnostic way in order to fix tty_drain() and, thus,
TIO

uart(4): Honor hardware state of NS8250-class for tsw_busy

In 9750d9e5, I brought the equivalent of the TS_BUSY flag back in a
mostly hardware-agnostic way in order to fix tty_drain() and, thus,
TIOCDRAIN for UARTs with TX FIFOs. This proved to be sufficient for
fixing the regression reported. So in light of the release cycle of
FreeBSD 10.3, I decided that this change was be good enough for the
time being and opted to go with the smallest possible yet generic
(for all UARTs driven by uart(4)) solution addressing the problem at
hand.

However, at least for the NS8250-class the above isn't a complete
fix as these UARTs only trigger an interrupt when the TX FIFO became
empty. At this point, there still can be an outstanding character
left in the transmit shift register as indicated via the LSR. Thus,
this change adds the 3rd (besides the tty(4) and generic uart(4) bits)
part I had in my tree ever since, adding a uart_txbusy method to be
queried in addition for tsw_busy and hooking it up as appropriate
for the NS8250-class.

As it turns out, the exact equivalent of this 3rd part later on was
implemented for uftdi(4) in 9ad221a5.

While at it, explain the rational behind the deliberately missing
locking in uart_tty_busy() (also applying to the generic sc_txbusy
testing already present).

(cherry picked from commit 353e4c5a068d06b0d6dcfa9eb736ecb16e9eae45)

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sys: Remove $FreeBSD$: one-line .c pattern

Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/

spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of

spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of BSD-2-Clause.

Discussed with: pfg
MFC After: 3 days
Sponsored by: Netflix

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uart: Don't change settings or throttle putc for Hyper-V

Azure setup does not like it when FreeBSD overrides the settings of the
UART device. When Hyper-V is detected, don't do this and also don't
t

uart: Don't change settings or throttle putc for Hyper-V

Azure setup does not like it when FreeBSD overrides the settings of the
UART device. When Hyper-V is detected, don't do this and also don't
throttle putc() output. This is a workaround for the early boot hang
of FreeBSD on Azure.

Tested on Azure, ESXi (VM with serial port), and SG-8200

PR: 264267
Reviewed by: kevans, whu
Tested by: whu
Obtained from: Rubicon Communications, LLC (Netgate)
MFC after: 2 weeks
Sponsored by: Rubicon Communications, LLC (Netgate)

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ns8250: Fix sense of LSR_TEMT FCR check

When flushing the UART, we need to drain manually if LSR_TEMT is
*not* asserted, aka. if the transmit FIFO is not empty.

Reported by: void <[email protected]>
Fixe

ns8250: Fix sense of LSR_TEMT FCR check

When flushing the UART, we need to drain manually if LSR_TEMT is
*not* asserted, aka. if the transmit FIFO is not empty.

Reported by: void <[email protected]>
Fixes: c4b68e7e53bb "ns8250: Check if flush via FCR succeeded"
Differential Revision: https://reviews.freebsd.org/D37185

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ns8250: Check if flush via FCR succeeded

The emulated UART in the Firecracker VMM (aka the implementation in the
rust-vmm/vm-superio project) includes FIFOs but does not implement the
FCR register,

ns8250: Check if flush via FCR succeeded

The emulated UART in the Firecracker VMM (aka the implementation in the
rust-vmm/vm-superio project) includes FIFOs but does not implement the
FCR register, which is used by ns8250_flush to flush the FIFOs.

Check the LSR to see if there is still data in the FIFOs and call
ns8250_drain if necessary.

Discussed with: emaste, imp, jrtc27
Sponsored by: https://patreon.com/cperciva
Differential Revision: https://reviews.freebsd.org/D36979

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ns8250_drain: Drain without DELAY first

In virtual machines with virtual UARTs which have fictitious baud
rates, it may be possible to drain the receive queue very quickly,
without needing to DELAY

ns8250_drain: Drain without DELAY first

In virtual machines with virtual UARTs which have fictitious baud
rates, it may be possible to drain the receive queue very quickly,
without needing to DELAY after each character. Attempt to read
(and discard) the receive queue as fast as possible, stopping for
a DELAY only when LSR_RXRDY is no longer asserted; assume that we
have finished draining the queue when LSR_RXRDY is asserted both
before and after a DELAY.

This speeds up the boot process in FreeBSD/Firecracker by 27 ms.

Reviewed by: imp, jrtc27
Sponsored by: https://www.patreon.com/cperciva
Differential Revision: https://reviews.freebsd.org/D36184

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uart: Add ACPI entry for LS1046A UART

NXP defines unique name for LS1046A UART - "NXP0018".
It is ns8250 compatible, adding a new uart compat data entry is enough
to make it work.
Tested on LS1046AR

uart: Add ACPI entry for LS1046A UART

NXP defines unique name for LS1046A UART - "NXP0018".
It is ns8250 compatible, adding a new uart compat data entry is enough
to make it work.
Tested on LS1046ARDB.

Approved by: mw(mentor)
Reviewed by: mw, kd
Obtained from: Semihalf
Differential Revision: https://reviews.freebsd.org/D36260

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uart: Fix an out-of-bounds read in ns8250_bus_probe()

The problem is that ns8250_bus_probe() accesses a field from the
ns8250_softc, which embeds the generic UART softc, but the ns8250_softc
hasn't

uart: Fix an out-of-bounds read in ns8250_bus_probe()

The problem is that ns8250_bus_probe() accesses a field from the
ns8250_softc, which embeds the generic UART softc, but the ns8250_softc
hasn't yet been allocated because we're still probing.

This is a regression from commit 0aefb0a63c50. This fixed a problem
where one of the upper four IER bits, which are usually reserved, needs
to be set in order to get RX interrupts before the RX FIFO is full. At
the same time, we avoid clearing those reserved bits (see commit
58957d87173, though other UART drivers I looked at do not bother with
this).

So, copy what ns8250_init() does to disable interrupts, since we don't
know what the "right" mask is at this point.

Reported by: [email protected]
Reviewed by: imp
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D31124

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uart_dev_ns8250: Switch ACPI UART subtype for Marvell SoCs

DBG2 ACPI table description [1] specifies three subtypes
related to 16550 UART:
0x0 - 16550 compatible
0x1 - 16550 subset
0x12 - 16550 comp

uart_dev_ns8250: Switch ACPI UART subtype for Marvell SoCs

DBG2 ACPI table description [1] specifies three subtypes
related to 16550 UART:
0x0 - 16550 compatible
0x1 - 16550 subset
0x12 - 16550 compatible with parameters defined in Generic Address Structure (GAS)

It turned out however, that the Windows OS treats 0x0 subtype as
legacy x86 UART with 8-bit access. ARM SoCs can use types 0x1 (16550 with
fixed mmio32 access) or 0x12 (16550 with fully respected GAS contents).

Switch Marvell SoCs ACPI UART subtype to 0x1 - thanks to that the same firmware
can run properly with UART output in FreeBSD, Windows 10, Linux and ESXI
hypervisor. Tests showed the older firmware versions that use 0x0
UART subtype in SPCR table continue to display output properly.

[1] https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-debug-port-table

Obtained from: Semihalf
Sponsored by: ARM
Differential revision: https://reviews.freebsd.org/D30386
MFC after: 2 weeks

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ns8250: don't drop IER_TXRDY on bus_grab/ungrab

It has been observed that some systems are often unable to resume from
ddb after entering with debug.kdb.enter=1. Checking the status further
shows th

ns8250: don't drop IER_TXRDY on bus_grab/ungrab

It has been observed that some systems are often unable to resume from
ddb after entering with debug.kdb.enter=1. Checking the status further
shows the terminal is blocked waiting in tty_drain(), but it never makes
progress in clearing the output queue, because sc->sc_txbusy is high.

I noticed that when entering polling mode for the debugger, IER_TXRDY is
set in the failure case. Since this bit is never tracked by the softc,
it will not be restored by ns8250_bus_ungrab(). This creates a race in
which a TX interrupt can be lost, creating the hang described above.
Ensuring that this bit is restored is enough to prevent this, and resume
from ddb as expected.

The solution is to track this bit in the sc->ier field, for the same
lifetime that TX interrupts are enabled.

PR: 223917, 240122
Reviewed by: imp, manu
Tested by: bz
MFC after: 5 days
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D29130

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uart: clean up empty lines in .c and .h files

Correct baud rate error calculation.

Shifting right by 1 is not the same as dividing by 2 for signed
values. In particular, dividing a signed value by 2 gives the integer
ceiling of the (e.g. -5 /

Correct baud rate error calculation.

Shifting right by 1 is not the same as dividing by 2 for signed
values. In particular, dividing a signed value by 2 gives the integer
ceiling of the (e.g. -5 / 2 == -2) whereas shifting right by 1 always
gives the floor (-5 >> 1 == -3).

An embedded board with a 25 Mhz base clock results in an error of
-30.5% when used with a baud rate of 115200. Using division, this
truncates to -30% and is permitted. Using the shift, this fails and
is rejected causing TIOCSETA requests to fail with EINVAL and breaking
getty(8).

Using division gives the same error range for both over and under baud
rates and also makes the code match the behavior documented in the
existing comment about supporting boards with 25 Mhz clocks.

Reported by: imp
MFC after: 2 weeks
Sponsored by: DARPA
Differential Revision: https://reviews.freebsd.org/D24367

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Relax TX draining in ns8250_bus_transmit().

Since TX interrupt is generated when THRE is set, wait for TEMT set means
wait for full character transmission time. At low speeds that may take
awhile,

Relax TX draining in ns8250_bus_transmit().

Since TX interrupt is generated when THRE is set, wait for TEMT set means
wait for full character transmission time. At low speeds that may take
awhile, burning CPU time while holding sc_hwmtx lock, also congested.

This is partial revert of r317659.

PR: 240121
MFC after: 2 weeks

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Add ACPI entries for Synopsys Designware UARTs used on ARM platforms

This fixes (userspace) console on the Marvell MACCHIATObin in ACPI mode with
latest TianoCore EDK2 firmware.

Submitted by: Greg

Add ACPI entries for Synopsys Designware UARTs used on ARM platforms

This fixes (userspace) console on the Marvell MACCHIATObin in ACPI mode with
latest TianoCore EDK2 firmware.

Submitted by: Greg V <[email protected]>
Reviewed by: mw, bcran
Differential Revision: https://reviews.freebsd.org/D20765

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add snps IP uart support / genaralize UART

This is an amalgam of a patch by Doug Ambrisko to
generalize uart_acpi_find_device, imp moving the
ACPI table to uart_dev_ns8250.c and advice by jhb
to wor

add snps IP uart support / genaralize UART

This is an amalgam of a patch by Doug Ambrisko to
generalize uart_acpi_find_device, imp moving the
ACPI table to uart_dev_ns8250.c and advice by jhb
to work around a bug in the EPYC 3151 BIOS
(the BIOS incorrectly marks the serial ports as
disabled)

Reviewed by: imp
MFC after: 8 weeks
Differential Revision: https://reviews.freebsd.org/D16432

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Add busy detect quirk to list of console options

This change allows one to set the busy_detect flag
required by the synopsys UART at the loader prompt.
This is needed by the EPYC 3000 SoC.

This wil

Add busy detect quirk to list of console options

This change allows one to set the busy_detect flag
required by the synopsys UART at the loader prompt.
This is needed by the EPYC 3000 SoC.

This will give users a working console up to the point where getty is required:
hw.uart.console="mm:0xfedc9000,rs:2,bd:1"

Reviewed by: imp
MFC after: 4 weeks
Differential Revision: https://reviews.freebsd.org/D16399

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sys/dev: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error

sys/dev: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.

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uart: detect 256-byte FIFOs

Submitted by: Zakary Nafziger <[email protected]>
Sponsored by: The FreeBSD Foundation

Make some UART consoles to not spin wait for data to be sent.

At least with Tx FIFO enabled it shows me ~10% reduction of verbose boot
time with serial console at 115200 baud.

Reviewed by: marcel
M

Make some UART consoles to not spin wait for data to be sent.

At least with Tx FIFO enabled it shows me ~10% reduction of verbose boot
time with serial console at 115200 baud.

Reviewed by: marcel
MFC after: 2 weeks

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Add support for UART found in the Ingenic XBurst system on chips.

These CPUs has non-standard UART enable bit hidden in the UART FIFO
Control Register.

Sponsored by: DARPA, AFRL

sys/dev: minor spelling fixes.

Most affect comments, very few have user-visible effects.

Move support for Synopsys Designware APB UART out of ns8250 and into a
separate driver. Add support for activating clock and hwreset resources
for these devices when the EXT_RESOURCES option is prese

Move support for Synopsys Designware APB UART out of ns8250 and into a
separate driver. Add support for activating clock and hwreset resources
for these devices when the EXT_RESOURCES option is present.

Reviewed by: andrew, mmel, Emmanuel Vadot <[email protected]>
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D5749

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Add ns16550a compatible string in UART 8250 driver

Obtained from: Semihalf
Submitted by: Michal Stanek <[email protected]>
Sponsored by: Annapurna Labs
Approved by:

Add ns16550a compatible string in UART 8250 driver

Obtained from: Semihalf
Submitted by: Michal Stanek <[email protected]>
Sponsored by: Annapurna Labs
Approved by: cognet (mentor)
Reviewed by: imp, wma
Differential revision: https://reviews.freebsd.org/D5404

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