powerpc: clean up empty lines in .c and .h files
powerpc: Fix cpufreq statement scopingThe second statements on the lines are not guarded by the `if' condition.This triggers a warning with newer gcc. It's relatively harmless given theusage, bu
powerpc: Fix cpufreq statement scopingThe second statements on the lines are not guarded by the `if' condition.This triggers a warning with newer gcc. It's relatively harmless given theusage, but incorrect. Instead, wrap the statements so they're properlyguarded.Reported by: powerpc64-gcc xtoolchainMFC after: 1 week
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pmcr: Fix pstate setting on Power8Fix p-state setting on Power8 by removing the accidental double-indirection ofthe pstate_ids table.The pstate_ids table comes from the OF property "ibm,pstate-i
pmcr: Fix pstate setting on Power8Fix p-state setting on Power8 by removing the accidental double-indirection ofthe pstate_ids table.The pstate_ids table comes from the OF property "ibm,pstate-ids." On Power9,the values happen to be identical to the indices, so the extra indirection washarmless. On Power8, the values were out of the range [0, npstates], sopmcr_set() would fail the spec[0] range check with EINVAL.While here, include both the value and index in the driver-specific registerarray as spec[0] and spec[1] respectively. They're redundant, but relativelyharmless, and it may aid debugging.While here, fix the range check to exclude the index npstates, which is onepast the last valid index.PR: 233693Reported and tested by: sbrunoReviewed by: jhibbits
Fix the build post-PMCR addition.Submitted by: lwhsu
Introduce PMCR-based cpufreq(4) driver, for IBM POWER8 and POWER9 systemsSummary: POWER8 and POWER9 use a single CPU register, per core, to change clockspeed. Everything else is handled by the on
Introduce PMCR-based cpufreq(4) driver, for IBM POWER8 and POWER9 systemsSummary: POWER8 and POWER9 use a single CPU register, per core, to change clockspeed. Everything else is handled by the on-chip controller. This changenecessitates a change to the cpufreq global kernel driver to bump supportedlevels, as the device tree for these systems can have theoretically 256different options. On my POWER9 Talos, the list consists of 100 items. At16.67MHz intervals, that allows for a change of roughly 1.67GHz between lowestand highest.This has only been tested on the POWER9. However, since they're similar, thisshould work on POWER8 as well.Reviewed By: nwhitehornDifferential Revision: https://reviews.freebsd.org/D15932
[ofw] fix errneous checks for OF_finddevice(9) return valueOF_finddevices returns ((phandle_t)-1) in case of failure. Some codein existing drivers checked return value to be equal to 0 orless/equ
[ofw] fix errneous checks for OF_finddevice(9) return valueOF_finddevices returns ((phandle_t)-1) in case of failure. Some codein existing drivers checked return value to be equal to 0 orless/equal to 0 which is also wrong because phandle_t is unsignedtype. Most of these checks were for negative cases that were nevertriggered so trhere was no impact on functionality.Reviewed by: nwhitehornMFC after: 2 weeksDifferential Revision: https://reviews.freebsd.org/D14645
sys/powerpc: further adoption of SPDX licensing ID tags.Mainly focus on files that use BSD 2-Clause license, however the tool Iwas using misidentified many licenses so this was mostly a manual - e
sys/powerpc: further adoption of SPDX licensing ID tags.Mainly focus on files that use BSD 2-Clause license, however the tool Iwas using misidentified many licenses so this was mostly a manual - errorprone - task.The Software Package Data Exchange (SPDX) group provides a specificationto make it easier for automated tools to detect and summarize well knownopensource licenses. We are gradually adopting the specification, notingthat the tags are considered only advisory and do not, in any way,superceed or replace the license texts.
Add cpufreq support for P1022 and MPC8536P1022 and MPC8536 include a 'jog' feature for clock control(jog being a slower form of run mode). This is done by changing thePLL multiplier, and cannot
Add cpufreq support for P1022 and MPC8536P1022 and MPC8536 include a 'jog' feature for clock control(jog being a slower form of run mode). This is done by changing thePLL multiplier, and cannot be done if any core is in doze or sleep mode.
Some style(9) fixesMFC after: 1 monthX-MFC with: r259284
Add PMU-based CPU frequency scaling. This method is used on most TitaniumPowerBooks.MFC after: 1 month
Remove unused variables. Spotted by a cppcheck(devel/cppcheck, http://sourceforge.net/projects/cppcheck) run.Approved by: nwhitehorn (mentor)
MFppc64:Kernel sources for 64-bit PowerPC, along with build-system changes to keep32-bit kernels compiling (build system changes for 64-bit kernels arecoming later). Existing 32-bit PowerPC kerne
MFppc64:Kernel sources for 64-bit PowerPC, along with build-system changes to keep32-bit kernels compiling (build system changes for 64-bit kernels arecoming later). Existing 32-bit PowerPC kernel configurations must beupdated after this change to specify their architecture.
On SMP G5 systems, sometimes the power-mode-data property is only foundon CPU 0, so look there if it is not otherwise available.
Add cpufreq support on the PowerPC G5, along with a skeleton SMU driverin order to slew CPU voltage during frequency changes. The OpenBSD SMUdriver was an extremely helpful reference for this.
Introduce support for cpufreq on PowerPC with the dynamic frequencyswitching capabilities of the MPC7447A and MPC7448.