RISC-V: fix some mismatched format specifiersRISC-V is currently built with -Wno-format, which is how these wentundetected. Address them now before re-enabling those warnings.Differential Revisi
RISC-V: fix some mismatched format specifiersRISC-V is currently built with -Wno-format, which is how these wentundetected. Address them now before re-enabling those warnings.Differential Revision: https://reviews.freebsd.org/D26319
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xilinx: clean up empty lines in .c and .h files
Enter the network epoch in the xdma interrupt handler if requiredby a peripheral device driver.Sponsored by: DARPA, AFRL
Fix xae(4) driver attachement on the Government Furnished Equipment (GFE)riscv cores.GFE cores come with standard DTS file that lacks standard 'dmas ='property, which means xae(4) could not find
Fix xae(4) driver attachement on the Government Furnished Equipment (GFE)riscv cores.GFE cores come with standard DTS file that lacks standard 'dmas ='property, which means xae(4) could not find a DMA controller to use.The 'dmas' property could not be added to the DTS file because theethernet controller and DMA engine parts in Linux are implementedin a single driver.Instead of 'dmas' property the standard Xilinx 'axistream-connected'property is provided, so fallback to use it instead.Suggested by: James Clarke <[email protected]>Reviewed by: James Clarke <[email protected]>Sponsored by: DARPA, AFRL
Add driver for Xilinx XDMA PCIe Bridge found in the U.S. GovernmentFurnished Equipment (GFE) riscv cores.GFE cores are synthesized on the Xilinx Virtex UltraScale+ FPGA VCU118Evaluation Kit.Spo
Add driver for Xilinx XDMA PCIe Bridge found in the U.S. GovernmentFurnished Equipment (GFE) riscv cores.GFE cores are synthesized on the Xilinx Virtex UltraScale+ FPGA VCU118Evaluation Kit.Sponsored by: DARPA, AFRLDifferential Revision: https://reviews.freebsd.org/D23337
Convert to if_foreach_llmaddr() KPI.
Negate the logic of XCHAN_CAP_NOBUFS macro and rename it toXCHAN_CAP_BOUNCE.The only application that uses bounce buffering for now is the GovernmentFurnished Equipment (GFE) P2's dma core (AXIDM
Negate the logic of XCHAN_CAP_NOBUFS macro and rename it toXCHAN_CAP_BOUNCE.The only application that uses bounce buffering for now is the GovernmentFurnished Equipment (GFE) P2's dma core (AXIDMA) with its own dedicatedcacheless bounce buffer.Sponsored by: DARPA, AFRL
Add driver for the Xilinx AXI Direct Memory Access (AXI DMA) controllerfound in the U.S. Government Furnished Equipment (GFE) 64-bit RISC-V cores.Sponsored by: DARPA, AFRL
Add driver for Xilinx AXI Ethernet tri-mode (10/100/1000 Mb/s) MAC foundin the U.S. Government Furnished Equipment (GFE) 64-bit RISC-V cores.Sponsored by: DARPA, AFRL
ofw_spi: Parse property for the SPI mode and CS polarity.As cs is stored in a uint32_t, use the last bit to store theactive high flag as it's unlikely that we will have that much CS.Reviewed by:
ofw_spi: Parse property for the SPI mode and CS polarity.As cs is stored in a uint32_t, use the last bit to store theactive high flag as it's unlikely that we will have that much CS.Reviewed by: loosMFC after: 2 weeksDifferential Revision: https://reviews.freebsd.org/D8614
Assert CS for single transfers.
Add driver for Xilinx AXI Quad SPI device. The device was found inlowRISC hardware.Sponsored by: DARPA, AFRLSponsored by: HEIF5